Page 1 of 8
Document No. 70-0148-03
www.psemi.com
2005 Peregrine Semiconductor Corp. All rights reserved.
RF1
RF2
CTRL
75
75
CMOS
Control
Driver
The PE4270 is a is a high-isolation Switch designed for CATV
applications, covering a broad frequency range from near DC
up to 3000 MHz. This single-supply SPST switch offers a
single-pin CMOS control interface with industry leading CTB
performance. It also provides low insertion loss, high isolation
and extremely low bias requirements while operating on a
single 3-volt supply. In a typical CATV application, the PE4270
provides for a cost effective and manufacturable solution vs.
mechanical relays.
The PE4270 is manufactured on Peregrine's UltraCMOSTM
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Product Specification
SPST CATV UltraCMOSTM Switch
DC - 3000 MHz
Product Description
Figure 1. Functional Diagram
PE4270
Features
Integrated 0.25 watt terminations
CTB performance of 90 dBc
High isolation: 90 dB at 5 MHz, 63 dB
at 1000 MHz
Low insertion loss: 0.5 dB at 50 MHz,
0.70 dB at 1000 MHz
High input IP2: >80 dBm
CMOS/TTL single-pin control
Single +3-volt supply operation
Extremely low bias: 8
A @ 3 V
Available in a 6-lead DFN package
Notes: 1. Device linearity will begin to degrade below 1 MHz.
2. Measured in a 50
system.
3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth.
4. Note Absolute Maximum ratings in Table 3.
Table 1. Electrical Specifications @ +25 C (Z
S
= Z
L
= 75
)
Figure 2. Package Type
6-lead DFN
Parameter Condition
Minimum
Typical
Maximum
Units
Operating Frequency
1
DC
3000
MHz
Insertion Loss
DC 50 MHz
1000 MHz
0.50
0.70
0.65
0.85
dB
Isolation
DC 50 MHz
1000 MHz
85
60
90
63
dB
Return Loss
5 - 1000 MHz,
V
CNTL
= 3.0V
15
16
dB
1 dB Compression
2,4
1000 MHz
28
30
dBm
CTB / CSO
77 & 110 channels;
PO = 44 dBmV
-90
dBc
Input IP2
2
1000 MHz
80
dBm
Input IP3
2
1000 MHz
50
dBm
Video Feedthrough
3
15
mV
pp
Switching Time
2
S
Product Specification
PE4270
Page 2 of 8
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0148-03
UltraCMOSTM RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOSTM device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOSTM
devices are immune to latch-up.
Table 4. DC Electrical Specifications
Notes: 1. Both RF pins must be held at 0 V
DC
or require external DC
blocking capacitors
2. The exposed pad must be soldered to the ground plane for
proper switch performance.
Figure 3. Pin Configuration
Table 5. Control Logic Truth Table
Exposed
Solder Pad
(bottom side)
V
DD
GND
RF1
RF2
GND
CTRL
4
5
6
3
2
1
Device Description
The PE4270 high isolation SPST CATV Switch is
designed to support CATV applications such as
premise disconnect of a CATV signal path. This
function is typically performed by bulky and
expensive mechanical relays. The high isolation
characteristics, high compression point, and
integrated 75-ohm terminations make the PE4270
an ideal, cost effective and manufacturable
product of choice.
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal, and
has a threshold of 50% of V
DD
. For flexibility to
support systems that have 5-volt control logic
drivers, the control logic input has been designed
to handle a 5-volt logic HIGH signal. (A minimal
current will be sourced out of the V
DD
pin when the
control logic input voltage level exceeds V
DD
.)
Notes: 1.
CTRL accepts both CMOS and TTL voltage leads.
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Pin
No.
Pin Name
Description
1
V
DD
Nominal 3 V supply connection.
2
GND
Ground connection.
2
3
RF1
RF port.
1
4
CTRL
CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
5
GND
Ground connection.
3
6
RF2
RF port.
1
Symbol Parameter/Condition Min Max Unit
V
DD
Power supply voltage
-0.3
4.0
V
V
I
Voltage on CTRL input
-0.3
5.5
V
T
ST
Storage temperature
-65
150
C
T
OP
Operating temperature
-40
85
C
P
IN
Input power (50 ),
CTRL=1/CTRL=0
33/24
dBm
V
ESD
ESD voltage
(Human Body Model)
500
V
Parameter Min
Typ
Max
Unit
V
DD
Power Supply
2.7
3.0
3.3
V
I
DD
Power Supply Current
(V
DD
= 3V, V
CTRL
= 3V)
8
20
A
Control Voltage High
0.7xV
DD
5
V
Control Voltage Low
0
0.3xV
DD
V
Control Voltage (CTRL)
Signal Path (RF1 to RF2)
High
1
ON
Low
OFF
Product Specification
PE4270
Page 3 of 8
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0148-03
www.psemi.com
Typical Performance Data @ -40 C to 85 C (Unless Otherwise Noted)
Figure 4. Insertion Loss - RF1 to RF2
Figure 5. 1dB Compression & 3
rd
Order
Figure 6. Isolation - RF1 to RF2
(75
impedance except as indicated)
Intercept Point (T = 25C)
Product Specification
PE4270
Page 4 of 8
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0148-03
UltraCMOSTM RFIC Solutions
Typical Performance Data @ -40 C to 85 C (Unless Otherwise Noted)
Figure 7. RF1 Return Loss (Switch = ON)
Figure 8. RF1 Return Loss (Switch = OFF)
Figure 9. RF2 Return Loss (Switch = ON)
Figure 10. RF2 Return Loss (Switch = OFF)
(75-ohm impedance)
Product Specification
PE4270
Page 5 of 8
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0148-03
www.psemi.com
Evaluation Kit
The PE4270 EK board was designed to ease
customer evaluation of Peregrine's high
performance SPST CATV MOSFET switch. RF1
is connected through a 75
transmission line via
the top left F connector, J1. RF2 is connected
through a 75
transmission line via the top right
F connector, J2. A 75
through transmission line
is available via F connectors J3 and J4. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated. V
DD
is supplied via J6-2, while
the control logic voltage is supplied via J5-2. It is
the responsibility of the customer to determine
proper supply decoupling for their design
application. It has been observed that by
removing C1 and C2 from the evaluation board
has not shown to degrade RF performance.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031". The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide model with
trace width of 0.021", trace gaps of 0.030",
dielectric thickness of 0.028", metal thickness of
0.0021" and
r
of 4.6. Note that the predominate
mode for these transmission lines is coplanar
waveguide with a ground plane.
Figure 11. Evaluation Board Layouts
Figure 12. Evaluation Board Schematic
Peregrine Specification 102/0224
Peregrine Specification 101/0167 (with F connectors)
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