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8535AG-01
www.icst.com/products/hiperclocks.html
REV. D APRIL 1, 2003
1
Integrated
Circuit
Systems, Inc.
ICS8535-01
L
OW
S
KEW
, 1-
TO
-4
LVCMOS/LVTTL-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
G
ENERAL
D
ESCRIPTION
The ICS8535-01 is a low skew, high performance
1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout
buffer and a member of the HiPerClockSTM family
of High Performance Clock Solutions from ICS.
The ICS8535-01 has two single ended clock in-
puts. the single ended clock input accepts LVCMOS or LVTTL
input levels and translate them to 3.3V LVPECL levels. The
clock enable is internally synchronized to eliminate runt clock
pulses on the output during asynchronous assertion/
deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics
make the ICS8535-01 ideal for those applications demand-
ing well defined performance and repeatability.
F
EATURES
4 differential 3.3V LVPECL outputs
Selectable CLK0 or CLK1 inputs for redundant
and multiple frequency fanout applications
CLK0 or CLK1 can accept the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 266MHz
Translates LVCMOS and LVTTL levels to
3.3V LVPECL levels
Output skew: 30ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.9ns (maximum)
3.3V operating supply
0C to 70C ambient operating temperature
Industrial temperature information available upon request
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
HiPerClockSTM
,&6
ICS8535-01
20-Lead TSSOP
4.4mm x 6.5mm x 0.92mm body package
G Package
Top View
V
EE
CLK_EN
CLK_SEL
CLK0
nc
CLK1
nc
nc
nc
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
CC
Q1
nQ1
Q2
nQ2
V
CC
Q3
nQ3
CLK0
CLK1
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
0
1
CLK_EN
CLK_SEL
D
Q
LE
8535AG-01
www.icst.com/products/hiperclocks.html
REV. D APRIL 1, 2003
2
Integrated
Circuit
Systems, Inc.
ICS8535-01
L
OW
S
KEW
, 1-
TO
-4
LVCMOS/LVTTL-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
T
ABLE
2. P
IN
C
HARACTERISTICS
T
ABLE
1. P
IN
D
ESCRIPTIONS
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8535AG-01
www.icst.com/products/hiperclocks.html
REV. D APRIL 1, 2003
3
Integrated
Circuit
Systems, Inc.
ICS8535-01
L
OW
S
KEW
, 1-
TO
-4
LVCMOS/LVTTL-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
T
ABLE
3A. C
ONTROL
I
NPUT
F
UNCTION
T
ABLE
T
ABLE
3B. C
LOCK
I
NPUT
F
UNCTION
T
ABLE
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F
IGURE
1. CLK_EN T
IMING
D
IAGRAM
Enabled
Disabled
CLK0, CLK1
CLK_EN
nQ0:nQ3
Q0:Q3
8535AG-01
www.icst.com/products/hiperclocks.html
REV. D APRIL 1, 2003
4
Integrated
Circuit
Systems, Inc.
ICS8535-01
L
OW
S
KEW
, 1-
TO
-4
LVCMOS/LVTTL-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
T
ABLE
4B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
T
ABLE
4C. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
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A
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A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5 V
Outputs, V
O
-0.5V to V
CC
+ 0.5V
Package Thermal Impedance,
JA
73.2C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions
beyond those listed in the
DC Characteristics or AC Charac-
teristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
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:
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E
T
O
N
V
o
t
C
C
.
V
2
-
8535AG-01
www.icst.com/products/hiperclocks.html
REV. D APRIL 1, 2003
5
Integrated
Circuit
Systems, Inc.
ICS8535-01
L
OW
S
KEW
, 1-
TO
-4
LVCMOS/LVTTL-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
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