Document Outline
- General Description
- Features
- Block Diagram
- Pin Assignment
- Pin Descriptions
- Pin Characteristics
- Common Configurations Table
- Programmable M Output Divider Function Table
- Programmable N Output Divider Function Table
- Bypass Mode Function Table
- OE_REF Output Function Table
- Absolute Maximum Ratings
- Power Supply 3.3V DC Characteristics
- Power Supply 3.3V/2.5V DC Characteristics
- Power Supply 2.5V DC Characteristics
- LVCMOS DC Characteristics
- LVPECL DC Characteristics
- Crystal Characteristics
- 3.3V AC Characteristics
- 3.3V/2.5V AC Characteristics
- 2.5V AC Characteristics
- Parameter Measurement Information
- Parameter Measurement Information, continued
- Application Information
- Power Supply Filtering Techniques
- Recommendations for Unused Input and Output Pins
- Crystal Input Interface
- Termination for 3.3V LVPECL Output
- Termination for 2.5V LVPECL Output
- Reliability Information
- Transistor Count
- Package Outline
- Package Dimensions
- Ordering Information
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
1
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
G
ENERAL
D
ESCRIPTION
The ICS843001I-23 is a highly versatile, low
phase noise LVPECL/LVCMOS Synthesizer
which can generate low jitter reference clocks
for a variety of communication applications
and is a member of the HiPerClocks
TM
family
of high performance clock solutions from ICS.
The dual crystal interface allows the synthesizer to
support up to three communication standards in a given
application (i.e. SONET with a 19.44MHz crystal, 1Gb/10Gb
Ethernet and Fibre Channel using a 25MHz crystal). The
rms phase jitter performance is typically less than 1ps, thus
making the device acceptable for use in demanding
applications such as OC48 SONET, GbE/10Gb Ethernet
and SAN applications. The ICS843001I-23 is packaged in
a small 24-pin TSSOP package.
F
EATURES
One 3.3V LVPECL output pair and
one LVCMOS/LVTTL REF_OUT output
Selectable crystal oscillator interfaces
or LVCMOS/LVTTL single-ended input
Crystal and CLK range: 17.5MHz - 29.54MHz
Able to generate GbE/10GbE/12GbE, Fibre Channel
(1Gb/4Gb/10Gb), PCI-E and SATA from a 25MHz crystal
VCO range: 1.12GHz - 1.3GHz
Supports the following applications:
SONET, Ethernet, Fibre Channel, Serial ATA, and HDTV
RMS phase jitter @ 622.08MHz (12kHz - 20MHz):
<1ps (typical) design target
Supply modes:
V
CC
/V
CCO
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
-40C to 85C ambient operating temperature
Available in both standard and lead-free RoHS-compliant
packages
HiPerClockSTM
ICS
P
IN
A
SSIGNMENT
11
10
01
00
00
01
10
11
Phase
Detector
VCO
000 44
001 45
010 48
011 50
100 51
111 64
(default)
N
000 2
001 4
010 5
011 6
100 8
(default)
101 10
110 12
111 16
M
3
3
OSC
OSC
ICS843001I-23
24-Lead TSSOP
4.40mm x 7.8mm x 0.92mm
package body
G Package
Top View
V
CCO
_
LVCMOS
N 0
N 1
N 2
V
CCO
_
LVPECL
Q
nQ
V
EE
V
CCA
V
CC
XTAL_OUT1
XTAL_IN1
1
2
3
4
5
6
7
8
9
10
11
12
REF_OUT
V
EE
OE_REF
M2
M1
M0
MR
SEL1
SEL0
CLK
XTAL_IN0
XTAL_OUT0
24
23
22
21
20
19
18
17
16
15
14
13
B
LOCK
D
IAGRAM
N2:N0
SEL0
SEL1
XTAL_IN0
XTAL_OUT0
XTAL_IN1
XTAL_OUT1
CLK
MR
M2:M0
OE_REF
Q
nQ
Pulldown
Pulldown
Pulldown
Pulldown
REF_OUT
Pulldown
Pullup
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on
initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications
without notice.
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
2
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ABLE
1. P
IN
D
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843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
3
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ABLE
3A. C
OMMON
C
ONFIGURATIONS
T
ABLE
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1
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0
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0
0
0
4
4
5
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4
5
.
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2
0
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1
5
4
9
.
4
2
8
8
.
8
2
0
1
0
8
4
3
.
3
2
8
0
.
7
2
0
1
1
0
5
4
.
2
2
0
.
6
2
1
0
0
1
5
0
.
2
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4
.
5
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1
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)
t
l
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a
f
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d
(
5
.
7
1
1
3
.
0
2
s
t
u
p
n
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t
u
p
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F
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_
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T
U
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_
F
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0
Z
-
i
H
1
e
v
i
t
c
A
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
4
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_LVPECL,
V
CCO_LVCMOS
= 3.3V5%, TA = -40C
TO
85C
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5V
Outputs, I
O
(LVPECL)
Continuous Current
50mA
Surge Current
100mA
Outputs, V
O
(LVCMOS)
-0.5V to V
CCO
+ 0.5V
Package Thermal Impedance,
JA
70C/W (0 mps)
Storage Temperature, T
STG
-65C to 150C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
T
ABLE
4B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCA
= 3.3V5%, V
CCO_LVPECL,
V
CCO_LVCMOS
= 2.5V5%,
TA = -40C
TO
85C
l
o
b
m
y
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r
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m
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m
i
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n
U
V
C
C
e
g
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o
V
y
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p
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r
o
C
5
3
1
.
3
3
.
3
5
6
4
.
3
V
V
A
C
C
e
g
a
t
l
o
V
y
l
p
p
u
S
g
o
l
a
n
A
5
3
1
.
3
3
.
3
5
6
4
.
3
V
V
L
C
E
P
V
L
_
O
C
C
e
g
a
t
l
o
V
y
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p
p
u
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5
3
1
.
3
3
.
3
5
6
4
.
3
V
V
S
O
M
C
V
L
_
O
C
C
e
g
a
t
l
o
V
y
l
p
p
u
S
t
u
p
t
u
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5
3
1
.
3
3
.
3
5
6
4
.
3
V
I
E
E
t
n
e
r
r
u
C
y
l
p
p
u
S
r
e
w
o
P
0
=
F
E
R
_
E
O
D
B
T
A
m
z
H
M
4
5
.
9
2
=
T
U
O
_
F
E
R
,
1
=
F
E
R
_
E
O
D
B
T
A
m
I
A
C
C
t
n
e
r
r
u
C
y
l
p
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g
o
l
a
n
A
5
A
m
I
L
C
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P
V
L
_
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C
C
t
n
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r
r
u
C
y
l
p
p
u
S
t
u
p
t
u
O
0
=
F
E
R
_
E
O
D
B
T
A
m
I
S
O
M
C
V
L
_
O
C
C
t
n
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r
u
C
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p
p
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p
t
u
O
z
H
M
4
5
.
9
2
=
T
U
O
_
F
E
R
,
1
=
F
E
R
_
E
O
D
B
T
A
m
l
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b
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5
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3
.
3
5
6
4
.
3
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V
A
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5
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1
.
3
3
.
3
5
6
4
.
3
V
V
L
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P
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a
t
l
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y
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t
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t
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5
2
6
.
2
5
.
2
5
2
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.
2
V
V
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C
V
L
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O
C
C
e
g
a
t
l
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V
y
l
p
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t
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p
t
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5
2
6
.
2
5
.
2
5
2
6
.
2
V
I
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t
n
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r
r
u
C
y
l
p
p
u
S
r
e
w
o
P
0
=
F
E
R
_
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O
D
B
T
A
m
z
H
M
4
5
.
9
2
=
T
U
O
_
F
E
R
,
1
=
F
E
R
_
E
O
D
B
T
A
m
I
A
C
C
t
n
e
r
r
u
C
y
l
p
p
u
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g
o
l
a
n
A
D
B
T
A
m
I
L
C
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P
V
L
_
O
C
C
t
n
e
r
r
u
C
y
l
p
p
u
S
t
u
p
t
u
O
0
=
F
E
R
_
E
O
D
B
T
A
m
I
S
O
M
C
V
L
_
O
C
C
t
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r
u
C
y
l
p
p
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t
u
p
t
u
O
z
H
M
4
5
.
9
2
=
T
U
O
_
F
E
R
,
1
=
F
E
R
_
E
O
D
B
T
A
m
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
5
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ABLE
4E. LVPECL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_LVPECL
= 3.3V5%
OR
2.5V5%,
OR
V
CC
= V
CCA
= 3.3V5%, V
CCO_LVPECL
= 2.5V5%, TA = -40C
TO
85C
T
ABLE
4D. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_LVCMOS
= 3.3V5%
OR
2.5V5%,
OR
V
CC
= V
CCA
= 3.3V5%, V
CCO_LVCMOS
= 2.5V5%, TA = -40C
TO
85C
T
ABLE
4C. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_LVPECL,
V
CCO_LVCMOS
= 2.5V5%, TA = -40C
TO
85C
l
o
b
m
y
S
r
e
t
e
m
a
r
a
P
s
n
o
i
t
i
d
n
o
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t
s
e
T
m
u
m
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l
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c
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p
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m
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V
C
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5
2
6
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5
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2
5
2
6
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2
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V
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5
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0
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B
T
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m
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H
M
4
5
.
9
2
=
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,
1
=
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A
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=
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4
5
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9
2
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,
1
=
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a
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h
g
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C
V
3
.
3
=
2
V
C
C
3
.
0
+
V
V
C
C
V
5
.
2
=
7
.
1
V
C
C
3
.
0
+
V
V
L
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g
a
t
l
o
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w
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C
V
3
.
3
=
3
.
0
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8
.
0
V
V
C
C
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5
.
2
=
3
.
0
-
7
.
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I
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h
g
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1
L
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0
L
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,
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L
C
1
N
,
0
N
,
R
M
,
F
E
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_
E
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V
C
C
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=
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I
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5
6
4
.
3
=
V
5
2
6
.
2
r
o
0
5
1
A
2
M
:
0
M
,
2
N
V
C
C
V
=
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5
6
4
.
3
=
V
5
2
6
.
2
r
o
5
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w
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,
1
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0
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,
K
L
C
1
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,
0
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,
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M
,
F
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C
,
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5
2
6
.
2
r
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V
5
6
4
.
3
=
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I
V
0
=
5
-
A
2
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:
0
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,
2
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V
C
C
,
V
5
2
6
.
2
r
o
V
5
6
4
.
3
=
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=
0
5
1
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g
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5
6
4
.
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6
.
2
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5
2
6
.
2
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8
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1
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V
2
-
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
6
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ABLE
6A. AC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_LVPECL,
V
CCO_LVCMOS
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TO
85C
T
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5. C
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843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
7
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ABLE
6C. AC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO_LVPECL,
V
CCO_LVCMOS
= 2.5V5%, TA = -40C
TO
85C
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843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
8
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
P
ARAMETER
M
EASUREMENT
I
NFORMATION
3.3V C
ORE
/2.5V LVPECL O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
2.5V LVPECL O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
3.3V LVPECL O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
SCOPE
Qx
nQx
LVPECL
2V
-1.3V0.165V
2.5V LVCMOS O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
V
CC
,
V
CCA
,
V
CCO_LVPECL
V
EE
3.3V C
ORE
/2.5V LVCMOS O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
3.3V LVCMOS O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
SCOPE
Qx
LVCMOS
1.655%
-1.65V5%
V
CC
,
V
CCA
,
V
CCO_LVCMOS
V
EE
SCOPE
Qx
nQx
LVPECL
2.8V0.04V
-0.5V0.125V
V
CC
,
V
CCA
V
EE
SCOPE
Qx
LVCMOS
V
DDO
2
1.255%
-1.25V5%
V
CC
,
V
CCA
V
EE
SCOPE
Qx
nQx
LVPECL
2V
-0.5V0.125V
V
CC
,
V
CCA
,
V
CCO_LVPECL
V
EE
SCOPE
Qx
LVCMOS
1.255%
-1.25V5%
V
CC
,
V
CCA
,
V
CCO_LVCMOS
V
EE
V
CCO_LVPECL
V
CCO_LVCMOS
2V
2.055%
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
9
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
t
PD
V
CC
2
V
CCO_LVCMOS
2
REF_OUT
t
PW
t
PERIOD
t
PW
t
PERIOD
odc =
x 100%
Q
CLK
RMS P
HASE
J
ITTER
P
ROPAGATION
D
ELAY
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
V
SW I N G
nQ
O
UTPUT
R
ISE
/F
ALL
T
IME
Phase Noise Mask
Offset Frequency
f
1
f
2
Phase Noise Plot
RMS Jitter = Area Under the Masked Phase Noise Plot
Noise P
o
w
er
LVPECL O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
/P
ERIOD
t
PERIOD
t
PW
t
PERIOD
odc =
x 100%
V
CCO_LVCMOS
2
t
PW
REF_OUT
LVCMOS O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
/P
ERIOD
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
10
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
A
PPLICATION
I
NFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS843001I-23 provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC
, V
CCA
, and V
CCO_x
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance,
power supply isolation is required.
Figure 1
illustrates how
a 10
resistor along with a 10F and a .01F bypass
capacitor should be connected to each V
CCA
.
P
OWER
S
UPPLY
F
ILTERING
T
ECHNIQUES
F
IGURE
1. P
OWER
S
UPPLY
F
ILTERING
10
V
CCA
10
F
.01
F
3.3V or 2.5V
.01
F
V
CC
I
NPUTS
:
C
RYSTAL
I
NPUT
:
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1k
resistor can be tied from XTAL_IN to ground.
CLK I
NPUT
:
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1k
resistor can be tied from the CLK input to
ground.
C
ONTROL
P
INS
:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
resistor can be used.
R
ECOMMENDATIONS
FOR
U
NUSED
I
NPUT
AND
O
UTPUT
P
INS
O
UTPUTS
:
LVCMOS O
UTPUT
:
All unused LVCMOS output can be left floating. We
recommend that there is no trace attached.
LVPECL O
UTPUT
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
11
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ERMINATION
FOR
3.3V LVPECL O
UTPUT
V
CC
- 2V
50
50
RTT
Z
o
= 50
Z
o
= 50
FOUT
FIN
RTT =
Z
o
1
((V
OH
+ V
OL
) / (V
CC
2)) 2
3.3V
125
125
84
84
Z
o
= 50
Z
o
= 50
FOUT
FIN
The clock layout topology shown below is a typical ter-
mination for LVPECL outputs. The two different layouts
mentioned are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs
that generate ECL/LVPECL compatible outputs. There-
fore, terminating resistors (DC current path to ground)
or current sources must be used for functionality. These
F
IGURE
3B. LVPECL O
UTPUT
T
ERMINATION
F
IGURE
3A. LVPECL O
UTPUT
T
ERMINATION
outputs are designed to drive 50
transmission lines.
Matched impedance techniques should be used to maxi-
mize operating frequency and minimize signal distor-
tion.
Figures 3A and 3B
show two different layouts which
are recommended only as guidelines. Other suitable
clock layouts may exist and it would be recommended
that the board designers simulate to guarantee compat-
ibility across all printed circuit and clock component pro-
cess variations.
C
RYSTAL
I
NPUT
I
NTERFACE
The ICS843001I-23 has been characterized with 18pF
parallel resonant crystals. The capacitor values shown in
Figure 2. C
RYSTAL
I
NPU
t I
NTERFACE
Figure 2
below were determined using an 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
ICS84332
XTAL_IN
XTAL_OUT
X1
18pF Parallel Cry stal
C2
22p
C1
22p
ICS843001I-23
843001AGI-23
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REV. B JANUARY 6, 2006
12
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ERMINATION
FOR
2.5V LVPECL O
UTPUT
Figure 4A
and
Figure 4B
show examples of termination for
2.5V LVPECL driver. These terminations are equivalent to ter-
minating 50
to V
CC
- 2V. For V
CC
= 2.5V, the V
CC
- 2V is very
close to ground level. The R3 in Figure 4B can be eliminated
and the termination is shown in
Figure 4C.
F
IGURE
4C. 2.5V LVPECL T
ERMINATION
E
XAMPLE
F
IGURE
4B. 2.5V LVPECL D
RIVER
T
ERMINATION
E
XAMPLE
F
IGURE
4A. 2.5V LVPECL D
RIVER
T
ERMINATION
E
XAMPLE
R2
62.5
Zo = 50 Ohm
R1
250
+
-
2.5V
2,5V LVPECL
Driv er
R4
62.5
R3
250
Zo = 50 Ohm
2.5V
VCC=2.5V
R1
50
R3
18
Zo = 50 Ohm
Zo = 50 Ohm
+
-
2,5V LVPECL
Driv er
VCC=2.5V
2.5V
R2
50
2,5V LVPECL
Driv er
VCC=2.5V
R1
50
R2
50
2.5V
Zo = 50 Ohm
Zo = 50 Ohm
+
-
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
13
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
R
ELIABILITY
I
NFORMATION
T
RANSISTOR
C
OUNT
The transistor count for ICS843001I-23 is: 4165
T
ABLE
7.
JA
VS
. A
IR
F
LOW
T
ABLE
FOR
24 L
EAD
TSSOP
JA
by Velocity (Meters per Second)
0
1
2.5
Multi-Layer PCB, JEDEC Standard Test Boards
70C/W
65C/W
62C/W
843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
14
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
P
ACKAGE
O
UTLINE
- G S
UFFIX
FOR
24 L
EAD
TSSOP
T
ABLE
8. P
ACKAGE
D
IMENSIONS
Reference Document: JEDEC Publication 95, MO-153
L
O
B
M
Y
S
s
r
e
t
e
m
i
l
l
i
M
m
u
m
i
n
i
M
m
u
m
i
x
a
M
N
4
2
A
-
-
0
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843001AGI-23
www.icst.com/products/hiperclocks.html
REV. B JANUARY 6, 2006
15
Integrated
Circuit
Systems, Inc.
ICS843001I-23
F
EMTO
C
LOCKS
TM C
RYSTAL
-
TO
-3.3V LVPECL/LVCMOS
F
REQUENCY
S
YNTHESIZER
PRELIMINARY
T
ABLE
9. O
RDERING
I
NFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
The aforementioned trademarks, HiPerClockS and FemtoClocks are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
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