Document Outline
- General Description
- Features
- Block Diagram
- Pin Assignment
- Pin Descriptions
- Pin Characteristics
- Absolute Maximum Ratings
- Power Supply DC Characteristics
- LVCMOS DC Characteristics
- LVHSTL DC Characteristics
- 3.3V AC Characteristics
- 2.5V AC Characteristics
- Parameter Measurement Information
- Application Information
- Power Considerations
- Power Dissipation
- Junction Temperature
- Thermal Resistance
- Calculations & Equations
- LVHSTL Driver Circuit & Termination Diagram
- Reliability Information
- Transistor Count
- Package Outline
- Package Dimensions
- Ordering Information
- Revision History Sheet
85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
1
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
G
ENERAL
D
ESCRIPTION
The ICS85222 is a Dual LVCMOS / LVTTL-to-
Differential LVHSTL Translator and a member of
the HiPerClocksTM family of High Performance
Clock Solutions from ICS. The ICS85222 has two
single ended clock inputs. The single ended clock
input accepts LVCMOS or LVTTL input levels and translates
them to LVHSTL levels. The small outline 8-pin SOIC pack-
age makes this device ideal for applications where space,
high performance and low power are important. For optimum
performance, both output pairs need to be terminated, even if
one output pair is unused.
F
EATURES
2 differential LVHSTL outputs
Selectable CLK0, CLK1 LVCMOS clock inputs
CLK0 and CLK1 can accept the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 350MHz
Part-to-part skew: 350ps (maximum)
Propagation delay: 1.3ns (maximum)
V
OH
: 1.2V (maximum)
3.3V and 2.5V operating supply
0C to 70C ambient operating temperature
Industrial temperature information available upon request
Lead-Free package fully RoHS compliant
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
ICS85222
8-Lead SOIC
3.90mm x 4.92mm x 1.37mm body package
M Package
Top View
Q0
nQ0
Q1
nQ1
1
2
3
4
Q0
nQ0
Q1
nQ1
CLK0
CLK1
HiPerClockSTM
ICS
V
DD
CLK0
CLK1
GND
8
7
6
5
85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
2
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
T
ABLE
1. P
IN
D
ESCRIPTIONS
T
ABLE
2. P
IN
C
HARACTERISTICS
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85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
3
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 3.3V5%, V
DD
= 2.5V5%, T
A
= 0C
TO
70C
T
ABLE
3B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
DD
= 3.3V5%, V
DD
= 2.5V5%, T
A
= 0C
TO
70C
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HARACTERISTICS
,
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DD
= 3.3V5%, V
DD
= 2.5V5%, T
A
= 0C
TO
70C
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A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5V
Outputs, I
O
Continuous Current
50mA
Surge Current
100mA
Package Thermal Impedance,
JA
112.7C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics or AC Character-
istics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
4
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
T
ABLE
4A. AC C
HARACTERISTICS
,
V
DD
= 3.3V5%, T
A
= 0C
TO
70C
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85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
5
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
P
ARAMETER
M
EASUREMENT
I
NFORMATION
2.5V C
ORE
/2.5V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
P
ROPAGATION
D
ELAY
O
UTPUT
R
ISE
/F
ALL
T
IME
Clock
Outputs
20%
80%
80%
20%
t
R
t
F
V
SW I N G
3.3V C
ORE
/3.3V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
SCOPE
LVHSTL
Qx
nQx
tsk(pp)
nQx
Qx
nQy
Qy
PART 1
PART 2
CLK0,
CLK1
nQ0, nQ1
Q0, Q1
t
PD
V
DD
2
V
DD
0V
3.3V 5%
O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
/P
ERIOD
Pulse Width
t
PERIOD
t
PW
t
PERIOD
odc =
nQ0, nQ1
Q0, Q1
GND
P
ART
-
TO
-P
ART
S
KEW
SCOPE
LVHSTL
Qx
nQx
V
DD
0V
2.5V 5%
GND
85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
6
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
A
PPLICATION
I
NFORMATION
S
CHEMATIC
E
XAMPLE
Figure 1 shows a schematic example of ICS85222. In this ex-
ample, the inputs are driven by 7
output LVCMOS drivers with
series terminations. The decoupling capacitors should be physi-
F
IGURE
1. ICS85222 LVHSTL B
UFFER
S
CHEMATIC
E
XAMPLE
R5
43
Zo = 50 Ohm
R2
50
Ro ~ 7 Ohm
Q1
Driver_LVCMOS
VDD=3.3V
R4
50
Zo = 50 Ohm
VDD=3.3V
Ro ~ 7 Ohm
Q2
Driver_LVCMOS
R1
50
U1
ICS85222
1
2
3
4
8
7
6
5
Q0
nQ0
Q1
nQ1
VDD
CLK0
CLK1
GND
Zo = 50 Ohm
LVHSTL Input
+
-
C1
0.1u
R6
43
R3
50
Zo = 50 Ohm
Zo = 50 Ohm
LVHSTL Input
+
-
VDD=3.3V
Zo = 50 Ohm
cally located near the power pin. For ICS85222, the unused out-
put need to be terminated.
85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
7
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
P
OWER
C
ONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS85222.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS85222 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
DD_MAX
* I
DD_MAX
= 3.465V * 45mA = 155.9mW
Power (outputs)
MAX
= 78.9mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 78.9mW = 157.8mW
Total Power
_MAX
(3.465V, with all outputs switching) = 155.9mW + 157.8mW = 313.7mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM
devices is 125C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in Section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 103.3C/W per Table 5 below.
Therefore, Tj for an ambient temperature of 70C with all outputs switching is:
70C + 0.314W * 103.3C/W = 102.4C. This is well below the limit of 125C
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
153.3C/W
128.5C/W
115.5C/W
Multi-Layer PCB, JEDEC Standard Test Boards
112.7C/W
103.3C/W
97.1C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
T
ABLE
5. T
HERMAL
R
ESISTANCE
JA
FOR
8-P
IN
SOIC, F
ORCED
C
ONVECTION
85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
8
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVHSTL output driver circuit and termination are shown in
Figure 2.
T
o calculate worst case power dissipation into the load, use the following equations which assume a 50
load.
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = (V
OH_MAX
/R
L
) * (V
DD_MAX
- V
OH_MAX
)
Pd_L = (V
OL_MAX
/R
L
) * (V
DD_MAX
- V
OL_MAX
)
Pd_H = (1.2V/50
) * (3.465V - 1.2V) = 54.4mW
Pd_L = (0.4V/50
) * (3.465V - 0.4V) = 24.52mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 78.9mW
F
IGURE
2. LVHSTL D
RIVER
C
IRCUIT
AND
T
ERMINATION
V
DD
V
OUT
RL
50
Q1
85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
9
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
R
ELIABILITY
I
NFORMATION
T
RANSISTOR
C
OUNT
The transistor count for ICS85222 is: 443
T
ABLE
6.
JA
VS
. A
IR
F
LOW
T
ABLE
FOR
8 L
EAD
SOIC
JA
by Velocity (Linear Feet per Minute)
0
200
500
Single-Layer PCB, JEDEC Standard Test Boards
153.3C/W
128.5C/W
115.5C/W
Multi-Layer PCB, JEDEC Standard Test Boards
112.7C/W
103.3C/W
97.1C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
10
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
P
ACKAGE
O
UTLINE
- M S
UFFIX
FOR
8 L
EAD
SOIC
T
ABLE
7. P
ACKAGE
D
IMENSIONS
Reference Document: JEDEC Publication 95, MS-012
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O
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85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
11
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
T
ABLE
8. O
RDERING
I
NFORMATION
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
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85222AM
www.icst.com/products/hiperclocks.html
REV. B MARCH 31, 2005
12
Integrated
Circuit
Systems, Inc.
ICS85222
D
UAL
LVCMOS / LVTTL-
TO
-
D
IFFERENTIAL
LVHSTL T
RANSLATOR
T
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