Integrated
Circuit
Systems, Inc.
General Description
Features
ICS9112-16
Block Diagram
Low Skew Output Buffer
9112-16 Rev G 02/06/02
Pin Configuration
Zero input - output delay
Frequency range 25 - 133 MHz (3.3V)
High loop filter bandwidth ideal for Spread
Spectrum applications.
Less than 200 ps Jitter between outputs
Skew controlled outputs
Skew less than 250 ps between outputs
Available in 8 pin 150 mil SOIC
or 173 mil TSSOP package.
3.3V 10% operation
The ICS9112-16 is a high performance, low skew, low jitter
clock driver. It uses a phase lock loop (PLL) technology to
align, in both phase and frequency, the REF input with the
CLKOUT signal. It is designed to distribute high speed
clocks in PC systems operating at speeds from 25 to
133 MHz.
ICS9112-16 is a zero delay buffer that provides
synchronization between the input and output. The
synchronization is established via CLKOUT feed back to the
input of the PLL. Since the skew between the input and
output is less than +/- 350 pS, the part acts as a zero delay
buffer.
The ICS9112-16 comes in an eight pin 150 mil SOIC or 173
mil TSSOP package. It has five output clocks. In the absence
of REF input, will be in the power down mode. In this mode,
the PLL is turned off and the output buffers are pulled low.
Power down mode provides the lowest power consumption
for a standby condition.
8 pin SOIC, TSSOP
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
2
ICS9112-16
Pin Descriptions
Notes:
1.
Guaranteed by design and characterization. Not subject to 100% test.
2.
Weak pull-down
3.
Weak pull-down on all outputs
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ICS9112-16
Notes:
1.
Guaranteed by design and characterization. Not subject to 100% test.
2.
All Skew specifications are mesured with a 50
transmission line, load teminated with 50
to 1.4V.
3.
Duty cycle measured at 1.4V.
4.
Skew measured at 1.4V on rising edges. Loading must be equal on outputs.
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND 0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . 0C to +70C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . 65C to +150C
Electrical Characteristics at 3.3V
V
DD
= 3.0 3.6 V, T
A
= 0 70
C unless otherwise stated
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only and functional operation of the device at these or any other conditions above those listed
in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
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ICS9112-16
Switching Characteristics
Notes:
1.
Guaranteed by design and characterization. Not subject to 100% test.
2.
REF input has a threshold voltage of 1.4V
3.
All parameters expected with loaded outputs
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ICS9112-16
Output to Output Skew
The skew between CLKOUT and the CLK(1-4) outputs is not dynamically adjusted by the PLL. Since CLKOUT is one of the
inputs to the PLL, zero phase difference is maintained from REF to CLKOUT. If all outputs are equally loaded, zero phase
difference will maintained from REF to all outputs.
If applications requiring zero output-output skew, all the outputs must equally loaded.
If the CLK(1-4) outputs are less loaded than CLKOUT, CLK(1-4) outputs will lead it; and if the CLK(1-4) is more loaded than
CLKOUT, CLK(1-4) will lag the CLKOUT.
Since the CLKOUT and the CLK(1-4) outputs are identical, they all start at the same time, but different loads cause them to
have different rise times and different times crossing the measurement thresholds.
REF input and
all outputs
loaded Equally
REF input and CLK(1-4)
outputs loaded equally, with
CLKOUT loaded More.
REF input and CLK(1_4)
outputs loaded equally, with
CLKOUT loaded Less.
Timing diagrams with different loading configurations
6
ICS9112-16
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
ICS XXXX y M - PPP - T
Ordering Information
ICS9112yM-16-T
Designation for tape and reel packaging
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Package Type
M=SOIC
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Example:
SEATING
PLANE
SEATING
PLANE
A1
B
A
e
.10 (.004)
.10 (.004)
h x 45
h x 45
L
C
INDEX
AREA
INDEX
AREA
1 2
1 2
N
D
E
H
150 mil (Narrow Body) SOIC
MIN
MAX
MIN
MAX
A
1.35
1.75
.0532
.0688
A1
0.10
0.25
.0040
.0098
B
0.33
0.51
.013
.020
C
0.19
0.25
.0075
.0098
D
E
3.80
4.00
.1497
.1574
e
H
5.80
6.20
.2284
.2440
h
0.25
0.50
.010
.020
L
0.40
1.27
.016
.050
N
0
8
0
8
VARIATIONS
MIN
MAX
MIN
MAX
8
4.80
5.00
.1890
.1968
10-0030
0.050 BASIC
SYMBOL
In Millimeters
In Inches
COMMON DIMENSIONS COMMON DIMENSIONS
Reference Doc.: JEDEC Publication 95, MS-012
SEE VARIATIONS
SEE VARIATIONS
N
D mm.
D (inch)
SEE VARIATIONS
SEE VARIATIONS
1.27 BASIC
7
ICS9112-16
Ordering Information
ICS9112yG-16-T
Designation for tape and reel packaging
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Package Type
G=TSSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
Example:
ICS XXXX y G - PPP - T
4.40 mm. Body, 0.65 mm. pitch TSSOP
(173 mil)
(0.0256 Inch)
INDEX
AREA
INDEX
AREA
1 2
1 2
N
D
E1
E
SEATING
PLANE
SEATING
PLANE
A1
A
A2
e
- C -
- C -
b
c
L
aaa
C
MIN
MAX
MIN
MAX
A
--
1.20
--
.047
A1
0.05
0.15
.002
.006
A2
0.80
1.05
.032
.041
b
0.19
0.30
.007
.012
c
0.09
0.20
.0035
.008
D
E
E1
4.30
4.50
.169
.177
e
L
0.45
0.75
.018
.030
N
0
8
0
8
aaa
--
0.10
--
.004
VARIATIONS
MIN
MAX
MIN
MAX
8
2.90
3.10
.114
.122
10-0035
SYMBOL
In Millimeters
In Inches
COMMON DIMENSIONS
COMMON DIMENSIONS
SEE VARIATIONS
SEE VARIATIONS
6.40 BASIC
0.252 BASIC
0.65 BASIC
0.0256 BASIC
SEE VARIATIONS
SEE VARIATIONS
N
D mm.
D (inch)
Reference Doc.: JEDEC Publication 95, MO-153
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