Integrated
Circuit
Systems, Inc.
ICS9250-22
Third party brands and names are the property of their respective owners.
9250-22 Rev B 12/08/00
Pin Configuration
56-Pin 300mil SSOP & TSSOP
Recommended Application:
P IV Chipset Support
Output Features:
4 Differential CPU Clock Pairs @ 3.3V
2 - 3V MREF clocks for memory reference seeds,
(separate single ended but 180 degrees out of phase)
4 - 66MHz reference output
10 - 3V 33MHz PCI clocks
2 - 48MHz clocks
2 - 14.318 reference output
Features:
Support power management: Power Down Mode
Supports Spread Spectrum modulation: 0 to -0.5% down
spread.
Uses external 14.318MHz crystal
Select logic for Differential Swing Control, Test mode,
Tristate, Power down, Spread Spectrum, limited
frequency select, selective clock enable.
External resistor for current reference
FS pins for frequency select
Key Specifications:
3V66 Output jitter <300ps
CPU Output Jitter <200ps
MREF Output jitter <250ps
Frequency Generator for P IVTM
GND
REF
VDDREF
X1
X2
GNDREF
PCICLK0
PCICLK1
VDDPCI
PCICLK2
PCICLK3
GNDPCI
PCICLK4
PCICLK5
VDDPCI
PCICLK6
PCICLK7
GNDPCI
PCICLK8
PCICLK9
VDDPCI
SEL100/133
GND48
48MHz
48MHz
VDD48
PD#
MULTSEL0/
MULTSEL1/REF
FS0/
FS1/
VDDMREF
3VMREF
3VMREF_B
GNDMREF
SPREAD#
CPUCLKST3
CPUCLKSC3
VDDCPU
CPUCLKST2
CPUCLKSC2
GNDCPU
CPUCLKST1
CPUCLKSC1
VDDCPU
CPUCLKST0
CPUCLKSC0
GNDCPU
I REF
VDDA
GNDA
VDD3V66
3V66-3
3V66-2
GND3V66
GND3V66
3V66-1
3V66-0
VDD3V66
ICS9250-22
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
Functionality
PLL2
PLL1
Spread
Spectrum
48MHz
3VMREF
PCICLK (9:0)
3VMREF_B
3V66 (3:0)
4
10
2
2
X1
X2
XTAL
OSC
CPU
DIVDER
3VMREF
DIVDER
PCI
DIVDER
3V66
DIVDER
PD#
SPREAD#
MULTSEL (1:0)
SEL100/133
FS(1:0)
Control
Logic
Config.
Reg.
REF
4
4
CPUCLKST (3:0)
CPUCLKSC (3:0)
/
3
3
1
L
E
S
0
0
1
0
S
F
1
S
F
n
o
i
t
c
n
u
F
0
0
0
z
H
M
0
0
1
e
v
i
t
c
A
0
0
1
)
d
e
v
r
e
s
e
R
(
0
1
0
)
d
e
v
r
e
s
e
R
(
0
1
1
s
t
u
p
t
u
o
l
l
a
e
t
a
t
s
i
r
T
1
0
0
z
H
M
3
3
1
e
v
i
t
c
A
1
0
1
)
d
e
v
r
e
s
e
R
(
1
1
0
)
d
e
v
r
e
s
e
R
(
1
1
1
e
d
o
M
t
s
e
T
Block Diagram
Power Groups
VDDREF, GNDREF= REF, X1, X2
VDDPCI, GNDPCI = PCICLK
VDD48, GND48 = 48MHz, PLL2
VDD3V66, GND3V66=3V66
VDDCPU, GNDCPU = CPUCLK
VDDMREF, GNDMREF=3VMREF, 3VMREF_B
VDDA=VDD (core supply voltage 3.3V)
GNDA=Ground for core supply
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
2
ICS9250-22
Third party brands and names are the property of their respective owners.
General Description
Pin Configuration
The ICS9250-22 is a single chip clock solution.
Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to
board design iterations or costly shielding. The ICS9250-22 employs a proprietary closed loop design, which tightly
controls the percentage of spreading over process and temperature variations.
R
E
B
M
U
N
N
I
P
E
M
A
N
N
I
P
E
P
Y
T
N
O
I
T
P
I
R
C
S
E
D
,
2
3
,
4
2
,
9
1
,
3
1
,
7
,
1
3
5
,
6
4
,
0
4
,
7
3
,
3
3
D
N
G
R
W
P
y
l
p
p
u
s
V
3
.
3
r
o
f
s
n
i
p
d
n
u
o
r
G
2
,
3
)
0
:
1
(
L
E
S
T
L
U
M
/
F
E
R
N
I
d
n
a
p
u
-
r
e
w
o
p
n
o
d
e
s
n
e
s
e
r
a
s
t
u
p
n
i
1
L
E
S
T
L
U
M
d
n
a
0
L
E
S
T
L
U
M
V
3
n
o
t
u
p
t
u
o
r
o
f
d
e
s
u
g
n
i
e
b
n
i
p
e
h
t
o
t
r
o
i
r
p
d
e
h
c
t
a
l
y
l
l
a
n
r
e
t
n
i
n
e
h
t
.
s
k
c
o
l
c
z
H
M
8
1
3
.
4
1
,
9
2
,
7
2
,
2
2
,
6
1
,
0
1
,
4
6
5
,
9
4
,
3
4
,
8
3
,
6
3
D
D
V
R
W
P
y
l
p
p
u
s
r
e
w
o
p
V
3
.
3
5
1
X
t
u
p
n
I
l
a
t
s
y
r
C
2
X
t
u
p
n
i
l
a
t
s
y
r
C
z
H
M
8
1
3
.
4
1
6
2
X
t
u
p
t
u
O
l
a
t
s
y
r
C
1
X
t
u
p
t
u
o
l
a
t
s
y
r
C
z
H
M
8
1
3
.
4
1
,
5
1
,
7
1
,
8
1
,
0
2
,
1
2
8
,
9
,
1
1
,
2
1
,
4
1
)
0
:
9
(
K
L
C
I
C
P
T
U
O
s
t
u
p
t
u
o
k
c
o
l
c
I
C
P
3
2
3
3
1
/
0
0
1
L
E
S
N
I
z
H
M
3
3
1
=
h
g
i
H
,
z
H
M
0
0
1
=
w
o
L
.
t
c
e
l
e
S
y
c
n
e
u
q
e
r
F
U
P
C
5
2
,
6
2
)
0
:
1
(
S
F
N
I
s
n
i
p
t
c
e
l
e
s
y
c
n
e
u
q
e
r
F
z
H
M
8
4
T
U
O
t
u
p
t
u
o
k
c
o
l
c
z
H
M
8
4
8
2
#
D
P
N
I
.
w
o
L
e
v
i
t
c
A
.
e
d
o
m
n
w
o
d
-
r
e
w
o
p
s
e
k
o
v
n
I
0
3
,
1
3
,
4
3
,
5
3
)
0
:
3
(
6
6
V
3
T
U
O
s
k
c
o
l
c
e
c
n
e
r
e
f
e
r
z
H
M
6
6
9
3
F
E
R
I
T
U
O
.
s
r
i
a
p
K
L
C
U
P
C
e
h
t
r
o
f
t
n
e
r
r
u
c
e
c
n
e
r
e
f
e
r
e
h
t
s
e
h
s
i
l
b
a
t
s
e
n
i
p
s
i
h
T
o
t
r
e
d
r
o
n
i
d
n
u
o
r
g
o
t
d
e
i
t
r
o
t
s
i
s
e
r
n
o
i
s
i
c
e
r
p
d
e
x
i
f
a
s
e
k
a
t
n
i
p
s
i
h
T
.
t
n
e
r
r
u
c
e
t
a
i
r
p
o
r
p
p
a
e
h
t
h
s
i
l
b
a
t
s
e
2
4
,
5
4
,
8
4
,
1
5
)
0
:
3
(
T
S
K
L
C
U
P
C
T
U
O
d
e
h
c
t
i
w
s
e
r
a
e
s
e
h
T
.
s
t
u
p
t
u
o
U
P
C
r
i
a
p
l
a
i
t
n
e
r
e
f
f
i
d
f
o
s
k
c
o
l
c
"
e
u
r
T
"
.
s
a
i
b
e
g
a
t
l
o
v
r
o
f
d
e
r
i
u
q
e
r
e
r
a
s
r
o
t
s
i
s
e
r
l
a
n
r
e
t
x
e
d
n
a
s
t
u
p
t
u
o
t
n
e
r
r
u
c
1
4
,
4
4
,
7
4
,
0
5
)
0
:
3
(
C
S
K
L
C
U
P
C
T
U
O
e
s
e
h
T
.
s
t
u
p
t
u
o
U
P
C
r
i
a
p
l
a
i
t
n
e
r
e
f
f
i
d
f
o
s
k
c
o
l
c
"
y
r
o
t
n
e
m
e
l
p
m
o
C
"
r
o
f
d
e
r
i
u
q
e
r
e
r
a
s
r
o
t
s
i
s
e
r
l
a
n
r
e
t
x
e
d
n
a
s
t
u
p
t
u
o
t
n
e
r
r
u
c
d
e
h
c
t
i
w
s
e
r
a
.
s
a
i
b
e
g
a
t
l
o
v
2
5
#
D
A
E
R
P
S
N
I
t
s
o
h
l
a
i
t
n
e
r
e
f
f
i
D
e
h
t
n
o
y
t
i
l
a
n
o
i
t
c
n
u
f
m
u
r
t
c
e
p
S
d
a
e
r
p
S
s
e
k
o
v
n
I
I
C
P
z
H
M
3
3
d
n
a
,
s
k
c
o
l
c
z
H
M
6
6
,
s
k
c
o
l
c
b
_
f
e
R
M
/
f
e
R
M
,
s
k
c
o
l
c
w
o
L
e
v
i
t
c
A
.
s
k
c
o
l
c
4
5
B
_
F
E
R
M
V
3
T
U
O
r
e
v
i
r
d
k
c
o
l
c
y
r
o
m
e
m
o
t
e
c
n
e
r
e
f
e
r
V
3
)
f
e
r
m
V
3
h
t
i
w
e
s
a
h
p
f
o
t
u
o
(
5
5
F
E
R
M
V
3
T
U
O
r
e
v
i
r
d
k
c
o
l
c
y
r
o
m
e
m
o
t
e
c
n
e
r
e
f
e
r
V
3
5
ICS9250-22
Third party brands and names are the property of their respective owners.
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND 0.5 V to V
DD
+0.5 V
Ambient Operating Temperature . . . . . . . . . . . . . 0C to +70C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 115C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . 65C to +150C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
T
A
= 0 - 70C; Supply Voltage V
DD
= 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input High Voltage
V
IH
2
V
DD
+0.3
V
Input Low Voltage
V
IL
V
SS
-0.3
0.8
V
Input High Current
I
IH
V
IN
= V
DD
-5
5
A
I
IL1
V
IN
= 0 V; Inputs with no pull-up resistors
-5
A
I
IL2
V
IN
= 0 V; Inputs with pull-up resistors
-200
Operating Supply
Current
I
DD3.3OP
C
L
= 0 pF; Select @ 100 MHz
130
250
mA
Powerdown Current
I
DD3.3PD
C
L
= 0 pF; Input address to VDD or GND
35
60
mA
Input Frequency
F
i
V
DD
= 3.3 V
14.318
MHz
Pin Inductance
L
pin
7
nH
C
IN
Logic Inputs
5
pF
C
OUT
Output pin capacitance
6
pF
C
INX
X1 & X2 pins
27
45
pF
Transition time
1
T
trans
To 1st crossing of target frequency
3
ms
Settling time
1
T
s
From 1st crossing to 1% target frequency
3
ms
Clk Stabilization
1
T
STAB
From V
DD
= 3.3 V to 1% target frequency
3
ms
t
PZH
,t
PZL
Output enable delay (all outputs)
1
10
ns
t
PHZ
,t
PLZ
Output disable delay (all outputs)
1
10
ns
1
Guaranteed by design, not 100% tested in production.
Delay
1
Input Capacitance
1
Input Low Current
PDF 
ZIP
