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Электронный компонент: 7025

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2000 Integrated Device Technology, Inc.
APRIL 2000
DSC 2683/8
1
IDT7025S/L
HIGH-SPEED
8K x 16 DUAL-PORT
STATIC RAM
Features
x
x
x
x
x
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
x
x
x
x
x
High-speed access
Military: 20/25/35/55/70ns (max.)
Industrial: 55ns (max.)
Commercial: 15/17/20/25/35/55ns (max.)
x
x
x
x
x
Low-power operation
IDT7025S
Active: 750mW (typ.)
Standby: 5mW (typ.)
IDT7025L
Active: 750mW (typ.)
Standby: 1mW (typ.)
x
x
x
x
x
Separate upper-byte and lower-byte control for multiplexed
bus compatibility
x
x
x
x
x
IDT7025 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
x
x
x
x
x
M/
S = H for BUSY output flag on Master
M/
S = L for BUSY input on Slave
x
x
x
x
x
Interrupt Flag
x
x
x
x
x
On-chip port arbitration logic
x
x
x
x
x
Full on-chip hardware support of semaphore signaling
between ports
x
x
x
x
x
Fully asynchronous operation from either port
x
x
x
x
x
Battery backup operation--2V data retention
x
x
x
x
x
TTL-compatible, single 5V (10%) power supply
x
x
x
x
x
Available in 84-pin PGA, Flatpack, PLCC, and 100-pin Thin
Quad Flatpack
x
x
x
x
x
Industrial temperature range (40C to +85C) is available
for selected speeds
Functional Block Diagram
NOTES:
1. (MASTER):
BUSY is output; (SLAVE): BUSY is input.
2.
BUSY outputs and INT outputs are non-tri-stated push-pull.
I/O
Control
Address
Decoder
MEMORY
ARRAY
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
Address
Decoder
I/O
Control
R/
W
L
BUSY
L
A
12L
A
0L
2683 drw 01
UB
L
LB
L
CE
L
OE
L
I/O
8L
-I/O
15L
I/O
0L
-I/O
7L
CE
L
OE
L
R/
W
L
SEM
L
INT
L
M/
S
R/
W
R
BUSY
R
UB
R
LB
R
CE
R
OE
R
I/O
8R
-I/O
15R
I/O
0R
-I/O
7R
A
12R
A
0R
R/
W
R
SEM
R
INT
R
CE
R
OE
R
(2)
(1,2)
(1,2)
(2)
13
13
6.42
IDT7025S/L
High-Speed 8K x 16 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
2
2683 drw 02
14
15
16
17
18
19
20
INDEX
21
22
23
24
11 10 9
8
7
6
5
4
3
2
1 84 83
33 34 35 36 37 38 39 40 41 42 43 44 45
V
CC
GND
I/O
8L
A
7L
13
12
25
26
27
28
29
30
31
32
46 47 48 49 50 51 52 53
72
71
70
69
68
67
66
65
64
63
62
73
74
61
60
59
58
57
56
55
54
82 81 80 79 78 77 76 75
GND
BUSY
L
GND
IDT7025J or F
J84-1
(4)
F84-2
(4)
84-Pin PLCC/Flatpack
Top View
(5)
INT
L
M/
S
INT
R
I/O
9L
I/O
10L
I/O
11L
I/O
12L
I/O
13L
I/O
14L
I/O
15L
I/O
0R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
6R
I/O
7R
I/O
8R
A
6L
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
BUSY
R
A
0R
A
2R
A
3R
A
4R
A
5R
A
6R
A
1R
I
/
O
7
L
I
/
O
6
L
I
/
O
5
L
I
/
O
4
L
I
/
O
3
L
I
/
O
2
L
V
C
C
R
/
W
L
S
E
M
L
C
E
L
U
B
L
L
B
L
A
1
1
L
G
N
D
I
/
O
1
L
I
/
O
0
L
A
1
0
L
A
9
L
A
8
L
O
E
L
I
/
O
9
R
I
/
O
1
0
R
I
/
O
1
1
R
I
/
O
1
2
R
I
/
O
1
3
R
I
/
O
1
4
R
G
N
D
I
/
O
1
5
R
G
N
D
A
1
1
R
A
1
0
R
A
9
R
A
8
R
A
7
R
O
E
R
R
/
W
R
C
E
R
U
B
R
L
B
R
A
1
2
R
A
1
2
L
S
E
M
R
Description
The IDT7025 is a high-speed 8K x 16 Dual-Port Static RAM. The
IDT7025 is designed to be used as a stand-alone 128K-bit Dual-Port RAM
or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more
word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach
in 32-bit or wider memory system applications results in full-speed, error-
free operation without the need for additional discrete logic.
This device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature controlled by Chip Enable (
CE) permits the on-chip circuitry of each
port to enter a very low standby power mode.
Fabricated using IDT's CMOS high-performance technology, these
devices typically operate on only 750mW of power. Low-power (L)
versions offer battery backup data retention capability with typical power
consumption of 500W from a 2V battery.
The IDT7025 is packaged in a ceramic 84-pin PGA, an 84-pin
Flatpack, PLCC, and a 100-pin TQFP. Military grade product is manu-
factured in compliance with the latest revision of MIL-PRF-38535 QML,
making it ideally suited to military temperature applications demanding the
highest level of performance and reliability.
Pin Configurations
(1,2,3)
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. J84-1 package body is approximately 1.15 in x 1.15 in x .17 in.
F84-2 package body is approximately 1.17 in x 1.17 in x .11 in.
PN100-1 package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Index
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
IDT7025PF
PN100-1
(4)
100-Pin TQFP
Top View
(5)
N/C
N/C
N/C
N/C
I/O
10L
I/O
11L
I/O
12L
I/O
13L
GND
I/O
14L
I/O
15L
V
CC
GND
I/O
0R
I/O
1R
I/O
2R
I/O
3R
V
CC
I/O
4R
I/O
5R
I/O
6R
N/C
N/C
N/C
N/C
2683 drw 03
N/C
N/C
N/C
N/C
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
INT
L
GND
M/
S
BUSY
R
INT
R
A
0R
N/C
N/C
N/C
N/C
BUSY
L
A
1R
A
2R
A
3R
A
4R
I
/
O
9
L
I
/
O
8
L
I
/
O
7
L
I
/
O
6
L
I
/
O
5
L
I
/
O
4
L
I
/
O
3
L
I
/
O
2
L
G
N
D
I
/
O
1
L
I
/
O
0
L
O
E
L
V
C
C
R
/
W
L
S
E
M
L
C
E
L
U
B
L
L
B
L
A
1
1
L
A
1
0
L
A
9
L
A
8
L
A
7
L
A
6
L
I
/
O
7
R
I
/
O
8
R
I
/
O
9
R
I
/
O
1
0
R
I
/
O
1
1
R
I
/
O
1
2
R
I
/
O
1
3
R
I
/
O
1
4
R
G
N
D
I
/
O
1
5
R
O
E
R
R
/
W
R
S
E
M
R
C
E
R
U
B
R
L
B
R
G
N
D
A
1
1
R
A
1
0
R
A
9
R
A
8
R
A
7
R
A
6
R
A
5
R
A
1
2
L
A
1
2
R
.
6.42
IDT7025S/L
High-Speed 8K x 16 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
3
Pin Names
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. Package body is approximately 1.12 in x 1.12 in x .16 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Pin Configurations
(1,2,3)
(con't.)
2683 drw 04
I/O
7L
63
61
60
58
55
54
51
48
46
45
66
67
69
72
75
76
79
81
82
83
1
2
5
7
8
11
10
12
14
17
20
23
26
28
29
32
31
33
35
38
41
43
IDT7025G
G84-3
(4)
84-Pin PGA
Top View
(5)
A
B
C
D
E
F
G
H
J
K
L
42
59
56
49
50
40
25
27
30
36
34
37
39
84
3
4
6
9
15
13
16
18
22
24
19
21
68
71
70
77
80
UB
R
CE
R
GND
11
10
09
08
07
06
05
04
03
02
01
64
65
62
57
53
52
47
44
73
74
78
GND
GND
R/
W
R
OE
R
LB
R
GND
GND
SEM
R
UB
L
CE
L
R/
W
L
OE
L
GND
SEM
L
V
CC
LB
L
INT
R
BUSY
R
BUSY
L
M/
S
INT
L
A
11L
Index
I/O
5L
I/O
4L
I/O
2L
I/O
0L
I/O
10L
I/O
8L
I/O
6L
I/O
3L
I/O
1L
I/O
11L
I/O
9L
I/O
13L
I/O
12L
I/O
15L
I/O
14L
I/O
0R
A
9L
A
10L
A
8L
A
7L
A
5L
A
6L
A
4L
A
3L
A
2L
A
0L
A
1L
A
0R
A
2R
A
1R
A
5R
A
3R
A
6R
A
4R
A
9R
A
7R
A
8R
A
10R
A
11R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
7R
I/O
6R
I/O
9R
I/O
8R
I/O
11R
I/O
10R
I/O
12R
I/O
13R
I/O
14R
I/O
15R
V
CC
A
12R
A
12L
Left Port
Right Port
Names
CE
L
CE
R
Chip Enable
R/
W
L
R/
W
R
Read/Write Enable
OE
L
OE
R
Output Enable
A
0L
- A
12L
A
0R
- A
12R
Address
I/O
0L
- I/O
15L
I/O
0R
- I/O
15R
Data Input/Output
SEM
L
SEM
R
Semaphore Enable
UB
L
UB
R
Upper Byte Select
LB
L
LB
R
Lower Byte Select
INT
L
INT
R
Interrupt Flag
BUSY
L
BUSY
R
Busy Flag
M/
S
Master or Slave Select
V
CC
Power
GND
Ground
2683 tbl 01
6.42
IDT7025S/L
High-Speed 8K x 16 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
4
NOTES:
1. There are eight semaphore flags written to via I/O
0
and read from I/O
0
- I/O
15.
These eight semaphores are addressed by A
0
- A
2
.
Truth Table I: Non-Contention Read/Write Control
Truth Table II: Semaphore Read/Write Control
(1)
NOTE:
1. A
0L
-- A
12L
A
0R
-- A
12R.
Inputs
(1)
Outputs
Mode
CE
R/
W
OE
UB
LB
SEM
I/O
8-15
I/O
0-7
H
X
X
X
X
H
High-Z
High-Z
Deselected
X
X
X
H
H
H
High-Z
High-Z
Both Bytes Deselected
L
L
X
L
H
H
DATA
IN
High-Z
Write to Upper Byte Only
L
L
X
H
L
H
High-Z
DATA
IN
Write to Lower Byte Only
L
L
X
L
L
H
DATA
IN
DATA
IN
Write to Both Bytes
L
H
L
L
H
H
DATA
OUT
High-Z
Read Upper Byte Only
L
H
L
H
L
H
High-Z
DATA
OUT
Read Lower Byte Only
L
H
L
L
L
H
DATA
OUT
DATA
OUT
Read Both Bytes
X
X
H
X
X
X
High-Z
High-Z
Outputs Disabled
2683 tbl 02
Inputs
Outputs
Mode
CE
R/
W
OE
UB
LB
SEM
I/O
8-15
I/O
0-7
H
H
L
X
X
L
DATA
OUT
DATA
OUT
Read Semaphore Flag Data Out
X
H
L
H
H
L
DATA
OUT
DATA
OUT
Read Semaphore Flag Data Out
H
X
X
X
L
DATA
IN
DATA
IN
Write I/O
0
into Semaphore Flag
X
X
H
H
L
DATA
IN
DATA
IN
Write I/O
0
into Semaphore Flag
L
X
X
L
X
L
____
____
Not Allowed
L
X
X
X
L
L
____
____
Not Allowed
2683 tbl 03
6.42
IDT7025S/L
High-Speed 8K x 16 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
5
Recommended DC Operating
Conditions
Maximum Operating Temperature
and Supply Voltage
(1,2)
Capacitance
(1)
(T
A
= +25C, f = 1.0mhz)
Absolute Maximum Ratings
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect
reliability.
2. V
TERM
must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns
maximum, and is limited to < 20 mA for the period over V
TERM
> Vcc + 10%.
NOTES:
1. This is parameter T
A
.
2. Industrial temperature: for other speeds, packages and powers contact your
sales office.
NOTES:
1. V
I
L
> -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 10%.
NOTES:
1. This parameter is determined by device characterization but is not production
tested. For TQFP package only.
2. 3dV references the interpolated capacitance when the input and output signals
switch from 0V to 3V or from 3V to 0V.
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(V
CC
= 5.0V 10%)
NOTE:
1. At Vcc < 2.0V input leakages are undefined.
Symbol
Rating
Commercial
& Industrial
Military
Unit
V
TERM
(2)
Terminal Voltage
with Respect
to GND
-0.5 to +7.0
-0.5 to +7.0
V
T
BIAS
Temperature
Under Bias
-55 to +125
-65 to +135
o
C
T
STG
Storage
Temperature
-55 to +125
-65 to +150
o
C
I
OUT
DC Output
Current
50
50
mA
2683 tbl 04
Grade
Ambient Temperature
GND
Vcc
Military
-55
O
C to +125
O
C
0V
5.0V
+
10%
Commercial
0
O
C to +70
O
C
0V
5.0V
+
10%
Industrial
-40
O
C to +85
O
C
0V
5.0V
+
10%
2683 tbl 05
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
____
6.0
(2)
V
V
IL
Input Low Voltage
-0.5
(1)
____
0.8
V
2683 tbl 06
Symbol
Parameter
Conditions
(2)
Max.
Unit
C
IN
Input Capacitance
V
IN
= 3dV
9
pF
C
OUT
Output Capacitance
V
OUT
= 3dV
10
pF
2683 tbl 07
Symbol
Parameter
Test Conditions
7025S
7025L
Unit
Min.
Max.
Min.
Max.
|I
LI
|
Input Leakage Current
(1)
V
CC
= 5.5V, V
IN
= 0V to V
CC
___
10
___
5
A
|I
LO
|
Output Leakage Current
V
OUT
= 0V to V
CC
___
10
___
5
A
V
OL
Output Low Voltage
I
OL
= +4mA
___
0.4
___
0.4
V
V
OH
Output High Voltage
I
OH
= -4mA
2.4
___
2.4
___
V
2683 tbl 08