1
JUNE 1999
DSC-2720/9
IDT7134SA/LA
HIGH-SPEED
4K x 8 DUAL-PORT
STATIC SRAM
Features
x
x
x
x
x
High-speed access
Military: 25/35/45/55/70ns (max.)
Industrial: 55ns (max.)
Commercial: 20/25/35/45/55/70ns (max.)
x
x
x
x
x
Low-power operation
IDT7134SA
Active: 700mW (typ.)
Standby: 5mW (typ.)
IDT7134LA
Active: 700mW (typ.)
Standby: 1mW (typ.)
x
x
x
x
x
Fully asynchronous operation from either port
x
x
x
x
x
Battery backup operation2V data retention
x
x
x
x
x
TTL-compatible; single 5V (10%) power supply
x
x
x
x
x
Available in 48-pin DIP, LCC, Flatpack and 52-pin PLCC
x
x
x
x
x
Military product compliant to MIL-PRF-38535 QML
x
x
x
x
x
Industrial temperature range (40C to +85C) is available for
selected speeds
Functional Block Diagram
COLUMN
I/O
COLUMN
I/O
MEMORY
ARRAY
LEFT SIDE
ADDRESS
DECODE
LOGIC
RIGHT SIDE
ADDRESS
DECODE
LOGIC
R/
W
L
OE
L
A
0L
- A
11L
I/O
0L
- I/O
7L
2720 drw 01
CE
L
A
0R
- A
11R
I/O
0R
- I/O
7R
OE
R
CE
R
R/
W
R
Description
The IDT7134 is a high-speed 4K x 8 Dual-Port Static RAM
designed to be used in systems where on-chip hardware port arbitration
is not needed. This part lends itself to those systems which cannot
tolerate wait states or are designed to be able to externally arbitrate or
withstand contention when both sides simultaneously access the
same Dual-Port RAM location.
The IDT7134 provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access
for reads or writes to any location in memory. It is the users responsibility
to ensure data integrity when simultaneously accessing the same
memory location from both ports. An automatic power down feature,
controlled by CE, permits the on-chip circuitry of each port to enter a
very low standby power mode.
Fabricated using IDTs CMOS high-performance technology, these
Dual-Port typically operate on only 700mW of power. Low-power (LA)
versions offer battery backup data retention capability, with each port
typically consuming 200W from a 2V battery.
The IDT7134 is packaged on either a sidebraze or plastic 48-pin
DIP, 48-pin LCC, 52-pin PLCC and 48-pin Flatpack. Military grade
product is manufactured in compliance with the latest revision of MIL-
PRF-38535 QML, making it ideally suited to military temperature
applications demanding the highest level of performance and reliability.
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges
2
Pin Configurations
(1,2,3)
NOTES:
1. All V
CC
pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. P48-1 package body is approximately .55 in x .61 in x .19 in.
C48-2 package body is approximately .62 in x 2.43 in x .15 in.
J52-1 package body is approximately .75 in x .75 in x .17 in.
L48-1 package body is approximately .57 in x .57 in x .68 in.
F48-1 package body is approxiamtely .75 in x .75 in x .11 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of actual part-marking.
A
10R
2720 drw 02
I/O
0R
I/O
1R
I/O
2R
I/O
3R
I/O
4R
I/O
5R
I/O
6R
I/O
7R
A
9R
A
8R
A
7R
A
6R
A
4R
A
3R
A
2R
A
1R
A
0R
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A
0L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
I/O
3L
I/O
4L
I/O
5L
I/O
6L
I/O
7L
IDT7134P or C
P48-1
(4)
&
C48-2
(4)
48-Pin
Top
View
(5)
CE
L
R/
W
L
OE
L
V
CC
A
5R
R
OE
A
11R
R/
W
R
CE
R
A
11L
A
10L
GND
,
2720 drw 03
IDT7134J
J52-1
(4)
52-Pin
PLCC
Top View
(5)
INDEX
N
/
C
G
N
D
I
/
O
4
L
I
/
O
5
L
I
/
O
6
L
I
/
O
7
L
I
/
O
0
R
I
/
O
1
R
I
/
O
2
R
I
/
O
3
R
I
/
O
4
R
I
/
O
5
R
I
/
O
6
R
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
N/C
I/O
7R
46
45
44
43
42
41
40
39
38
37
36
35
34
I/O
3L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
8
9
10
11
12
13
14
15
16
17
18
19
20
47
48
49
50
51
52
1
2
3
4
5
6
7
33
32
31
30
29
28
27
26
25
24
23
22
21
A
0
L
V
C
C
O
E
L
R
/
W
L
C
E
R
R
/
W
R
C
E
L
A
1
0
L
A
1
1
L
A
1
1
R
A
1
0
R
N
/
C
N
/
C
2720 drw 04
IDT7134L48 or F
L48-1
(4)
&
F48-1
(4)
48-Pin LCC/Flatpack
Top View
(5)
INDEX
6 5
4
3
2
1
48 47 46 45 44 43
19 20 21 22 23
25 26 27 28 29 30
24
G
N
D
I
/
O
3
L
I
/
O
4
L
I
/
O
5
L
I
/
O
6
L
I
/
O
0
R
I
/
O
1
R
I
/
O
2
R
I
/
O
3
R
I
/
O
4
R
I
/
O
5
R
I
/
O
7
L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
I/O
2L
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
6R
I/O
7R
42
41
40
39
38
37
36
35
34
33
32
31
7
8
9
10
11
12
13
14
15
16
17
18
A
0
L
V
C
C
O
E
L
R
/
W
L
C
E
R
R
/
W
R
C
E
L
O
E
R
A
1
0
L
A
1
1
L
A
1
1
R
A
1
0
R
,
3
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges
Capacitance
(1)
(T
A
= +25C, f = 1.0MHz)
Absolute Maximum Ratings
(1)
Recommended Operating
Temperature and Supply Voltage
(1,2)
Recommended DC Operating
Conditions
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(V
CC
= 5V 10%)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. V
TERM
must not exceed Vcc + 10% for more than 25%of the cycle time or 10 ns
maximum, and is limited to < 20mA for the period of V
TERM
> Vcc +10%.
3. V
TERM
= 5.5V.
NOTES:
1. This parameter is determined by device characterization but is not production
tested.
2. 3dV references the interpolated capacitance when the input and output signals
switch from 0V to 3V and from 3V to 0V.
NOTES:
1. This is the parameter T
A
.
2. Industrial temperature: for specific speeds, packages and powers contact your
sales office.
NOTES:
1. V
IL
(min.) > -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 10%.
NOTES:
1. At Vcc < 2.0V input leakages are undefined.
Symbol
Rating
Commercial
& Industrial
Military
Unit
V
TERM
(2)
Terminal Voltage
with Respect
to GND
-0.5 to +7.0
-0.5 to +7.0
V
T
BIAS
Temperature
Under Bias
-55 to +125
-65 to +135
o
C
T
STG
Storage
Temperature
-55 to +125
-65 to +150
o
C
P
T
(3)
Power
Dissipation
1.5
1.5
W
I
OUT
DC Output
Current
50
50
mA
2720 tbl 01
Grade
Ambient
Temperature
GND
Vcc
Military
-55
O
C to +125
O
C
0V
5.0V
+
10%
Commercial
0
O
C to +70
O
C
0V
5.0V
+
10%
Industrial
-40
O
C to +85
O
C
0V
5.0V
+
10%
2720 tbl 03
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
____
6.0
(2)
V
V
IL
Input Low Voltage
-0.5
(1)
____
0.8
V
2720 tbl 04
Symbol
Parameter
Conditions
(2)
Max. Unit
C
IN
Input Capacitance
V
IN
= 3dV
11
pF
C
OUT
Output Capacitance
V
OUT
= 3dV
11
pF
2720 tbl 02
Symbol
Parameter
Test Conditions
7134SA
7134LA
Unit
Min.
Max.
Min.
Max.
|I
LI
|
Input Leakage Current
(1)
V
CC
= 5.5V, V
IN
= 0V to V
CC
___
10
___
5
A
|I
LO
|
Output Leakage Current
CE
- V
IH
, V
OUT
= 0V to V
CC
___
10
___
5
A
V
OL
Output Low Voltage
I
OL
= 6mA
___
0.4
___
0.4
V
I
OL
= 8mA
___
0.5
___
0.5
V
V
OH
Output High Voltage
I
OH
= -4mA
2.4
___
2.4
___
V
2720 tbl 05
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges
4
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(1,2,4)
(V
CC
= 5.0V 10%)
NOTES:
1. 'X' in part number indicates power rating (SA or LA).
2. V
CC
= 5V, T
A
= +25C for typical, and parameters are not production tested.
3. f
MAX
= 1/t
RC
= All inputs cycling at f = 1/t
RC
(except Output Enable). f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby I
SB3.
4. Industrial temperature: for other speeds, packages and powers contact your sales office.
7134X20
Com'l Only
7134X25
Com'l &
Military
7134X35
Com'l &
Military
Symbol
Parameter
Test Condition
Version
Typ.
Max.
Typ.
Max.
Typ.
Max.
Unit
I
CC
Dynamic Operating
Current
(Both Ports Active)
CE
= V
IL
Outputs Open
f = f
MAX
(3)
COM'L
SA
LA
170
170
280
240
160
160
280
220
150
150
260
210
mA
MIL &
IND
SA
LA
____
____
____
____
160
160
310
260
150
150
300
250
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
and CE
R
= V
IH
f = f
MAX
(3)
COM'L
SA
LA
25
25
100
80
25
25
80
50
25
25
75
45
mA
MIL &
IND
SA
LA
____
____
____
____
25
25
100
80
25
25
75
55
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and CE
"B"
= V
IH
Active Port Outputs Open,
f=f
MAX
(3)
COM'L
SA
LA
105
105
180
150
95
95
180
140
85
85
170
130
mA
MIL &
IND
SA
LA
____
____
____
____
95
95
210
170
85
85
200
160
I
SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
Both Ports CE
L
and
CE
R
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(3)
COM'L
SA
LA
1.0
0.2
15
4.5
1.0
0.2
15
4.0
1.0
0.2
15
4.0
mA
MIL &
IND
SA
LA
____
____
____
____
1.0
0.2
30
10
1.0
0.2
30
10
I
SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
One Port CE
"A"
or
CE
"B"
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Open,
f = f
MAX
(3)
COM'L
SA
LA
105
105
170
130
95
95
170
120
85
85
160
110
mA
MIL &
IND
SA
LA
____
____
____
____
95
95
210
150
85
85
190
130
2720 tbl 06a
7134X45
Com'l &
Military
7134X55
Com'l, Ind
& Military
7134X70
Com'l &
Military
Symbol
Parameter
Test Condition
Version
Typ.
Max.
Typ.
Max.
Typ.
Max.
Unit
I
CC
Dynamic Operating
Current
(Both Ports Active)
CE
= V
IL
Outputs Open
f = f
MAX
(3)
COM'L
SA
LA
140
140
240
200
140
140
240
200
140
140
240
200
mA
MIL &
IND
SA
LA
140
140
280
240
140
140
270
220
140
140
270
220
I
SB1
Standby Current
(Both Ports - TTL
Level Inputs)
CE
L
and CE
R
= V
IH
f = f
MAX
(3)
COM'L
SA
LA
25
25
70
40
25
25
70
40
25
25
70
40
mA
MIL &
IND
SA
LA
25
25
70
50
25
25
70
50
25
25
70
50
I
SB2
Standby Current
(One Port - TTL
Level Inputs)
CE
"A"
= V
IL
and CE
"B"
= V
IH
Active Port Outputs Open,
f=f
MAX
(3)
COM'L
SA
LA
75
75
160
130
75
75
160
130
75
75
160
130
mA
MIL &
IND
SA
LA
75
75
190
150
75
75
180
150
75
75
180
150
I
SB3
Full Standby Current
(Both Ports -
CMOS Level Inputs)
Both Ports CE
L
and
CE
R
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or
V
IN
< 0.2V, f = 0
(3)
COM'L
SA
LA
1.0
0.2
15
4.0
1.0
0.2
15
4.0
1.0
0.2
15
4.0
mA
MIL &
IND
SA
LA
1.0
0.2
30
10
1.0
0.2
30
10
1.0
0.2
30
10
I
SB4
Full Standby Current
(One Port -
CMOS Level Inputs)
One Port CE
"A"
or
CE
"B"
> V
CC
- 0.2V
V
IN
> V
CC
- 0.2V or V
IN
< 0.2V
Active Port Outputs Open,
f = f
MAX
(3)
COM'L
SA
LA
75
75
150
100
75
75
150
100
75
75
150
100
mA
MIL &
IND
SA
LA
75
75
180
120
75
75
170
120
75
75
170
120
2720 tbl 06b
5
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM Military, Industrial and Commercial Temperature Ranges
V
CC
CE
DATA RETENTION MODE
4.5V
4.5V
V
DR
2V
V
DR
V
IH
V
IH
t
CDR
t
R
2720 drw 05
Data Retention Characteristics Over All Temperature Ranges
(LA Version Only) V
LC
= 0.2V, V
HC
= V
CC
- 0.2V
Data Retention Waveform
AC Test Conditions
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(for t
LZ
, t
HZ
, t
WZ
, t
OW
)
*Including scope and jig
+5V
1250
30pF
775
DATA
OUT
2720 drw 06
,
+5V
1250
5pF *
775
DATA
OUT
2720 drw 07
,
NOTES:
1. V
CC
= 2V, T
A
= +25C, and are not production tested.
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization, but not production tested.
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
Figures 1 and 2
2720 tbl 08
Symbol
Parameter
Test Condition
Min.
Typ.
(1)
Max.
Unit
V
DR
V
CC
for Data Retention
V
CC
= 2V
2.0
___
___
V
I
CCDR
Data Retention Current
CE
> V
HC
V
IN
> V
HC
or < V
LC
MIL. & IND.
___
100
4000
A
COM'L.
___
100
1500
t
CDR
(3)
Chip Deselect to Data Retention Time
0
___
___
ns
t
R
(3)
Operation Recovery Time
t
RC
(2)
___
___
ns
2720 tbl 07
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