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Электронный компонент: 74FCT163952

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IDT74FCT163952A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
APRIL 2002
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2002 Integrated Device Technology, Inc.
DSC-3096/1
FEATURES:
0.5 MICRON CMOS Technology
Typical t
SK(o)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
V
CC
= 3.3V 0.3V, Normal Range, or V
CC
= 2.7V to 3.6V, Extended
Range
CMOS power levels (0.4
W typ. static)
Rail-to-rail output swing for increased noise margin
Low Ground Bounce (0.3V typ.)
Inputs (except I/O) can be driven by 3.3V or 5V components
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74FCT163952A/C
3.3V CMOS 16-BIT
REGISTERED
TRANSCEIVER
DESCRIPTION:
The FCT163952 16-bit registered transceiver is built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit D-type registered transceivers with
separate input and output control for independent control of data flow in either
direction. For example, the A-to-B Enable (xCEAB) must be LOW to enter
data from the A port. xCLKAB controls the clocking function. When xCLKAB
toggles from low-to-high, the data present on the A port will be clocked into
the register. xOEAB performs the output enable function on the B port. Data
flow from the B port to A port is similar but requires using xCEBA, xCLKBA,
and xOEBA inputs. Full 16-bit operation is achieved by tying the control pins
of the independent transceivers together.
The FCT163952 has series current limiting resistors. These offer low
ground bounce, minimal undershoot, and controlled output fall times
reducing the need for external series terminating resistors.
1
OEAB
1
CEBA
1
CLKBA
1
OEBA
1
CEAB
1
CLKAB
1
A
1
1
B
1
TO SEVEN OTHER CHANNELS
D
C
D
C
CE
CE
2
OEAB
2
CEBA
2
CLKBA
2
OEBA
2
CEAB
2
CLKAB
2
A
1
2
B
1
TO SEVEN OTHER CHANNELS
D
C
D
C
CE
CE
54
55
1
3
2
56
5
52
31
30
28
26
27
29
15
42
2
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT163952A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
Symbol
Description
Max
Unit
V
TERM
(2)
Terminal Voltage with Respect to GND
0.5 to +4.6
V
V
TERM
(3)
Terminal Voltage with Respect to GND
0.5 to 7
V
V
TERM
(4)
Terminal Voltage with Respect to GND
0.5 to V
CC
+0.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
60 to +60
mA
ABSOLUTE MAXIMUM RATINGS
(1)
(1)
(1)
(1)
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Outputs and I/O terminals.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
3.5
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
3.5
8
pF
CAPACITANCE
(T
A
= +25C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
1
B
1
1
B
2
GND
1
B
3
1
B
4
V
CC
1
B
5
1
B
6
1
OEBA
1
B
7
1
B
8
2
B
1
2
B
2
GND
2
B
3
2
B
4
V
CC
2
B
5
GND
1
CLKBA
2
B
7
2
B
6
2
B
8
GND
2
CLKBA
2
OEBA
1
CLKAB
GND
1
A
1
1
A
2
V
CC
1
A
3
1
A
4
GND
1
A
5
1
A
6
1
A
7
1
A
8
GND
2
A
1
2
A
2
V
CC
2
A
3
2
A
5
2
A
4
2
A
7
GND
2
A
8
2
CLKAB
2
A
6
1
OEAB
1
CEAB
2
OEAB
2
CEAB
2
CEBA
1
CEBA
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
32
25
26
27
28
PIN DESCRIPTION
Pin Names
Description
xOEAB
A-to-B Output Enable Input (Active LOW)
xOEBA
B-to-A Output Enable Input (Active LOW)
xCEAB
A-to-B Clock Enable Input (Active LOW)
xCEBA
B-to-A Clock Enable Input (Active LOW)
xCLKAB
A-to-B Clock Input
xCLKBA
B-to-A Clock Input
xAx
A-to-B Data Inputs or B-to-A 3-State Outputs
xBx
B-to-A Data Inputs or A-to-B 3-State Outputs
NOTES:
1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA,
and xOEBA.
2. Level of B before the indicated steady-state input conditions were established.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
= LOW-to-HIGH Transition
Z = High-impedance
FUNCTION TABLE
(1,3)
Inputs
Outputs
xCEAB
xCLKAB
xOEAB
xAx
xBx
H
X
L
X
B
(2)
X
L
L
X
B
(2)
L
L
L
L
L
L
H
H
X
X
H
X
Z
3
IDT74FCT163952A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level (Input pins)
Guaranteed Logic HIGH Level
2
--
5.5
V
Input HIGH Level (I/O pins)
2
--
V
CC
+0.5
V
IL
Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level
0.5
--
0.8
V
I
IH
Input HIGH Current (Input pins)
V
CC
= Max.
V
I
= 5.5V
--
--
1
Input HIGH Current (I/O pins)
V
I
= V
CC
--
--
1
A
I
IL
Input LOW Current (Input pins)
V
I
= GND
--
--
1
Input LOW Current (I/O pins)
V
I
= GND
--
--
1
I
OZH
High Impedance Output Current
V
CC
= Max.
V
O
= V
CC
--
--
1
A
I
OZL
(3-State Output pins)
V
O
= GND
--
--
1
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
--
0.7
1.2
V
I
ODH
Output HIGH Current
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
36
60
110
mA
I
ODL
Output LOW Current
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
50
90
200
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
I
OH
= 0.1mA
V
CC
-0.2
--
--
V
IN
= V
IH
or V
IL
I
OH
= 3mA
2.4
3
--
V
V
CC
= 3V
I
OH
= 8mA
2.4
(5)
3
--
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
V
CC
= Min.
I
OL
= 0.1mA
--
--
0.2
V
IN
= V
IH
or V
IL
I
OL
= 16mA
--
0.2
0.4
I
OL
= 24mA
--
0.3
0.55
V
V
CC
= 3V
I
OL
= 24mA
--
0.3
0.5
V
IN
= V
IH
or V
IL
I
OS
Short Circuit Current
(4)
V
CC
= Max., V
O
= GND
(3)
60
135
240
mA
V
H
Input Hysteresis
--
--
150
--
mV
I
CCL
Quiescent Power Supply Current
V
CC
= Max.
--
0.1
10
A
I
CCH
V
IN
= GND or V
CC
I
CCZ
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= 40C to +85C, V
CC
= 2.7V to 3.6V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= V
CC
0.6V at rated current.
4
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT163952A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply Current
V
CC
= Max.
--
2
100
A
TTL Inputs HIGH
V
IN
= V
CC
- 0.6V
(3)
I
CCD
Dynamic Power Supply
V
CC
= Max.
V
IN
= V
CC
--
60
100
A/
Current
(4)
Outputs Open
V
IN
= GND
MHz
xOEAB or xOEBA = GND
One Input Togging
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.,Outputs Open
V
IN
= V
CC
--
0.6
1
mA
f
CP
= 10MHz (xCLKAB)
V
IN
= GND
50% Duty Cycle
xOEAB = xCEAB = GND
V
IN
= V
CC
- 0.6V
--
0.6
1.1
xOEBA = V
CC
V
IN
= GND
One Bit Toggling
f
i
= 5MHz
50% Duty Cycle
V
CC
= Max.,Outputs Open
V
IN
= V
CC
--
2
3
(5)
f
CP
= 10MHz (xCLKAB)
V
IN
= GND
50% Duty Cycle
xOEAB = xCEAB = GND
xOEBA = V
CC
V
IN
= V
CC
- 0.6V
--
2
3.3
(5)
Sixteen BitsTogging
V
IN
= GND
f
i
= 2.5MHz
50% Duty Cycle
POWER SUPPLY CHARACTERISTICS
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25C ambient.
3. Per TTL driven input. All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
I
CC
= Power Supply Current for a TTL High Input
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
fi = Input Frequency
Ni = Number of Inputs at fi
5
IDT74FCT163952A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
FCT163952A
FCT163952C
Symbol
Parameter
Condition
(2)
Min.
(3)
Max.
Min.
(3)
Max.
Unit
t
PLH
Propagation Delay
C
L
= 50pF
2
10
2
6.3
ns
t
PHL
xCLKAB, xCLKBA to xBx, xAx
R
L
= 500
t
PZH
Output Enable Time
1.5
10.5
1.5
7
ns
t
PZL
xOEBA, xOEAB to xAx, xBx
t
PHZ
Output Disable Time
1.5
10
1.5
6.5
ns
t
PLZ
xOEBA, xOEAB to xAx, xBx
t
SU
Set-up Time HIGH or LOW
2.5
--
2.5
--
ns
xAx, xBx to xCLKAB, xCLKBA
t
H
Hold Time HIGH or LOW
2
--
1.5
--
ns
xAx, xBx to xCLKAB, xCLKBA
t
SU
Set-up Time HIGH or LOW
3
--
3
--
ns
xCEAB, xCEBA to xCLKAB, xCLKBA
t
H
Hold Time HIGH or LOW
2
--
2
--
ns
xCEAB, xCEBA to xCLKAB, xCLKBA
t
W
Pulse Width HIGH or LOW
3
--
3
--
ns
xCLKAB or xCLKBA
(3)
t
SK
(o)
Output Skew
(4)
--
0.5
--
0.5
ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(1)
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
4. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
6
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT163952A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
Open
GND
6v
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
SU
t
H
t
REM
t
SU
t
H
PRESET
CLEAR
CLOCK ENABLE
ETC.
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
V
OL
CONTROL
INPUT
3V
1.5V
0V
3V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
6V
SWITCH
GND
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3V
0V
1.5V
1.5V
ENABLE
DISABLE
V
OH
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-up, Hold, and Release Times
Pulse Width
Test
Switch
Open Drain
Disable Low
6V
Enable Low
Disable High
GND
Enable High
All Other Tests
Open
SWITCH POSITION
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
1.0MHz; t
F
2.5ns; t
R
2.5ns.
3. if V
CC
is below 3V, input voltage swings should be adjusted not to exceed V
CC
.
7
IDT74FCT163952A/C
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
XX
Temp. Range
XXXX
Device Type
X
Package
PV
PA
Shrink Small Outline Package
Thin Shrink Small Outline Package
952A
952C
Non-Inverting 16-Bit Registered Transceiver
- 40C to +85C
74
IDT
FCT
XXX
Family
163
Double-Density 3.3Volt
ORDERING INFORMATION
CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
2975 Stender Way
800-345-7015 or 408-727-6116
logichelp@idt.com
Santa Clara, CA 95054
fax: 408-492-8674
(408) 654-6459
www.idt.com
4/19/2002 Removed B speed grade
DATA SHEET DOCUMENT HISTORY