INDUSTRIAL TEMPERATURE RANGE
IDT74FCT534AT/CT
FAST CMOS OCTAL D REGISTER (3-STATE)
1
AUGUST 2000
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2000 Integrated Device Technology, Inc.
DSC-5493/3
FEATURES:
A and C grades
Low input and output leakage
1A (max.)
CMOS power levels
True TTL input and output compatibility:
V
OH
= 3.3V (typ.)
V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Power off disable outputs permit "live insertion"
Available in SOIC and QSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74FCT534AT/CT
FAST CMOS OCTAL D
REGISTER (3-STATE)
DESCRIPTION:
The FCT534T is an 8-bit register built using an advanced dual metal
CMOS technology. These registers consist of eight D-type flip-flops with a
buffered common clock and buffered 3-state output control. When the output
enable (OE) input is low, the eight outputs are enabled. When the OE input
is high, the outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the Q outputs on the low-to-high transition of the clock input.
D
0
Q
0
D
1
Q
1
D
2
Q
2
D
3
Q
3
D
4
Q
4
D
5
Q
5
D
6
Q
6
D
7
Q
7
C P
O E
D
Q
C P
D
C P
D
CP
D
C P
D
C P
D
CP
D
CP
D
C P
Q
Q
Q
Q
Q
Q
Q
INDUSTRIAL TEMPERATURE RANGE
2
IDT74FCT534AT/CT
FAST CMOS OCTAL D REGISTER (3-STATE)
PIN CONFIGURATION
Symbol
Description
Max
Unit
V
TERM
(2)
Terminal Voltage with Respect to GND
0.5 to +7
V
V
TERM
(3)
Terminal Voltage with Respect to GND
0.5 to V
CC
+0.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
60 to +120
mA
ABSOLUTE MAXIMUM RATINGS
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
10
pF
C
OUT
Output Capacitance
V
OUT
= 0V
8
12
pF
CAPACITANCE
(T
A
= +25C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
SOIC/ QSOP
TOP VIEW
Pin Names
Description
Dx
D Flip-Flop Data Inputs
C P
Clock Pulse for the Register. Enters data on LOW-to-
HIGH transition
Qx
3-State Outputs (TRUE)
Q x
3-State Outputs (INVERTED)
OE
Active LOW 3-State Output Enable Input
PIN DESCRIPTION
2
3
1
16
15
14
11
19
18
20
17
13
12
V
CC
Q
7
Q
6
D
7
D
6
Q
5
Q
4
D
5
D
4
CP
5
6
7
4
8
9
10
D
1
Q
0
D
0
Q
1
D
3
Q
2
D
2
Q
3
GND
OE
NOTE:
1. H = HIGH Voltage Level
X = Don't Care
L = LOW Voltage Level
Z = High Impedance
NC = No Change
= LOW-to-HIGH transition
FUNCTION TABLE
(1)
Inputs
Outputs
Internal
Function
OE
CP
Dx
Qx
Qx
High-Z
H
L
X
Z
N C
H
H
X
Z
N C
Load
L
L
H
L
Register
L
H
L
H
H
L
Z
L
H
H
Z
H
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT534AT/CT
FAST CMOS OCTAL D REGISTER (3-STATE)
3
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level
Guaranteed Logic HIGH Level
2
--
--
V
V
IL
Input LOW Level
Guaranteed Logic LOW Level
--
--
0.8
V
I
IH
Input HIGH Current
(4)
V
CC
= Max.
V
I
= 2.7V
--
--
1
A
I
IL
Input LOW Current
(4)
V
CC
= Max.
V
I
= 0.5V
--
--
1
A
I
OZH
High Impedance Output Current
V
CC
= Max.
V
I
= 2.7V
--
--
1
A
I
OZL
(3-State Output Pins)
(4)
V
I
= 0.5V
--
--
1
I
I
Input HIGH Current
(4)
V
CC
= Max., V
I
= V
CC
(Max.)
--
--
1
A
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
--
0.7
1.2
V
V
H
Input Hysteresis
--
--
200
--
mV
I
CC
Quiescent Power Supply Current
V
CC
= Max.
--
0.01
1
A
V
IN
= GND or V
CC
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= 40C to +85C, V
CC
= 5.0V 5%
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is 5A at T
A
= 55C.
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min
I
OH
= 8mA
2.4
3.3
--
V
V
IN
= V
IH
or V
IL
I
OH
= 15mA
2
3
--
V
OL
Output LOW Voltage
V
CC
= Min
I
OL
= 48mA
--
0.3
0.5
V
V
IN
= V
IH
or V
IL
I
OS
Short Circuit Current
V
CC
= Max., V
O
= GND
(3)
60
120
225
mA
OUTPUT DRIVE CHARACTERISTICS
INDUSTRIAL TEMPERATURE RANGE
4
IDT74FCT534AT/CT
FAST CMOS OCTAL D REGISTER (3-STATE)
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply Current
V
CC
= Max.
--
0.5
2
mA
TTL Inputs HIGH
V
IN
= 3.4V
(3)
I
CCD
Dynamic Power Supply
V
CC
= Max.
V
IN
= V
CC
--
0.15
0.25
mA/
Current
(4)
Outputs Open
V
IN
= GND
MHz
OE = GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
V
IN
= V
CC
--
1.5
3.5
mA
Outputs Open
V
IN
= GND
f
CP
= 10MHz
50% Duty Cycle
OE = GND
V
IN
= 3.4V
--
2
5.5
fi = 5MHz
V
IN
= GND
50% Duty Cycle
One Bit Toggling
V
CC
= Max.
V
IN
= V
CC
--
3.8
7.3
(5)
Outputs Open
V
IN
= GND
f
CP
= 10MHz
50% Duty Cycle
OE = GND
V
IN
= 3.4V
--
6
16.3
(5)
Eight Bits Toggling
V
IN
= GND
fi = 2.5MHz
50% Duty Cycle
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
i
N
i
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Output Frequency
N
i
= Number of Outputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
POWER SUPPLY CHARACTERISTICS
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT534AT/CT
FAST CMOS OCTAL D REGISTER (3-STATE)
5
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
FCT534AT
FCT534CT
Symbol
Parameter
Condition
(1)
Min.
(2)
Max.
Min.
(2)
Max.
Unit
t
PLH
Propagation Delay
C
L
= 50pF
2
6.5
2
5.2
ns
t
PHL
CP to Qx
R
L
= 500
t
PZH
Output Enable Time
1.5
6.5
1.5
5.5
ns
t
PZL
t
PHZ
Output Disable Time
1.5
5.5
1.5
5
ns
t
PLZ
t
SU
Set-up Time HIGH or LOW
2
--
2
--
ns
Dx to CP
t
SU
Hold Time HIGH or LOW
1.5
--
1.5
--
ns
Dx to CP
t
W
CP Pulse Width
5
--
5
--
ns
HIGH or LOW
(3)
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
INDUSTRIAL TEMPERATURE RANGE
6
IDT74FCT534AT/CT
FAST CMOS OCTAL D REGISTER (3-STATE)
Pulse
G enerator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OU T
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
IN PUT
TIM ING
INPUT
ASYNC HR O NOU S C ON TROL
PRES ET
C LEAR
ETC.
SYN CH RON OUS C ONTR OL
t
S U
t
H
t
RE M
t
S U
t
H
H IGH-LOW -HIG H
PULSE
LOW -H IGH -LOW
PULSE
t
W
1.5V
1.5V
SAM E PH ASE
IN PU T TR AN SITION
3V
1.5V
0V
1.5V
V
O H
t
PL H
O UTPUT
OPPOSITE PH ASE
IN PU T TR AN SITION
3V
1.5V
0V
t
P LH
t
P H L
t
P H L
V
O L
C ONTR OL
INPU T
3V
1.5V
0V
3.5V
0V
OUTPU T
N ORM A LLY
LOW
OUTPU T
N ORM A LLY
H IGH
SW ITCH
CLO SE D
SW ITC H
OPEN
V
O L
0.3V
0.3V
t
PLZ
t
PZL
t
P ZH
t
PH Z
3.5V
0V
1.5V
1.5V
EN AB LE
DISA BLE
V
O H
PRES ET
C LEAR
CLOCK ENABLE
ETC.
Octal link
Octal link
Octal link
Octal link
Octal link
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-Up, Hold, and Release Times
Pulse Width
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
1.0MHz; t
F
2.5ns; t
R
2.5ns.
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
SWITCH POSITION
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT534AT/CT
FAST CMOS OCTAL D REGISTER (3-STATE)
7
ORDERING INFORMATION
IDT XX
Temp. Range
FCT XXXX
Device Type
X
Package
SO
Q
534AT
534CT
Small Outline IC
Quarter-size Small Outline Package
Octal D Register
74
- 40C to +85C
CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
2975 Stender Way
800-345-7015 or 408-727-6116
logichelp@idt.com
Santa Clara, CA 95054
fax: 408-492-8674
(408) 654-6459
www.idt.com
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