1
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
APRIL 2001
2001 Integrated Device Technology, Inc.
DSC 5174/4
c
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
Phase-Lock Loop Clock Distribution
10MHz to 133MHz operating frequency
Distributes one clock input to one bank of five outputs
Zero Input-Output Delay
Output Skew < 250ps
Low jitter <200 ps cycle-to-cycle
IDT2305-1 for Standard Drive
IDT2305-1H for High Drive
No external RC network required
Operates at 3.3V V
DD
Power down mode
Available in SOIC package
FUNCTIONAL BLOCK DIAGRAM
IDT2305
3.3V ZERO DELAY
CLOCK BUFFER
PLL
8
CLK1
C LK2
C LK3
C LK4
Control
Logic
REF
CLKOUT
1
3
2
5
7
DESCRIPTION:
The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer,
designed to address high-speed clock distribution applications. The zero
delay is achieved by aligning the phase between the incoming clock and
the output clock, operable within the range of 10 to 133MHz.
The IDT2305 is an 8-pin version of the IDT2309. IDT2305 accepts one
reference input, and drives out five low skew clocks. The -1H version of this
device operates, up to 133MHz frequency and has a higher drive than the
-1 device. All parts have on-chip PLLs which lock to an input clock on the
REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT
pad. In the absence of an input clock, the IDT2305 enters power down. In
this mode, the device will draw less than 25
A,
the outputs are tri-stated,
and the PLL is not running, resulting in a significant reduction of power.
The IDT2305 is characterized for both Industrial and Commercial
operation.
2
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
REF
CLK1
2
3
4
8
7
6
5
1
CLK2
GND
CLKOUT
CLK4
V
DD
CLK3
PIN CONFIGURATION
SOIC
TOP VIEW
Symbol
Rating
Max.
Unit
V
DD
Supply Voltage Range
0.5 to +4.6
V
V
I (2)
Input Voltage Range (REF)
0.5 to +5.5
V
V
I
Input Voltage Range
0.5 to
V
(except REF)
V
DD
+0.5
I
IK
(V
I
< 0)
Input Clamp Current
50
mA
I
O
(V
O
= 0 to V
DD
)
Continuous Output Current
50
mA
V
DD
or GND
Continuous Current
100
mA
T
A
= 55C
Maximum Power Dissipation
0.7
W
(in still air)
(3)
T
STG
Storage Temperature Range
65 to +150
C
Operating
Commercial Temperature
0 to +70
C
Temperature
Range
Operating
Industrial Temperature
-40 to +85
C
Temperature
Range
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output
clamp-current ratings are observed.
3. The maximum package power dissipation is calculated using a junction temperature
of 150C and a board trace length of 750 mils.
NOTES:
1. Weak pull down.
2. Weak pull down on all outputs.
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
(1)
APPLICATIONS:
SDRAM
Telecom
Datacom
PC Motherboards/Workstations
Critical Path Delay Designs
Pin Name
Pin Number
Type
Functional Description
REF
(1)
1
IN
Input reference clock, 5 Volt tolerant input
CLK2
(2)
2
Out
Output clock
CLK1
(2)
3
Out
Output clock
GND
4
Ground
Ground
CLK3
(2)
5
Out
Output clock
V
DD
6
PWR
3.3V Supply
CLK4
(2)
7
Out
Output clock
CLKOUT
(2)
8
Out
Output clock, internal feedback on this pin
3
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
Symbol
Parameter
Min.
Max.
Unit
V
DD
Supply Voltage
3
3.6
V
T
A
Operating Temperature (Ambient Temperature)
0
70
C
C
L
Load Capacitance < 100MHz
--
30
pF
Load Capacitance 100MHz - 133MHz
--
10
C
IN
Input Capacitance
--
7
pF
OPERATING CONDITIONS - COMMERCIAL
DC ELECTRICAL CHARACTERISTICS - COMMERCIAL
Symbol
Parameter
Conditions
Min.
Max.
Unit
V
IL
Input LOW Voltage Level
--
0.8
V
V
IH
Input HIGH Voltage Level
2
--
V
I
IL
Input LOW Current
V
IN
= 0V
--
50
A
I
IH
Input HIGH Current
V
IN
= V
DD
--
100
A
V
OL
Output LOW Voltage
Standard Drive
I
OL
= 8mA
--
0.4
V
High Drive
I
OL
= 12mA (-1H)
V
OH
Output HIGH Voltage
Standard Drive
I
OH
= -8mA
2.4
--
V
High Drive
I
OH
= -12mA (-1H)
I
DD_PD
Power Down Current
REF = 0MHz
--
12
A
I
DD
Supply Current
Unloaded Outputs at
66.66MHz
--
32
mA
SWITCHING CHARACTERISTICS (2305-1) - COMMERCIAL
(1,2)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
t
1
Output Frequency
10pF Load
10
--
133
MHz
30pF Load
10
--
100
Duty Cycle = t
2
t
1
Measured at 1.4V, F
OUT
= 66.66MHz
40
50
60
%
t
3
Rise Time
Measured between 0.8V and 2V
--
--
2.5
ns
t
4
Fall Time
Measured between 0.8V and 2V
--
--
2.5
ns
t
5
Output to Output Skew
All outputs equally loaded
--
--
250
ps
t
6
Delay, REF Rising Edge to CLKOUT Rising Edge
Measured at V
DD
/2
--
0
350
ps
t
7
Device-to-Device Skew
Measured at V
DD
/2 on the CLKOUT pins of devices
--
0
700
ps
t
J
Cycle-to-Cycle Jitter, pk - pk
Measured at 66.66MHz, loaded outputs
--
--
200
ps
t
LOCK
PLL Lock Time
Stable power supply, valid clock presented on REF pin
--
--
1
ms
NOTES:
1. REF Input has a threshold voltage of V
DD
/2.
2. All parameters specified with loaded outputs.
4
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
Symbol
Parameter
Min.
Max.
Unit
V
DD
Supply Voltage
3
3.6
V
T
A
Operating Temperature (Ambient Temperature)
-40
+85
C
C
L
Load Capacitance < 100MHz
--
30
pF
Load Capacitance 100MHz - 133MHz
--
10
C
IN
Input Capacitance
--
7
pF
OPERATING CONDITIONS - INDUSTRIAL
SWITCHING CHARACTERISTICS (2305-1H) - COMMERCIAL
(1,2)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
t
1
Output Frequency
10pF Load
10
--
133
MHz
30pF Load
10
--
100
Duty Cycle = t
2
t
1
Measured at 1.4V, F
OUT
= 66.66MHz
40
50
60
%
Duty Cycle = t
2
t
1
Measured at 1.4V, F
OUT
<50MHz
45
50
55
%
t
3
Rise Time
Measured between 0.8V and 2V
--
--
1.5
ns
t
4
Fall Time
Measured between 0.8V and 2V
--
--
1.5
ns
t
5
Output to Output Skew
All outputs equally loaded
--
--
250
ps
t
6
Delay, REF Rising Edge to CLKOUT Rising Edge
Measured at V
DD
/2
--
0
350
ps
t
7
Device-to-Device Skew
Measured at V
DD
/2 on the CLKOUT pins of devices
--
0
700
ps
t
8
Output Slew Rate
Measured between 0.8V and 2V using Test Circuit #2
1
--
--
V/ns
t
J
Cycle-to-Cycle Jitter, pk - pk
Measured at 66.66MHz, loaded outputs
--
--
200
ps
t
LOCK
PLL Lock Time
Stable power supply, valid clock presented on REF pin
--
--
1
ms
NOTES:
1. REF Input has a threshold voltage of V
DD
/2.
2. All parameters specified with loaded outputs.
DC ELECTRICAL CHARACTERISTICS - INDUSTRIAL
Symbol
Parameter
Conditions
Min.
Max.
Unit
V
IL
Input LOW Voltage Level
--
0.8
V
V
IH
Input HIGH Voltage Level
2
--
V
I
IL
Input LOW Current
V
IN
= 0V
--
50
A
I
IH
Input HIGH Current
V
IN
= V
DD
--
100
A
V
OL
Output LOW Voltage
Standard Drive
I
OL
= 8mA
--
0.4
V
High Drive
I
OL
= 12mA (-1H)
V
OH
Output HIGH Voltage
Standard Drive
I
OH
= -8mA
2.4
--
V
High Drive
I
OH
= -12mA (-1H)
I
DD_PD
Power Down Current
REF = 0MHz
--
25
A
I
DD
Supply Current
Unloaded Outputs at
66.66MHz
--
35
mA
5
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
SWITCHING CHARACTERISTICS (2305-1H) - INDUSTRIAL
(1,2)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
t
1
Output Frequency
10pF Load
10
--
133
MHz
30pF Load
10
--
100
Duty Cycle = t
2
t
1
Measured at 1.4V, F
OUT
= 66.66MHz
40
50
60
%
Duty Cycle = t
2
t
1
Measured at 1.4V, F
OUT
<50MHz
45
50
55
%
t
3
Rise Time
Measured between 0.8V and 2V
--
--
1.5
ns
t
4
Fall Time
Measured between 0.8V and 2V
--
--
1.5
ns
t
5
Output to Output Skew
All outputs equally loaded
--
--
250
ps
t
6
Delay, REF Rising Edge to CLKOUT Rising Edge
Measured at V
DD
/2
--
0
350
ps
t
7
Device-to-Device Skew
Measured at V
DD
/2 on the CLKOUT pins of devices
--
0
700
ps
t
8
Output Slew Rate
Measured between 0.8V and 2V using Test Circuit #2
1
--
--
V/ns
t
J
Cycle-to-Cycle Jitter, pk - pk
Measured at 66.66MHz, loaded outputs
--
--
200
ps
t
LOCK
PLL Lock Time
Stable power supply, valid clock presented on REF pin
--
--
1
ms
NOTES:
1. REF Input has a threshold voltage of V
DD
/2.
2. All parameters specified with loaded outputs.
SWITCHING CHARACTERISTICS (2305-1) - INDUSTRIAL
(1,2)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
t
1
Output Frequency
10pF Load
10
--
133
MHz
30pF Load
10
--
100
Duty Cycle = t
2
t
1
Measured at 1.4V, F
OUT
= 66.66MHz
40
50
60
%
t
3
Rise Time
Measured between 0.8V and 2V
--
--
2.5
ns
t
4
Fall Time
Measured between 0.8V and 2V
--
--
2.5
ns
t
5
Output to Output Skew
All outputs equally loaded
--
--
250
ps
t
6
Delay, REF Rising Edge to CLKOUT Rising Edge
Measured at V
DD
/2
--
0
350
ps
t
7
Device-to-Device Skew
Measured at V
DD
/2 on the CLKOUT pins of devices
--
0
700
ps
t
J
Cycle-to-Cycle Jitter, pk - pk
Measured at 66.66MHz, loaded outputs
--
--
200
ps
t
LOCK
PLL Lock Time
Stable power supply, valid clock presented on REF pin
--
--
1
ms
NOTES:
1. REF Input has a threshold voltage of V
DD
/2.
2. All parameters specified with loaded outputs.
6
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
REF to CLKA/CLKB Delay (ps)
ZERO DELAY AND SKEW CONTROL
All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative
loading can affect and adjust the input/output delay. The Output Load Difference diagram illustrates the PLL's relative loading with respect to the other
outputs that can adjust the Input-Output (I/O) Delay.
For designs utilizing zero I/O Delay, all outputs including CLKOUT must be equally loaded. Even if the output is not used, it must have a capacitive
load equal to that on the other outputs in order to obtain true zero I/O Delay. If I/O Delay adjustments are needed, use the Output Load Difference diagram
to calculate loading differences between the CLKOUT pin and other outputs. For zero output-to-output skew, all outputs must be loaded equally.
REF TO CLKA/CLKB RELAY vs. OUTPUT LOAD DIFFERENCE BETWEEN CLKOUT PIN AND CLKA/CLKB PINS
OUTPUT LOAD DIFFERENCE BETWEEN CLKOUT PIN AND CLKA/CLKB PINS (pF)
1500
1000
500
0
-500
-1000
-1500
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
7
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
V
DD
OUTPUTS
V
DD
GND
GND
0.1
F
0.1
F
V
D D
OUTPUTS
10pF
V
DD
GND
GND
0.1
F
0.1
F
1K
1K
C
LO A D
CLK
O U T
C LK
O U T
Output
1.4V
1.4V
t5
Output
REF
V
D D/
2
t6
Output
C LK
O U T
D evice 1
t7
C LK
O U T
D evice 2
V
DD/
2
V
D D
/2
V
DD
/2
1.4V
1.4V
t2
t1
1.4V
2V
0.8V
t3
t4
0.8V
3.3V
0V
2V
Output
All Outputs Rise/Fall Time
Input to Output Propagation Delay
Device to Device Skew
Output to Output Skew
Duty Cycle Timing
SWITCHING WAVEFORMS
Test Circuit 1 (all Parameters Except t8)
Test Circuit 2 (t8, Output Slew Rate On -1H Devices)
TEST CIRCUITS
8
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
TYPICAL DUTY CYCLE
(1)
AND I
DD
TRENDS
(2)
FOR IDT2305-1
NOTES:
1. Duty Cycle is taken from typical chip measured at 1.4V.
2. I
DD
data is calculated from I
DD
= I
CORE
+ nCVf, where I
CORE
is the unloaded current. (n = Number of outputs; C = Capacitance load per output (F);
V = Supply Voltage (V); f = Frequency (Hz))
3
3.1
3.2
3.3
3.4
3.5
3.6
V
DD
(V)
40
42
44
46
48
50
52
54
56
58
60
D uty Cycle vs V
DD
(for 30pf loads over frequency - 3.3V , 25C)
33M H z
66M H z
100M Hz
D
u
t
y
C
y
c
l
e
(
%
)
3
3.1
3.2
3.3
3.4
3.5
3.6
V
D D
(V)
40
42
44
46
48
50
52
54
56
58
60
Du ty C ycle vs V
D D
(for 10pF load s over frequency - 3.3V , 25C )
33M Hz
66M Hz
100M Hz
20
40
60
80
100
120
140
Frequency
(MH z)
40
42
44
46
48
50
52
54
56
58
60
Duty Cycle vs Frequency
(for 30pf loads over temperature - 3.3V )
-40C
0C
25C
70C
85C
D
u
t
y
C
y
c
l
e
(
%
)
D
u
t
y
C
y
c
l
e
(
%
)
133M Hz
20
40
60
80
100
120
140
Frequency
(M Hz)
40
42
44
46
48
50
52
54
56
58
60
D u ty C ycle vs F re qu ency
(for 10pF loads over tem perature - 3.3V )
-40C
0C
25C
70C
85C
D
u
t
y
C
y
c
l
e
(
%
)
0
2
4
6
8
N umber of Loaded Outputs
0
20
40
60
80
100
120
140
I
DD
vs Number of Loaded Outputs
(for 30pf loads over frequency - 3.3V , 25C)
33M H z
66M H z
100M Hz
I
D
D
(
m
A
)
0
2
4
6
8
Number of Loaded O utputs
0
20
40
60
80
100
120
140
I
D D
vs N um ber of Loade d O utputs
(for 10pF loads over frequency - 3.3V, 25C )
33M H z
66M Hz
100M Hz
I
D
D
(
m
A
)
9
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
TYPICAL DUTY CYCLE
(1)
AND I
DD
TRENDS
(2)
FOR IDT2305-1H
NOTES:
1. Duty Cycle is taken from typical chip measured at 1.4V.
2. I
DD
data is calculated from IDD = ICORE + nCVf, where ICORE is the unloaded current. (n = Number of outputs; C = Capacitance load per output (F); V = Supply Voltage (V);
f = Frequency (Hz))
3
3.1
3.2
3.3
3.4
3.5
3.6
V
DD
(V)
40
42
44
46
48
50
52
54
56
58
60
Duty Cycle vs V
DD
(for 30pf loads over frequency - 3.3V, 25C)
33M Hz
66M H z
100M Hz
D
u
t
y
C
y
c
l
e
(
%
)
3
3.1
3.2
3.3
3.4
3.5
3.6
V
D D
(V)
40
42
44
46
48
50
52
54
56
58
60
D uty C ycle vs V
DD
(for 10pF loads over freque ncy - 3.3V, 25C )
33M H z
66M H z
100M H z
20
40
60
80
100
120
140
Frequency
(MH z)
40
42
44
46
48
50
52
54
56
58
60
Duty C ycle vs Frequency
(for 30pf loads over temperature - 3.3V)
-40C
0C
25C
70C
85C
D
u
t
y
C
y
c
l
e
(
%
)
D
u
t
y
C
y
c
l
e
(
%
)
133M H z
20
40
60
80
100
120
140
Frequency
(M H z)
40
42
44
46
48
50
52
54
56
58
60
D uty C ycle vs Fre quency
(for 10pF loads ove r tem perature - 3.3V)
-40C
0C
25C
70C
85C
D
u
t
y
C
y
c
l
e
(
%
)
0
2
4
6
8
N um ber of Loaded O utputs
0
20
40
60
80
100
120
140
I
DD
vs Number of Loaded Outputs
(for 30pf loads over frequency - 3.3V, 25C)
33M Hz
66M H z
100M Hz
I
D
D
(
m
A
)
0
2
4
6
8
Num ber of Loaded Outputs
0
20
40
60
80
100
120
140
I
D D
vs N u m ber of Loaded O utp uts
(for 10pF load s over frequency - 3.3V, 25C )
33M H z
66M H z
100M H z
I
D
D
(
m
A
)
160
160
10
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
ORDERING INFORMATION
Ordering Code
Package Type
Operating Range
IDT2305-1DC
8-Pin SOIC
Commercial
IDT2305-1DCG
8-Pin SOIC
Commercial
IDT2305-1DCI
8-Pin SOIC
Industrial
IDT2305-1DCGI
8-Pin SOIC
Industrial
IDT2305-1HDC
8-Pin SOIC
Commercial
IDT2305-1HDCI
8-Pin SOIC
Industrial
CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
2975 Stender Way
800-345-7015 or 408-727-6116
logichelp@idt.com
Santa Clara, CA 95054
fax: 408-492-8674
(408) 654-6459
www.idt.com
IDT
XXXXX
XX
X
Package
Process
Device Type
2305-1
2305-1H
Zero Delay Clock Buffer
High Drive Output
DC
DCG
Small Outline
SOIC - Green
Blank
I
Commercial (0
o
C to +70
o
C)
Industrial (-40
o
C to +85
o
C)
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