Integrated Device Technology, Inc.
FAST CMOS
BUFFER/CLOCK DRIVER
FEATURES:
0.5 MICRON CMOS Technology
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 1.0ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
`Heartbeat' monitor output
Available in DIP, SOIC, SSOP, QSOP, Cerpack and
LCC packages
Military product compliant to MIL-STD-883, Class B
V
CC
= 3.3V
0.3V
DESCRIPTION:
The FCT3805/A is a 3.3 volt, non-inverting clock driver built
using advanced dual metal CMOS technology. The device
consists of two banks of drivers, each with a 1:5 fanout and its
own output enable control. The device has a "heartbeat"
monitor for diagnostics and PLL driving. The MON output is
identical to all other outputs and complies with the output
specifications in this document. The FCT3805/A offers low
capacitance inputs with hysteresis.
The FCT3805/A is designed for high speed clock distribu-
tion where signal quality and skew are critical. The FCT 3805
also allows single point-to-point transmission line driving in
applications such as address distribution, where one signal
must be distributed to multiple receivers with low skew and
high signal quality.
IDT49FCT3805/A
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OCTOBER 1995
1996 Integrated Device Technology, Inc.
9.5
DSC-3102/4
1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
OE
A
5
5
IN
A
IN
B
OE
B
OA
1
-OA
5
OB
1
-OB
5
MON
3102 drw 01
3102 drw 02
3102 drw 03
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
INDEX
LCC
TOP VIEW
3
2
20 19
1
4
5
6
7
8
18
17
16
15
14
9 10 11 12 13
L20-2
OA
3
GND
A
OA
4
OA
5
GND
Q
OB
2
OB
3
GND
B
OB
4
OB
5
OE
A
IN
A
IN
B
OE
B
MON
OA
2
OA
1
V
CCA
V
CCB
OB
1
OB
1
OA
1
OA
3
GND
A
OA
4
OA
5
OA
2
OE
A
IN
A
OB
2
OB
3
GND
B
OB
4
MON
IN
B
OB
5
OE
B
V
CCB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
E20-1
V
CCA
GND
Q
IDT49FCT3805/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.5
2
NOTE:
1. This parameter is measured at characterization but not tested.
PIN DESCRIPTION
FUNCTION TABLE
(1)
3102 tbl 01
NOTE:
3102 tbl 02
1. H = HIGH, L = LOW, Z = High Impedance
ABSOLUTE MAXIMUM RATINGS
(1)
CAPACITANCE
(T
A
= +25
C, f = 1.0MHz)
3102 lnk 04
Symbol
Rating
Commercial
Military
Unit
V
TERM(2)
Terminal Voltage
with Respect to
GND
0.5 to +4.6
0.5 to +4.6
V
V
TERM(3)
Terminal Voltage
with Respect to
GND
0.5 to +7.0
0.5 to +7.0
V
V
TERM(4)
Terminal Voltage
with Respect to
GND
0.5 to V
CC
+ 0.5
0.5 to V
CC
+ 0.5
V
T
A
Operating
Temperature
0 to +70
55 to +125
C
T
BIAS
Temperature
Under Bias
55 to +125
65 to +135
C
T
STG
Storage
Temperature
55 to +125
65 to +150
C
I
OUT
DC Output
Current
60 to +60 60 to +60 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Output and I/O terminals.
3102 lnk 03
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input
Capacitance
V
IN
= 0V
3.5
5.0
pF
C
OUT
Output
Capacitance
V
OUT
= 0V
3.5
5.0
pF
Pin Names
Description
OE
A
,
OE
B
3-State Output Enable Inputs (Active LOW)
IN
A
, IN
B
Clock Inputs
OA
n
, OB
n
Clock Outputs
MON
Monitor Output
Inputs
Outputs
OE
OE
A
,
OE
OE
B
IN
A
, IN
B
OA
n
, OB
n
MON
L
L
L
L
L
H
H
H
H
L
Z
L
H
H
Z
H
IDT49FCT3805/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.5
3
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 0
C to +70
C, V
CC
= 3.3V
0.3V; Military: T
A
= 55
C to +125
C, V
CC
= 3.3V
0.3V
3102 lnk 05
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25
C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= V
CC
-0.6V at rated current.
6. The test limit for this parameter is
5
A at TA = 55
C.
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level (Input pins)
Guaranteed Logic HIGH Level
2.0
--
5.5
V
Input HIGH Level (I/O pins)
2.0
--
V
CC
+0.5
V
IL
Input LOW Level
Guaranteed Logic LOW Level
0.5
--
0.8
V
(Input and I/O pins)
I
I H
Input HIGH Current (Input pins)
(6)
V
CC
= Max.
V
I
= 5.5V
--
--
1
A
Input HIGH Current (I/O pins)
(6)
V
I
= V
CC
--
--
1
I
I L
Input LOW Current (Input pins)
(6)
V
I
= GND
--
--
1
Input LOW Current (I/O pins)
(6)
V
I
= GND
--
--
1
I
OZH
High Impedance Output Current
V
CC
= Max.
V
O
= V
CC
--
--
1
A
I
OZL
(3-State Output pins)
(6)
V
O
= GND
--
--
1
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
--
0.7
1.2
V
I
ODH
Output HIGH Current
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
36
60
110
mA
I
ODL
Output LOW Current
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
50
90
200
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
I
OH
= 0.1mA
V
CC
0.2
--
--
V
V
IN
= V
IH
or V
IL
I
OH
= 6mA MIL.
I
OH
= 8mA COM'L.
2.4
(5)
3.0
--
V
OL
Output LOW Voltage
V
CC
= Min.
I
OL
= 0.1mA
--
--
0.2
V
V
IN
= V
IH
or V
IL
I
OL
= 16mA
--
0.2
0.4
I
OL
= 24mA
--
0.3
0.50
I
OFF
Input Power Off Leakage
(6)
V
CC
= 0V, V
IN
4.5V
--
--
1
A
I
OS
Short Circuit Current
(4)
V
CC
= Max., V
O
= GND
(3)
60
135
240
mA
V
H
Input Hysteresis
--
--
150
--
mV
I
CCL
Quiescent Power Supply Current
V
CC
= Max.,
COM'L.
--
0.1
10
A
I
CCH
I
CCZ
V
IN
= GND or V
CC
MIL.
--
0.1
100
IDT49FCT3805/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.5
4
POWER SUPPLY CHARACTERISTICS
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25
C ambient.
3. Per TTL driven input (V
IN
= V
CC
-0.6V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6.
I
C
= I
QUIESCENT
+
I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
I
CC
= Power Supply Current for a TTL High Input (V
I
N
= V
CC
-0.6V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
3102 tbl 06
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply Current
TTL Inputs HIGH
V
CC
= Max.
V
IN
= V
CC
0.6V
(3)
--
2.0
30
A
I
CCD
Dynamic Power Supply Current
(4)
V
CC
= Max.
Outputs Open
OE
A
=
OE
B
= GND
Per Output Toggling
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
--
0.035
0.06
mA/
MHz
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
fo = 25MHz
V
IN
= V
CC
V
IN
= GND
--
0.9
1.6
mA
50% Duty Cycle
OE
A
=
OE
B
=V
CC
Mon. Output Toggling
V
IN
= V
CC
0.6V
V
IN
= GND
--
0.9
1.6
V
CC
= Max.
Outputs Open
fo = 50MHz
V
IN
= V
CC
V
IN
= GND
--
20.0
33.0
(5)
50% Duty Cycle
OE
A
=
OE
B
= GND
Eleven Outputs
Toggling
V
IN
= V
CC
0.6V
V
IN
= GND
--
20.0
33.0
(5)
IDT49FCT3805/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.5
5
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. t
PLH
, t
PHL
, t
SK
(t) production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delay
limits do not imply skew.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(3,4)
3102 tbl 07
FCT3805
FCT3805A
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition
(1)
Min
.(2)
Max. Min
.(2)
Max
.
Min
.(2)
Max. Min.
(2)
Max.
Unit
t
PLH
t
PHL
Propagation Delay
IN
A
to OA
n
, IN
B
to OB
n
C
L
= 50pF
R
L
= 500
1.5
5.8
1.5
5.0
ns
t
R
Output Rise Time
--
2.0
--
--
2.0
--
ns
t
F
Output Fall Time
--
2.0
--
--
2.0
--
ns
t
SK
(o)
Output skew: skew between outputs of all
banks of same package (inputs tied together)
--
0.7
--
--
0.5
--
ns
t
SK
(p)
Pulse skew: skew between opposite
transitions of same output (|t
PHL
t
PLH
|)
--
1.2
--
--
1.0
--
ns
t
SK
(t)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
--
1.5
--
--
1.2
--
ns
t
PZL
t
PZH
Output Enable Time
OE
A
to OA
n
,
OE
B
to OB
n
1.5
6.5
1.5
6.0
ns
t
PLZ
t
PHZ
Output Disable Time
OE
A
to OA
n
,
OE
B
to OB
n
1.5
5.5
1.5
5.0
ns
IDT49FCT3805/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.5
6
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUIT FOR ALL OUTPUTS
ENABLE AND DISABLE TIME
SWITCH POSITION
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
Test
Switch
Disable LOW
Enable LOW
6.0V
Disable HIGH
Enable HIGH
GND
PACKAGE DELAY
OUTPUT SKEW- t
SK
(o)
PACKAGE SKEW- t
SK
(t)
PULSE SKEW- t
SK
(p)
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: f
1.0MHz; t
F
2.5ns; t
R
2.5ns
ENABLE AND DISABLE TIMES
3102 drw 05
3102 drw 07
3102 drw 06
3102 tbl 08
3102 drw 04
t
PLH1
OUTPUT 1
OUTPUT 2
t
SK(o)
t
PLH2
3V
0V
V
OH
1.5V
1.5V
V
OL
V
OH
1.5V
V
OL
INPUT
t
PHL1
t
PHL2
t
SK(o)
t
SK(o)
=
|t
PLH2 -
t
PLH1
|
or
|t
PHL2 -
t
PHL1
|
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
3V
1.5V
0V
3.5V
0V
SWITCH
CLOSED
SWITCH
OPEN
V
OL
V
OH
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
0V
1.5V
1.5V
ENABLE
DISABLE
3V
0V
V
OH
t
PLH
t
PHL
V
OL
1.5V
1.5V
t
R
t
F
2.0V
0.8V
INPUT
OUTPUT
INPUT
t
PLH1
PACKAGE 1 OUTPUT
PACKAGE 2 OUTPUT
t
SK(t)
t
PLH2
3V
0V
V
OH
1.5V
1.5V
V
OL
V
OH
1.5V
V
OL
t
PHL1
t
PHL2
t
SK(t)
t
SK(t)
= |t
PLH2 -
t
PLH1
|
or
|t
PHL2 -
t
PHL1
|
t
PLH
t
PHL
3V
0V
V
OH
1.5V
1.5V
V
OL
t
SK(p)
=
|t
PHL -
t
PLH
|
INPUT
OUTPUT
3102 drw 09
3102 drw 08
Pulse
Generator
D.U.T.
V
CC
V
IN
V
OUT
500
GND
6.0V
500
R
T
50pF
IDT49FCT3805/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.5
7
ORDERING INFORMATION
XXX
Device Type
XX
Package
X
Process/
Blank
B
P
D
E
L
SO
PY
Q
3805
3805A
Commercial
MIL-STD-883, Class B
Plastic DIP
CERDIP
CERPACK
Leadless Chip Carrier
Small Outline IC
Shrink Small Outline IC
Quarter-size Small Outline IC
Non-Inverting 3.3V Buffer/Clock Driver
Temperature
Range
IDT 49FCT
3102 drw 10
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