Integrated Device Technology, Inc.
DESCRIPTION:
The FCT16823AT/BT/CT/ET and FCT162823AT/BT/CT/
ET 18-bit bus interface registers are built using advanced,
dual metal CMOS technology. These high-speed, low-power
registers with clock enable (x
CLKEN
) and clear (x
CLR
) con-
trols are ideal for parity bus interfacing in high-performance
synchronous systems. The control inputs are organized to
operate the device as two 9-bit registers or one 18-bit register.
Flow-through organization of signal pins simplifies layout. All
inputs are designed with hysteresis for improved noise mar-
gin.
The FCT16823AT/BT/CT/ET are ideally suited for driving
high-capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162823AT/BT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times reduc-
ing the need for external series terminating resistors. The
FCT162823AT/BT/CT/ET are plug-in replacements for the
FCT16823AT/BT/CT/ET and ABT16823 for on-board inter-
face applications.
FAST CMOS 18-BIT
REGISTER
IDT54/74FCT16823AT/BT/CT/ET
IDT54/74FCT162823AT/BT/CT/ET
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
Common features:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for
ABT functions
Typical t
SK
(o) (Output Skew) < 250ps
Low input and output leakage
1
A (max.)
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40
C to +85
C
V
CC
= 5V
10%
Features for FCT16823AT/BT/CT/ET:
High drive outputs (-32mA I
OH
, 64mA I
OL
)
Power off disable outputs permit "live insertion"
Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25
C
Features for FCT162823AT/BT/CT/ET:
Balanced Output Drivers:
24mA (commercial),
16mA (military)
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25
C
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2772 drw 01
2772 drw 02
R
C
D
2
OE
2
CLR
2
CLKEN
2
CLK
2
D
1
2
Q
1
TO 8 OTHER CHANNELS
R
C
D
1
OE
1
CLR
1
CLKEN
1
CLK
1
D
1
1
Q
1
TO 8 OTHER CHANNELS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1996
1996 Integrated Device Technology, Inc.
5.16
DSC-2772/8
1
IDT54/74FCT16823AT/BT/CT/ET, 162823AT/BT/CT/ET
FAST CMOS 18-BIT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
5.16
2
PIN CONFIGURATIONS
2772 drw 03
2772 drw 04
1
OE
GND
1
Q
2
V
CC
1
CLR
GND
1
Q
9
GND
V
CC
1
Q
1
1
Q
3
1
Q
4
1
Q
5
1
Q
6
1
Q
7
1
Q
8
2
Q
1
2
Q
2
2
Q
3
2
Q
5
2
Q
6
2
Q
4
1
CLK
1
CLKEN
1
D
1
GND
1
D
2
1
D
3
V
CC
1
D
4
1
D
5
1
D
6
1
D
7
1
D
8
1
D
9
2
D
2
GND
GND
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
CERPACK
TOP VIEW
E56-1
GND
2
Q
7
2
Q
8
2
CLR
25
26
27
28
2
D
4
V
CC
2
D
5
2
D
6
GND
2
D
7
2
D
8
2
D
9
2
CLKEN
2
CLK
29
30
31
32
2
Q
9
2
OE
2
D
1
2
D
3
SSOP/
TSSOP/TVSOP
TOP VIEW
SO56-1
SO56-2
SO56-3
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
32
25
26
27
28
2
CLR
GND
V
CC
2
Q
3
2
Q
5
2
Q
6
2
Q
4
GND
2
Q
7
2
Q
8
2
Q
9
2
OE
GND
1
Q
9
1
Q
5
1
Q
6
1
Q
7
1
Q
8
2
Q
1
2
Q
2
GND
1
Q
2
V
CC
1
CLR
1
Q
1
1
Q
3
1
Q
4
1
OE
1
CLK
1
D
1
GND
1
D
2
1
D
3
V
CC
1
D
4
1
D
5
1
D
6
1
D
7
1
D
8
1
D
9
GND
2
D
1
1
CLKEN
2
D
2
GND
2
D
4
V
CC
2
D
5
2
D
6
GND
2
D
7
2
D
8
2
D
9
2
CLK
2
D
3
2
CLKEN
IDT54/74FCT16823AT/BT/CT/ET, 162823AT/BT/CT/ET
FAST CMOS 18-BIT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
5.16
3
PIN DESCRIPTION
FUNCTION TABLE
(1)
CAPACITANCE
(T
A
= +25
C, f = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
2772 lnk 04
2772 tbl 01
NOTES:
2772 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
Z = High Impedance
2. Output level before indicated steady-state input conditions were estab-
lished.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input
Capacitance
V
IN
= 0V
3.5
6.0
pF
C
OUT
Output
Capacitance
V
OUT
= 0V
3.5
8.0
pF
ABSOLUTE MAXIMUM RATINGS
(1)
Pin Names
Description
xDx
Data inputs
xCLK
Clock Inputs
x
CLKEN
Clock Enable Inputs (Active LOW)
x
CLR
Asynchronous clear Inputs
(Active LOW)
x
OE
Output Enable Inputs (Active LOW)
xQx
3-State Outputs
Inputs
Outputs
x
OE
OE
x
CLR
CLR
x
CLKEN
CLKEN
xCLK
xDx
xQx
Function
H
X
X
X
X
Z
High Z
L
L
X
X
X
L
Clear
L
H
H
X
X
Q
(2)
Hold
H
H
L
L
Z
Load
H
H
L
H
Z
L
H
L
L
L
L
H
L
H
H
Symbol
Description
Max.
Unit
V
TERM(2)
Terminal Voltage with Respect to
GND
0.5 to +7.0
V
V
TERM(3)
Terminal Voltage with Respect to
GND
0.5 to
V
CC
+0.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
60 to +120 mA
2772 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
IDT54/74FCT16823AT/BT/CT/ET, 162823AT/BT/CT/ET
FAST CMOS 18-BIT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
5.16
4
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 40
C to +85
C, V
CC
= 5.0V
10%; Military: T
A
= 55
C to +125
C, V
CC
= 5.0V
10%
OUTPUT DRIVE CHARACTERISTICS FOR FCT162823T
2772 lnk 07
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level
Guaranteed Logic HIGH Level
2.0
--
--
V
V
IL
Input LOW Level
Guaranteed Logic LOW Level
--
--
0.8
V
I
I H
Input HIGH Current (Input pins)
(5)
V
CC
= Max.
V
I
= V
CC
--
--
1
A
Input HIGH Current (I/O pins)
(5)
--
--
1
I
I L
Input LOW Current (Input pins)
(5)
V
I
= GND
--
--
1
Input LOW Current (I/O pins)
(5)
--
--
1
I
OZH
High Impedance Output Current
V
CC
= Max.
V
O
= 2.7V
--
--
1
A
I
OZL
(3-State Output pins)
(5)
V
O
= 0.5V
--
--
1
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
--
0.7
1.2
V
I
OS
Short Circuit Current
V
CC
= Max., V
O
= GND
(3)
80
140
225
mA
V
H
Input Hysteresis
--
--
100
--
mV
I
CCL
I
CCH
I
CCZ
Quiescent Power Supply Current
V
CC
= Max., V
IN
= GND or V
CC
--
5
500
A
2772 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR FCT16823T
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
O
Output Drive Current
V
CC
= Max., V
O
= 2.5V
(3)
50
--
180
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
I
OH
= 3mA
2.5
3.5
--
V
V
IN
= V
IH
or V
IL
I
OH
= 12mA MIL.
I
OH
= 15mA COM'L.
2.4
3.5
--
V
I
OH
= 24mA MIL.
I
OH
= 32mA COM'L.
(4)
2.0
3.0
--
V
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 48mA MIL.
I
OL
= 64mA COM'L.
--
0.2
0.55
V
I
OFF
Input/Output Power Off Leakage
(5)
V
CC
= 0V, V
IN
or V
O
4.5V
--
--
1
A
2772 lnk 06
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
ODL
Output LOW Current
V
CC
= 5V, V
IN
= V
IH
or
V
IL,
V
OUT
= 1.5V
(3)
60
115
200
mA
I
ODH
Output HIGH Current
V
CC
= 5V, V
IN
= V
IH
or V
IL,
V
OUT
= 1.5V
(3)
60
115
200
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= 16mA MIL.
I
OH
= 24mA COM'L.
2.4
3.3
--
V
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 16mA MIL.
I
OL
= 24mA COM'L.
--
0.3
0.55
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25
C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is
5
A at T
A
= 55
C.
IDT54/74FCT16823AT/BT/CT/ET, 162823AT/BT/CT/ET
FAST CMOS 18-BIT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
5.16
5
POWER SUPPLY CHARACTERISTICS
2772 tbl 08
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25
C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current (I
CCL
,
I
CCH
and I
CCZ
)
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply Current
TTL Inputs HIGH
V
CC
= Max.
V
IN
= 3.4V
(3)
--
0.5
1.5
mA
I
CCD
Dynamic Power Supply Current
(4)
V
CC
= Max.
Outputs Open
x
OE
= x
CLKEN
= GND
One Input Toggling
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
--
75
120
A/
MHz
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
--
0.8
1.7
mA
x
OE
= x
CLKEN
= GND
at fi = 5MHz
50% Duty Cycle
One Bit Toggling
V
IN
= 3.4V
V
IN
= GND
--
1.3
3.2
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
V
IN
= V
CC
V
IN
= GND
--
4.2
7.1
(5)
x
OE
= x
CLKEN
= GND
at fi = 2.5MHz
50% Duty Cycle
Eighteen Bits Toggling
V
IN
= 3.4V
V
IN
= GND
--
9.2
22.1
(5)
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