Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGE
AUGUST 1996
1996 Integrated Device Technology, Inc.
DSC-2549/8
1
IDT54/74FCT16652T/AT/CT/ET
IDT54/74FCT162652T/AT/CT/ET
FAST CMOS 16-BIT BUS
TRANSCEIVER/
REGISTERS
FEATURES:
Common features:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for
ABT functions
Typical t
SK
(o) (Output Skew) < 250ps
Low input and output leakage
1
A (max.)
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP,15.7 mil pitch TVSOP and 25 mil pitch Cerpack
Extended commercial range of -40
C to +85
C
V
CC
= 5V
10%
Features for FCT16652T/AT/CT/ET:
High drive outputs (-32mA I
OH
, 64mA I
OL
)
Power off disable outputs permit "live insertion"
Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25
C
Features for FCT162652T/AT/CT/ET:
Balanced Output Drivers:
24mA (commercial),
16mA (military)
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25
C
DESCRIPTION:
The FCT16652T/AT/CT/ET and FCT162652T/AT/CT/ET
16-bit registered transceivers are built using advanced dual
metal CMOS technology. These high-speed, low-power de-
vices are organized as two independent 8-bit bus transceivers
with 3-state D-type registers. For example, the xOEAB and
x
OEBA
signals control the transceiver functions.
The xSAB and xSBA control pins are provided to select
either real time or stored data transfer. The circuitry used for
select control will eliminate the typical decoding glitch that
occurs in a multiplexer during the transition between stored
and real time data. A LOW input level selects real-time data
and a HIGH level selects stored data.
Data on the A or B data bus, or both, can be stored in the
internal D-flip-flops by LOW-to-HIGH transitions at the appro-
priate clock pins (xCLKAB or xCLKBA), regardless of the
select or enable control pins. Flow-through organization of
signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The FCT16652T/AT/CT/ET are ideally suited for driving
high capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162652T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall timesreducing
the need for external series terminating resistors. The
FCT162652T/AT/CT/ET are plug-in replacements for the
FCT16652T/AT/CT/ET and ABT16652 for on-board bus inter-
face applications.
FUNCTIONAL BLOCK DIAGRAM
1
A
1
1
OEBA
1
CLKBA
1
SBA
1
CLKAB
1
SAB
1
OEAB
2549 drw 01
1
B
1
B REG
A REG
D
C
C
D
TO 7 OTHER CHANNELS
2
B
1
2
CLKAB
2
OEBA
2
CLKBA
2
SBA
2
A
1
2
OEAB
2
SAB
2549 drw 02
TO 7 OTHER CHANNELS
B REG
A REG
D
C
C
D
2
IDT54/74FCT16652T/AT/CT/ET, FCT162652T/AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1
B
1
1
B
2
GND
1
B
3
1
B
4
V
CC
1
B
5
1
B
6
1
OEBA
1
SBA
1
B
7
1
B
8
2
B
1
2
B
2
GND
2
B
3
2
B
4
V
CC
2
B
5
GND
1
CLKBA
2
B
7
2
B
6
2
B
8
GND
2
SBA
2
CLKBA
2
OEBA
1
OEAB
1
CLKAB
1
SAB
GND
1
A
1
1
A
2
V
CC
1
A
3
1
A
4
GND
1
A
5
1
A
6
1
A
7
1
A
8
GND
2
A
1
2
A
2
V
CC
2
A
3
2
SAB
2
A
5
2
A
4
2
A
7
GND
2
A
8
2
CLKAB
2OEAB
2
A
6
2549 drw 03
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
SSOP/
TSSOP/TVSOP
TOP VIEW
SO56-1
SO56-2
SO56-3
29
30
31
32
25
26
27
28
1
OEAB
1
CLKAB
1
SAB
GND
1
A
1
1
A
2
V
CC
1
A
3
1
A
4
GND
1
A
5
1
A
6
1
A
7
1
A
8
GND
2
A
1
2
A
2
V
CC
2
A
3
2
SAB
2
A
5
2
A
4
2
A
7
GND
2
A
8
2
CLKAB
2OEAB
2
A
6
1
B
1
1
B
2
GND
1
B
3
1
B
4
V
CC
1
B
5
1
B
6
1
OEBA
1
SBA
1
B
7
1
B
8
2
B
1
2
B
2
GND
2
B
3
2
B
4
V
CC
2
B
5
GND
1
CLKBA
2
B
7
2
B
6
2
B
8
GND
2
SBA
2
CLKBA
2
OEBA
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
32
25
26
27
28
2549 drw 04
CERPACK
TOP VIEW
E56-1
IDT54/74FCT16652T/AT/CT/ET, FCT162652T/AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
3
PIN DESCRIPTION
Pin Names
Description
xAx
Data Register A Inputs
Data Register B Outputs
xBx
Data Register B Inputs
Data Register A Outputs
xCLKAB, xCLKBA Clock Pulse Inputs
xSAB, xSBA
Output Data Source Select Inputs
xOEAB, x
OEBA
Output Enable Inputs
CAPACITANCE
(T
A
= +25
C, f = 1.0MHz)
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input
Capacitance
V
IN
= 0V
4.5
6.0
pF
C
I/O
I/O
Capacitance
V
OUT
= 0V
5.5
8.0
pF
NOTE:
1. This parameter is measured at characterization but not tested.
2549 lnk 02
2549 tbl 01
FUNCTION TABLE
(2)
Inputs
Data I/O
(1)
Operation or Function
xOEAB
x
OEBA
OEBA
xCLKAB
xCLKBA
xSAB
xSBA
xAx
xBx
L
L
H
H
H or L
H or L
X
X
X
X
Input
Input
Isolation
Store A and B Data
X
H
H
H
H or L
X
X
(2)
X
X
Input
Input
Unspecified
(1)
Output
Store A, Hold B
Store A in Both Registers
L
L
X
L
H or L
X
X
X
X
(2)
Unspecified
(1)
Output
Input
Input
Hold A, Store B
Store B in both Registers
L
L
L
L
X
X
X
H or L
X
X
L
H
Output
Input
Real Time B Data to A Bus
Stored B Data to A Bus
H
H
H
H
X
H or L
X
X
L
H
X
X
Input
Output
Real Time A Data to B Bus
Stored A Data to B Bus
H
L
H or L
H or L
H
H
Output
Output
Stored A Data to B Bus and
Stored B Data to A Bus
NOTES:
1. The data output functions may be enabled or disabled by various signals at the xOEAB or x
OEBA
inputs.
Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH
transition on the clocks inputs.
2. Select control = L: clocks can occur simultaneously.
Select control = H: clocks must be staggered to load both registers.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't care
= LOW-to-HIGH Transition
ABSOLUTE MAXIMUM RATINGS
(1)
2549 tbl 03
Symbol
Description
Max.
Unit
V
TERM(2)
Terminal Voltage with Respect to
GND
0.5 to +7.0
V
V
TERM(3)
Terminal Voltage with Respect to
GND
0.5 to
V
CC
+0.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
60 to +120 mA
2549 lnk 04
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
2. All device terminals except FCT162XXXT Output and I/O terminals.
3. Output and I/O terminals for FCT162XXXT.
4
IDT54/74FCT16652T/AT/CT/ET, FCT162652T/AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
BUS
A
BUS
B
x
OEAB
x
OEBA
x
CLKAB
x
CLKBA
x
SAB
x
SBA
L
L
X
X
X
L
2549 drw 05
BUS
A
BUS
B
x
OEAB
x
OEBA
x
CLKAB
x
CLKBA
x
SAB
x
SBA
H
H
X
X
L
X
2549 drw 06
BUS
A
BUS
B
x
OEAB
x
OEBA
x
CLKAB
x
CLKBA
x
SAB
x
SBA
L
X
X
X
L
H
X
X
X
X
X
H
X
X
X
2549 drw 07
BUS
A
BUS
B
x
OEAB
x
OEBA
x
CLKAB
x
CLKBA
x
SAB
x
SBA
H
L
H or L
H
H or L
H
2549 drw 08
REAL-TIME TRANSFER
BUS B TO A
REAL-TIME TRANSFER
BUS A TO B
STORAGE FROM
A AND/OR B
TRANSFER STORED
DATA TO A AND/OR B
IDT54/74FCT16652T/AT/CT/ET, FCT162652T/AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
5
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 40
C to +85
C, V
CC
= 5.0V
10%; Military: T
A
= 55
C to +125
C, V
CC
= 5.0V
10%
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level
Guaranteed Logic HIGH Level
2.0
--
--
V
V
IL
Input LOW Level
Guaranteed Logic LOW Level
--
--
0.8
V
I
I H
Input HIGH Current (Input pins)
(5)
V
CC
= Max.
V
I
= V
CC
--
--
1
A
Input HIGH Current (I/O pins)
(5)
--
--
1
I
I L
Input LOW Current (Input pins)
(5)
V
I
= GND
--
--
1
Input LOW Current (I/O pins)
(5)
--
--
1
I
OZH
High Impedance Output Current
V
CC
= Max.
V
O
= 2.7V
--
--
1
A
I
OZL
(3-State Output pins)
(5)
V
O
= 0.5V
--
--
1
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
--
0.7
1.2
V
I
OS
Short Circuit Current
V
CC
= Max., V
O
= GND
(3)
80
140
225
mA
V
H
Input Hysteresis
--
--
100
--
mV
I
CCL
I
CCH
I
CCZ
Quiescent Power Supply Current
V
CC
= Max., V
IN
= GND or V
CC
--
5
500
A
OUTPUT DRIVE CHARACTERISTICS FOR FCT162652T
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
ODL
Output LOW Current
V
CC
= 5V, V
IN
= V
IH
or
V
IL,
V
OUT
= 1.5V
(3)
60
115
200
mA
I
ODH
Output HIGH Current
V
CC
= 5V, V
IN
= V
IH
or V
IL,
V
OUT
= 1.5V
(3)
60
115
200
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= 16mA MIL.
I
OH
= 24mA COM'L.
2.4
3.3
--
V
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 16mA MIL.
I
OL
= 24mA COM'L.
--
0.3
0.55
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25
C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is
5
A at T
A
= 55
C.
OUTPUT DRIVE CHARACTERISTICS FOR FCT16652T
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
O
Output Drive Current
V
CC
= Max., V
O
= 2.5V
(3)
50
--
180
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
I
OH
= 3mA
2.5
3.5
--
V
V
IN
= V
IH
or V
IL
I
OH
= 12mA MIL.
I
OH
= 15mA COM'L.
2.4
3.5
--
V
I
OH
= 24mA MIL.
I
OH
= 32mA COM'L.
(4)
2.0
3.0
--
V
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 48mA MIL.
I
OL
= 64mA COM'L.
--
0.2
0.55
V
I
OFF
Input/Output Power Off Leakage
(5)
V
CC
= 0V, V
IN
or V
O
4.5V
--
--
1
A
2549 lnk 05
2549 lnk 06
2549 lnk 07
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