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Электронный компонент: IDT54FCT299CP

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Integrated Device Technology, Inc.
FAST CMOS
8-INPUT UNIVERSAL
SHIFT REGISTER
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a registered trademark of National Semiconductor Co.
FEATURES:
IDT54/74FCT299 equivalent to FAST
TM
speed
IDT54/74FCT299A 25% faster than FAST
IDT54/74FCT299C 35% faster than FAST
Equivalent to FAST output drive over full temperature
and voltage supply extremes
I
OL
= 48mA (commercial) and 32mA (military)
CMOS power levels (1mW typ. static)
TTL input and output level compatible
CMOS output level compatible
Substantially lower input current levels than FAST
(5
A max.)
8-input universal shift register
JEDEC standard pinout for DIP and LCC
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing# 5962-86862 is listed on this
function. Refer to section 2.
DESCRIPTION:
The IDT54/74FCT299 and IDT54/74FCT299A/C are built
using an advanced dual metal CMOS technology. The IDT54/
74FCT299 and IDT54/74FCT299A/C are 8-input universal
shift/storage registers with 3-state outputs. Four modes of
operation are possible: hold (store), shift left, shift right and
load data. The parallel load inputs and flip-flop outputs are
multiplexed to reduce the total number of package pins.
Additional outputs are provided for flip-flops Q
0
and Q
7
to
allow easy serial cascading. A separate active LOW Master
Reset is used to reset the register.
FUNCTIONAL BLOCK DIAGRAM
C
D
D
C
P
Q
C
D
D
C
P
Q
C
D
D
C
P
Q
C
D
D
C
P
Q
C
D
D
C
P
Q
C
D
D
C
P
Q
C
D
D
C
P
Q
C
D
D
C
P
Q
I/O
6
I/O
5
I/O
4
I/O
3
I/O
2
I/O
1
I/O
0
I/O
7
Q
7
DS
7
OE
2
OE
1
MR
Q
0
CP
DS
0
S
1
S
0
2561 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
MAY 1992
1994 Integrated Device Technology, Inc.
7.11
DSC-4604/3
IDT54/74FCT299
IDT54/74FCT299A
IDT54/74FCT299C
1
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.11
2
PIN CONFIGURATIONS
DIP/SOIC/CERPACK
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Commercial
Military
Unit
V
TERM
(2)
Terminal Voltage
0.5 to +7.0 0.5 to +7.0
V
with Respect
to GND
V
TERM
(3)
Terminal Voltage
0.5 to V
CC
0.5 to V
CC
V
with Respect
to GND
T
A
Operating
0 to +70
55 to +125
C
Temperature
T
BIAS
Temperature
55 to +125 65 to +135
C
Under Bias
T
STG
Storage
55 to +125 65 to +150
C
Temperature
P
T
Power Dissipation
0.5
0.5
W
I
OUT
DC Output Current
120
120
mA
NOTES:
2561 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed Vcc by +0.5 unless otherwise noted.
2. Inputs and V
CC
terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE
(T
A
= +25
C, f = 1.0MHz)
Symbol
Parameter
(1)
Conditions
Typ. Max. Unit
C
IN
Input Capacitance
V
IN
= 0V
6
10
pF
C
I/O
I/O Capacitance
V
OUT
= 0V
8
12
pF
NOTE:
2561 tbl 04
1. This parameter is guaranteed by characterization data and not tested.
FUNCTION TABLE
(1)
Inputs
MR
MR
S
1
S
0
CP
Response
L
X
X
X
Asynchronous Reset Q
0
Q
7
= LOW
H
H
H
Parallel Load; I/O
n
Q
n
H
L
H
Shift Right; DS
0
Q
0
, Q
0
Q
1
, etc.
H
H
L
Shift Left; DS
7
Q
7
, Q
7
Q
6
, etc.
H
L
L
X
Hold
NOTE:
2561 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
= LOW-to-HIGH clock transition
5
6
7
8
S
0
OE
1
1
2
3
4
20
19
18
17
16
15
14
13
Vcc
P20-1
D20-1
S020-2
&
E20-1
OE
2
I/O
6
I/O
4
I/O
2
GND
S
1
DS
7
Q
7
I/O
7
I/O
5
I/O
I/O
1
I/O
0
Q
0
MR
9
10
12
11
3
CP
DS
0
PIN DESCRIPTION
Pin Names
Description
CP
Clock Pulse Input (Active Edge Rising)
DS
0
Serial Data Input for Right Shift
DS
7
Serial Data Input for Left Shift
S
0
, S
1
Mode Select Inputs
MR
Asynchronous Master Reset Input (Active LOW)
OE
1
,
OE
2
3-State Output Enable Inputs (Active LOW)
I/O
0
I/O
7
Parallel Data Inputs or 3-State Parallel Outputs
Q
0
, Q
7
Serial Outputs
2561 tbl 01
4
5
6
7
8
L20-2
18
17
16
15
14
INDEX
2561 drw 02
Vcc
GND
I/O
6
I/O
4
I/O
2
I/O
0
Q
0
MR
I/O
1
CP
DS
0
DS
7
Q
7
S
1
S
0
OE
1
OE
2
I/O
7
I/O
5
I/O
3
9 10 11 12 13
3
2
1
20 19
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.11
3
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
0.2V
Commercial: T
A
= 0
C to +70
C, V
CC
= 5.0V
5%; Military: T
A
= 55
C to +125
C, V
CC
= 5.0V
10%
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level
Guaranteed Logic HIGH Level
2.0
--
--
V
V
IL
Input LOW Level
Guaranteed Logic LOW Level
--
--
0.8
V
I
IH
Input HIGH Current
V
CC
= Max.
V
I
= V
CC
--
--
5
A
(Except I/O Pins)
V
I
= 2.7V
--
--
5
(4)
I
IL
Input LOW Current
V
I
= 0.5V
--
--
5
(4)
(Except I/O Pins)
V
I
= GND
--
--
5
I
IH
Input HIGH Current
V
CC
= Max.
V
I
= V
CC
--
--
15
A
(I/O Pins Only)
V
I
= 2.7V
--
--
15
(4)
I
IL
Input LOW Current
V
I
= 0.5V
--
--
15
(4)
(I/O Pins Only)
V
I
= GND
--
--
15
V
IK
Clamp Diode Voltage
Vcc = Min., I
N
= 18mA
--
0.7
1.2
V
I
OS
Short Circuit Current
Vcc = Max.
(3)
, V
O
= GND
60
120
--
mA
V
OH
Output HIGH Voltage
Vcc = 3V, V
IN
= V
LC
or V
HC
, I
OH
= 32
A
V
HC
V
CC
--
V
Vcc = Min.
I
OH
= 300
A
V
HC
V
CC
--
V
IN
= V
IH
or V
IL
I
OH
= 12mA MIL.
2.4
4.3
--
I
OH
= 15mA COM'L.
2.4
4.3
--
V
OL
Output LOW Voltage
Vcc = 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300
A
--
GND
V
LC
V
Vcc = Min.
I
OL
= 300
A
--
GND
V
LC
(4)
V
IN
= V
IH
or V
IL
I
OL
= 32mA MIL.
--
0.3
0.5
I
OL
= 48mA COM'L.
--
0.3
0.5
NOTES:
2561 tbl 05
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25
C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.11
4
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
0.2V
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply
Vcc = Max.
--
0.2
1.5
mA
Current
V
IN
V
HC
; V
IN
V
LC
I
CC
Quiescent Power Supply
Vcc = Max.
--
0.5
2.0
mA
Current TTL Inputs HIGH
V
IN
= 3.4V
(3)
I
CCD
Dynamic Power Supply
Vcc = Max.
V
IN
V
HC
--
0.15
0.25
mA/MHz
Current
(4)
Outputs Open
V
IN
V
LC
OE
1
=
OE
2
= GND
MR
= V
CC
S
0
= S
1
= V
CC
DS
0
= DS
1
= GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply
Vcc = Max.
V
IN
V
HC
--
1.7
4.0
mA
Current
(6)
Outputs Open
V
IN
V
LC
f
CP
= 10MHz
(FCT)
50% Duty Cycle
OE
1
=
OE
2
= GND
MR
= V
CC
S
0
= S
1
= V
CC
DS
0
= DS
7
= GND
V
IN
= 3.4V
--
2.2
6.0
One Bit Toggling
V
IN
= GND
at f
i
= 5MHz
50% Duty Cycle
Vcc = Max.
V
IN
V
HC
--
4.0
7.8
(5)
Outputs Open
V
IN
V
LC
f
CP
= 10MHz
(FCT)
50% Duty Cycle
OE
1
=
OE
2
= GND
MR
= V
CC
S
0
= S
1
= V
CC
DS
0
= DS
7
= GND
V
IN
= 3.4V
--
6.2
16.8
(5)
Eight Bits Toggling
V
IN
= GND
at f
i
= 2.5MHz
50% Duty Cycle
NOTES:
2561 tbl 06
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25
C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.11
5
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT299
IDT54/74FCT299A
IDT54/74FCT299C
Com'l.
Mil.
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition
(1)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH
Propagation Delay
C
L
= 50pF
2.0
10.0
2.0
14.0
2.0
7.2
2.0
9.5
2.0
6.5
2.0
7.5
ns
t
PHL
CP to Q
0
or Q
7
R
L
= 500
t
PLH
Propagation Delay
2.0
12.0
2.0
12.0
2.0
7.2
2.0
9.5
2.0
6.5
2.0
7.5
ns
t
PHL
CP to I/O
n
t
PHL
Propagation Delay
2.0
10.0
2.0
10.5
2.0
7.2
2.0
9.5
2.0
6.5
2.0
7.5
ns
MR
to Q
0
or Q
7
t
PHL
Propagation Delay
2.0
15.0
2.0
15.0
2.0
8.7
2.0
11.5
2.0
6.5
2.0
7.5
ns
MR
to I/O
n
t
PZH
Output Enable Time
1.5
11.0
1.5
15.0
1.5
6.5
1.5
7.5
1.5
6.5
1.5
7.5
ns
t
PZL
OE
n
to I/O
n
t
PHZ
Output Disable Time
1.5
7.0
1.5
9.0
1.5
6.0
1.5
6.5
1.5
6.0
1.5
6.5
ns
t
PLZ
OE
n
to I/O
n
t
SU
Set-up Time HIGH
7.5
--
7.5
--
3.5
--
4.0
--
3.5
--
4.0
--
ns
or LOW
S
0
or S
1
to CP
t
H
Hold Time HIGH
1.0
--
1.0
--
1.0
--
1.0
--
1.0
--
1.0
--
ns
or LOW
S
0
or S
1
to CP
t
SU
Set-up Time HIGH
5.5
--
5.5
--
4.0
--
4.5
--
4.0
--
4.5
--
ns
or LOW I/O
n
, DS
0
or DS
7
to CP
t
H
Hold Time HIGH
1.5
--
1.5
--
1.5
--
1.5
--
1.5
--
1.5
--
ns
or LOW I/O
n
, DS
0
or DS
7
to CP
t
W
CP Pulse width
7.0
--
7.0
--
5.0
--
6.0
--
5.0
--
6.0
--
ns
HIGH or LOW
t
W
MR
Pulse Width
7.0
--
7.0
--
5.0
--
6.0
--
5.0
--
6.0
--
ns
LOW
t
REM
Recovery Time
7.0
--
7.0
--
5.0
--
6.0
--
5.0
--
6.0
--
ns
MR
to CP
NOTES:
2561 tbl 07
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.