IDT54/74FCT543T/AT/CT/DT
IDT54/74FCT2543T/AT/CT
Integrated Device Technology, Inc.
FAST CMOS
OCTAL LATCHED
TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
JANUARY 1995
1995 Integrated Device Technology, Inc.
6.17
DSC-4203/5
DESCRIPTION:
The FCT543T/FCT2543T is a non-inverting octal trans-
ceiver built using an advanced dual metal CMOS technology.
This device contains two sets of eight D-type latches with
separate input and output controls for each set. For data flow
from A to B, for example, the A-to-B Enable (
CEAB
) input must
be LOW in order to enter data from A
0
A
7
or to take data from
B
0
B
7
, as indicated in the Function Table. With
CEAB
LOW,
a LOW signal on the A-to-B Latch Enable (
LEAB
) input makes
the A-to-B latches transparent; a subsequent LOW-to-HIGH
transition of the
LEAB
signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With
CEAB
and
OEAB
both LOW, the 3-state B output buffers
are active and reflect the data present at the output of the A
latches. Control of data from B to A is similar, but uses the
CEBA
,
LEBA
and
OEBA
inputs.
The FCT2543T has balanced output drive with current
limiting resistors. This offers low ground bounce, minimal
undershoot and controlled output fall times-reducing the need
for external series terminating resistors. FCT2xxxT parts are
plug-in replacements for FCTxxxT parts.
1
FEATURES:
Common features:
Low input and output leakage
1
A (max.)
CMOS power levels
True TTL input and output compatibility
V
OH
= 3.3V (typ.)
V
OL
= 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
Available in DIP, SOIC, SSOP, QSOP, CERPACK
and LCC packages
Features for FCT543T:
Std., A, C and D speed grades
High drive outputs (-15mA I
OH
, 64mA I
OL
)
Power off disable outputs permit "live insertion"
Features for FCT2543T:
Std., A, and C speed grades
Resistor outputs
(-15mA I
OH
, 12mA I
OL
Com.)
(-12mA I
OH
, 12mA I
OL
Mil.)
Reduced system switching noise
2613 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FUNCTIONAL BLOCK DIAGRAM
A
1
Q
OEBA
A
2
A
3
A
4
A
5
A
6
A
7
B
1
B
2
B
3
B
4
B
5
B
6
B
7
CEBA
LEBA
OEAB
CEAB
LEAB
DETAIL A x 7
D
LE
Q
D
LE
DETAIL A
A
0
B
0
IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.17
2
PIN CONFIGURATIONS
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
5
6
7
8
9
10
11
12
GND
A
0
A
1
A
2
1
2
3
4
24
23
22
21
20
19
18
17
Vcc
16
15
14
13
P24-1
D24-1
SO24-2
SO24-7
SO24-8
&
E24-1
B
0
A
3
A
4
A
5
A
6
A
7
B
1
B
2
B
3
B
4
B
5
B
6
B
7
LEAB
OEAB
LEBA
OEBA
CEAB
CEBA
LCC
TOP VIEW
5
6
7
8
9
10
11
L28-1
25
24
23
22
21
20
19
INDEX
A
1
A
2
A
3
A
4
A
5
A
6
NC
Vcc
GND
NC
NC
NC
B
1
B
2
B
3
B
4
B
5
B
6
A
0
LEBA
OEBA
B
0
CEBA
A
7
CEAB
B
7
LEAB
OEAB
12 13 14 15 16 17 18
4
3
2
1
28 27 26
2613 drw 02
2613 drw 03
FUNCTION TABLE
(1, 2)
For A-to-B (Symmetric with B-to-A)
Latch
Output
Inputs
Status
Buffers
CEAB
CEAB
LEAB
LEAB
OEAB
OEAB
A-to-B
B
0
B
7
H
--
--
Storing
High Z
--
H
--
Storing
--
--
--
H
--
High Z
L
L
L
Transparent
Current A Inputs
L
H
L
Storing
Previous* A Inputs
NOTES:
2613 tbl 02
1. * Before
LEAB
LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
-- = Don't Care or Irrelevant
2. A-to-B data flow shown; B-to-A flow control is the same, except using
CEBA
,
LEBA
and
OEBA
.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Commercial
Military
Unit
V
TERM(2)
Terminal Voltage
with Respect to
GND
0.5 to +7.0
0.5 to +7.0
V
V
TERM(3)
Terminal Voltage
with Respect to
GND
0.5 to
V
CC
+0.5
0.5 to
V
CC
+0.5
V
T
A
Operating
Temperature
0 to +70
55 to +125
C
T
BIAS
Temperature
Under Bias
55 to +125
65 to +135
C
T
STG
Storage
Temperature
55 to +125
65 to +150
C
P
T
Power Dissipation
0.5
0.5
W
I
OUT
DC Output
Current
60 to +120 60 to +120 mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
V
CC
by +0.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
2613 lnk 03
PIN DESCRIPTION
Pin Names
Description
OEAB
A-to-B Output Enable Input (Active LOW)
OEBA
B-to-A Output Enable Input (Active LOW)
CEAB
A-to-B Enable Input (Active LOW)
CEBA
B-to-A Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input (Active LOW)
LEBA
B-to-A Latch Enable Input (Active LOW)
A
0
A
7
A-to-B Data Inputs or B-to-A 3-State Outputs
B
0
B
7
B-to-A Data Inputs or A-to-B 3-State Outputs
2613 tbl 01
CAPACITANCE
(T
A
= +25
C, f = 1.0MHz)
Symbol
Parameter
(1)
Conditions
Typ.
Max. Unit
C
IN
Input
Capacitance
V
IN
= 0V
6
10
pF
C
OUT
Output
Capacitance
V
OUT
= 0V
8
12
pF
NOTE:
1. This parameter is measured at characterization but not tested.
2613 lnk 04
IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.17
3
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 0
C to +70
C, V
CC
= 5.0V
5%; Military: T
A
= 55
C to +125
C, V
CC
= 5.0V
10%
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level
Guaranteed Logic HIGH Level
2.0
--
--
V
V
IL
Input LOW Level
Guaranteed Logic LOW Level
--
--
0.8
V
I
I H
Input HIGH Current
(4)
V
CC
= Max.
V
I
= 2.7V
--
--
1
A
I
I L
Input LOW Current
(4)
V
I
= 0.5V
--
--
1
I
OZH
High Impedance Output Current
V
CC
= Max.
V
O
= 2.7V
--
--
1
A
I
OZL
(3-State Output pins)
(4)
V
O
= 0.5V
--
--
1
I
I
Input HIGH Current
(4)
V
CC
= Max., V
I
= V
CC
(Max.)
--
--
1
A
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18mA
--
0.7
1.2
V
V
H
Input Hysteresis
--
--
200
--
mV
I
CC
Quiescent Power Supply Current
V
CC
= Max., V
IN
= GND or V
CC
--
0.01
1
mA
2613 lnk 05
OUTPUT DRIVE CHARACTERISTICS FOR 543T/AT/CT/DT
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= 6mA MIL.
I
OH
= 8mA COM'L.
2.4
3.3
--
V
I
OH
= 12mA MIL.
I
OH
= 15mA COM'L.
2.0
3.0
--
V
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 48mA MIL.
I
OL
= 64mA COM'L.
--
0.3
0.55
V
I
OS
Short Circuit Current
V
CC
= Max., V
O
= GND
(3)
60
120
225
mA
I
OFF
Input/Output Power Off Leakage
(5)
V
CC
= 0V, V
IN
or V
O
4.5V
--
--
1
A
2613 lnk 06
OUTPUT DRIVE CHARACTERISTICS FOR 2543T/AT/CT/DT
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
ODL
Output LOW Current
V
CC
= 5V, V
IN
= V
IH
or
V
IL,
V
OUT
= 1.5V
(3)
16
48
--
mA
I
ODH
Output HIGH Current
V
CC
= 5V, V
IN
= V
IH
or V
IL,
V
OUT
= 1.5V
(3)
16
48
--
mA
V
OH
Output HIGH Voltage
V
CC
= Min.
V
IN
= V
IH
or
V
IL
I
OH
= 12mA MIL.
I
OH
= 15mA COM'L.
2.4
3.3
--
V
V
OL
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 12mA
--
0.3
0.50
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25
C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is
5
A at T
A
= 55
C.
5. This parameter is guaranteed but not tested.
2613 lnk 07
IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.17
4
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions
(1)
Min. Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply
V
CC
= Max.
--
0.5
2.0
mA
Current TTL Inputs HIGH
V
IN
= 3.4V
(3)
I
CCD
Dynamic Power Supply Current
(4)
V
CC
= Max., Outputs Open
V
IN
= V
CC
FCTxxxT
--
0.15
0.25
mA/
CEAB
and
OEAB
= GND
V
IN
= GND
MHz
CEBA
= V
CC
FCT2xxxT
--
0.06
0.12
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max., Outputs Open
V
IN
= V
CC
FCTxxxT
--
1.5
3.5
mA
f
CP
= 10MHz (
LEAB
)
V
IN
= GND
50% Duty Cycle
FCT2xxxT
--
0.6
2.2
CEAB
and
OEAB
= GND
CEBA
= V
CC
V
IN
= 3.4V
FCTxxxT
--
2.0
5.5
One Bit Toggling
V
IN
= GND
at f
i
= 5MHz
FCT2xxxT
--
1.1
4.2
50% Duty Cycle
V
CC
= Max., Outputs Open
V
IN
= V
CC
FCTxxxT
--
3.8
7.3
(5)
f
CP
= 10MHz (
LEAB
)
V
IN
= GND
50% Duty Cycle
FCT2xxxT
--
1.5
4.0
(5)
CEAB
and
OEAB
= GND
CEBA
= V
CC
V
IN
= 3.4V
FCTxxxT
--
6.0
16.3
(5)
Eight Bits Toggling
V
IN
= GND
at f
i
= 2.5MHz
FCT2xxxT
--
3.8
13.0
(5)
50% Duty Cycle
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25
C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP/
2 + f
i
N
i
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
2613 tbl 08
IDT54/74FCT543T/AT/CT/DT - 2543T/AT/CT
FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.17
5
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
NOTES:
2513 tbl 10
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This limit is guaranteed but not tested.
2513 tbl 09
FCT543T/
FCT2543T
FCT543AT/
FCT2543AT
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition
(1)
Min
.
(2)
Max.
Min
.
(2)
Max.
Min
.
(2)
Max.
Min
.
(2)
Max.
Unit
t
PLH
t
PHL
Propagation Delay
Transparant Mode
An to Bn or Bn to An
C
L
= 50pF
R
L
= 500
1.5
8.5
1.5
10.0
1.5
6.5
1.5
7.5
ns
t
PLH
t
PHL
Propagation Delay
LEBA
to An,
LEAB
to Bn
1.5
12.5
1.5
14.0
1.5
8.0
1.5
9.0
ns
t
PZH
t
PZL
Output Enable Time
OEBA
or
OEAB
to An or Bn
CEBA
or
CEAB
to An or Bn
1.5
12.0
1.5
14.0
1.5
9.0
1.5
10.0
ns
t
PHZ
t
PLZ
Output Disable Time
OEBA
or
OEAB
to An or Bn
CEBA
or
CEAB
to An or Bn
1.5
9.0
1.5
13.0
1.5
7.5
1.5
8.5
ns
t
SU
Set-up Time, HIGH or LOW
An or Bn to
LEBA
or
LEAB
3.0
--
3.0
--
2.0
--
2.0
--
ns
t
H
Hold Time, HIGH or LOW
An or Bn to
LEBA
or
LEAB
2.0
--
2.0
--
2.0
--
2.0
--
ns
t
W
LEBA
or
LEAB
Pulse Width
LOW
5.0
--
5.0
--
5.0
--
5.0
--
ns
FCT543CT/
FCT2543CT
FCT543DT
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition
(1)
Min
.
(2)
Max.
Min
.
(2)
Max.
Min
.
(2)
Max.
Min
.
(2)
Max.
Unit
t
PLH
t
PHL
Propagation Delay
Transparant Mode
An to Bn or Bn to An
C
L
= 50pF
R
L
= 500
1.5
5.3
1.5
6.1
1.5
4.4
--
--
ns
t
PLH
t
PHL
Propagation Delay
LEBA
to An,
LEAB
to Bn
1.5
7.0
1.5
8.0
1.5
5.0
--
--
ns
t
PZH
t
PZL
Output Enable Time
OEBA
or
OEAB
to An or Bn
CEBA
or
CEAB
to An or Bn
1.5
8.0
1.5
9.0
1.5
5.4
--
--
ns
t
PHZ
t
PLZ
Output Disable Time
OEBA
or
OEAB
to An or Bn
CEBA
or
CEAB
to An or Bn
1.5
6.5
1.5
7.5
1.5
4.3
--
--
ns
t
SU
Set-up Time, HIGH or LOW
An or Bn to
LEBA
or
LEAB
2.0
--
2.0
--
1.5
--
--
--
ns
t
H
Hold Time, HIGH or LOW
An or Bn to
LEBA
or
LEAB
2.0
--
2.0
--
1.5
--
--
--
ns
t
W
LEBA
or
LEAB
Pulse Width
LOW
5.0
--
5.0
--
3.0
(3)
--
--
--
ns
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