1
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 1999
1999 Integrated Device Technology, Inc.
DSC-2538/6
c
IDT54/74FCT621T/AT
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS
OCTAL BUS TRANSCEIVER
(OPEN DRAIN)
DESCRIPTION:
The IDT54/74FCT621T/AT is an octal transceiver with non-inverting
Open-Drain bus compatible outputs in both send and receive directions.
The B bus outputs are capable of sinking 64mA providing very good
capacitive drive characteristics. These octal bus transceivers are designed
for asynchronous two-way communication between data buses. The
control function implementation allows for maximum flexibility in timing.
FUNCTIONAL BLOCK DIAGRAM
FEATURES:
-
Std. and A speed grades
-
Low input and output leakage
1 A (max.)
-
Extended commercial range of 40C to +85C
-
CMOS power levels
-
True TTL input and output compatibility
V
OH
= 3.3V (typ.)
V
OL
= 0.3V (typ.)
-
Power off disable outputs permit "live insertion"
-
Meets or exceeds JEDEC standard 18 specifications
-
Product available in Radiation Tolerant and Radiation Enhanced
versions
-
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
-
Available in DIP, SOIC, CERPACK and LCC packages
GBA
GAB
A
1
B
1
A
2
-A
8
B
2
-B
8
SEVEN O TH ER TRAN S CEIV ERS
2
18
19
1
2
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
PIN CONFIGURATION
DIP/ SOIC/ CERPACK
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Max.
Unit
V
TERM(2)
Terminal Voltage with Respect to GND
0.5 to +7
V
V
TERM(3)
Terminal Voltage with Respect to GND
0.5 to V
CC
+0.5
V
T
STG
Storage Temperature
65 to +150
C
I
OUT
DC Output Current
65 to +120
mA
8T-link
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability. No
terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE (T
A
= +25
O
C, f = 1.0MHz)
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
10
pF
C
OUT
Output Capacitance
V
OUT
= 0V
8
12
pF
8T-link
NOTE:
1. This parameter is measured at characterization but not tested.
1
2
3
4
5
7
9
6
8
10
11
12
13
14
15
16
17
18
19
20
L20-2
B
3
B
1
B
2
B
4
B
5
GA
B
A
2
A
1
V
CC
A
8
GND
B
8
B
7
B
6
INDEX
A
3
A
4
A
7
A
5
A
6
GB
A
2
3
1
1 6
1 5
1 4
1 1
1 9
1 8
2 0
1 7
1 3
1 2
5
6
7
4
P20-1
D20-1
SO 20-2
E20-1
8
9
1 0
A
2
A
1
V
CC
A
3
A
6
A
4
A
5
A
7
GND
GBA
B
2
B
8
B
1
B
3
B
6
B
4
B
5
B
7
GAB
A
8
LCC
TOP VIEW
PIN DESCRIPTION
Pin Names
Description
GBA, GAB
Enable Inputs
A
1
A
8
A Inputs or Open-drain Outputs
B
1
B
8
B Inputs or Open-drain Outputs
FUNCTION TABLE
(1)
Enable Inputs
GBA
GAB
Function
L
L
B data to A bus
H
H
A data to B bus
H
L
OFF
L
H
B data to A bus
A data to B bus
NOTE:
1. H = HIGH Voltage Level.
L = LOW Voltage Level.
OFF = HIGH if pull-up resistor is connected to Open-Drain output.
3
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following conditions Apply Unless Otherwise Specified:
Commercial: T
A
= 40C to +85C, V
CC
= 5.0V 5%; Military: T
A
= 55C to +125C, V
CC
= 5.0V 10%
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
V
IH
Input HIGH Level
Guaranteed Logic HIGH Level
2
--
--
V
V
IL
Input LOW Level
Guaranteed Logic LOW Level
--
--
0.8
V
I
IH
Input HIGH Current
(4)
V
CC
= Max., V
I
= 2.7V
--
--
1
A
I
IL
Input LOW Current
(4)
V
CC
= Max., V
I
= 0.5V
--
--
1
A
I
I
Input HIGH Current
(4)
V
CC
= Max., V
I
= V
CC
(Max.)
--
--
1
A
V
IK
Clamp Diode Voltage
V
CC
= Min., I
N
= 18mA
--
0.7
1.2
V
I
OH
Output HIGH Current
V
CC
= Max.
V
OH
= Vcc (Max.)
--
--
20
A
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
V
CC
= Min.
I
OL
= 48mA MIL.
(3)
--
0.3
0.55
V
(B Bus)
V
IN
= V
IH
or V
IL
I
OL
= 64mA COM'L.
V
OL
Output LOW Voltage
V
CC
= Min.
I
OL
= 32mA MIL.
(3)
--
0.3
0.5
V
(A Bus)
V
IN
= V
IH
or V
IL
I
OL
= 48mA COM'L.
I
OFF
Input/Output Power Off
V
CC
= 0V, V
IN
or V
O
- 4.5V
--
--
1
A
Leakage
(4)
V
H
Input Hysteresis
--
--
200
--
mV
I
CC
Quiescent Power Supply
V
CC
= max., V
IN
= GND or Vcc
--
0.01
1
mA
Current
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25C ambient.
3. These are maximum I
OL
values per output, for 8 outputs turned on simultaneously. Total maximum I
OL
(all outputs) is 512mA for commercial and 384mA
for military. Derate I
OL
for number of outputs exceeding 8 turned on simultaneously.
4. The test limit for this parameter is 5A at T
A
= 55C.
4
MILITARY AND COMMERCIAL TEMPERATURE RANGES
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Unit
I
CC
Quiescent Power Supply Current
V
CC
= Max.
--
0.5
2
mA
TTL Inputs HIGH
V
IN
= 3.4V
(3)
I
CCD
Dynamic Power Supply Current
(4)
Vcc = Max.
V
IN
= V
CC
--
0.15
0.25
mA/MHz
Outputs Open
V
IN
= GND
GBA = GAB = GND or V
CC
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6,7)
Vcc = Max.
V
IN
= V
CC
--
1.5
3.5
mA
Outputs Open
V
IN
= GND
GBA = GAB = GND or V
CC
One Bit Toggling
V
IN
= 3.4V
--
1.8
4.5
at f
i
=10MHz
V
IN
= GND
50% Duty Cycle
Vcc = Max.
V
IN
= V
CC
--
3
6
(5)
Outputs Open
V
IN
= GND
GBA = GAB = GND or V
CC
Eight Bits Toggling
V
IN
= 3.4V
--
5
14.0
(5)
at f
i
= 2.5MHz
V
IN
= GND
50% Duty Cycle
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
7. This test is performed with outputs tied to GND through a pull-down resistor.
IDT54/74FCT621T
IDT54/74FCT621AT
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition
(1)
Min.
(2)
Max.
Min.
(2)
Max.
Min.
(2)
Max.
Min.
(2)
Max.
Unit
t
PLH
Propagation Delay A to B
C
L
= 50pF
5.5
13
5.5
13.5
5.5
12
5.5
12.5
ns
t
PHL
R
L
= 500
1.5
8.5
1.5
9.5
1.5
6.8
1.5
7.6
t
PLH
Propagation Delay B to A
5.5
12.5
5.5
13
5.5
12
5.5
12.5
ns
t
PHL
1.5
8
1.5
9
1.5
6.4
1.5
7.2
t
PLH
Propagation Delay
GBA to A
5.5
14
5.5
14.5
5.5
13
5.5
13.5
ns
t
PHL
1.5
8.5
1.5
9.5
1.5
6.8
1.5
7.6
t
PLH
Propagation Delay GAB to B
5.5
14
5.5
14.5
5.5
13
5.5
13.5
ns
t
PHL
1.5
8
1.5
9
1.5
6.4
1.5
7.2
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
IDT54/74FCT621T/AT
FAST CMOS OCTAL BUS TRANSCEIVER (OPEN DRAIN)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
IN PU T
TIM IN G
IN PU T
ASYN CH R ON OUS C ON TROL
PRES ET
CLEAR
ETC.
SYNC HRO N OU S CON TRO L
t
SU
t
H
t
REM
t
SU
t
H
HIGH-LOW -HIGH
PULSE
LO W -H IGH -LOW
PULSE
t
W
1.5V
1.5V
SAM E PHASE
IN PU T TR ANSITION
3V
1.5V
0V
1.5V
V
OH
t
PLH
OU TPUT
OPPOSITE P HASE
IN PU T TR ANSITION
3V
1.5V
0V
t
PLH
t
PH L
t
PH L
V
OL
CO NTR OL
IN PU T
3V
1.5V
0V
3.5V
0V
OU TPUT
NO RM A LLY
LO W
OU TPUT
NO RM A LLY
HIGH
SW ITC H
CLOSE D
SW ITC H
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
0V
1.5V
1.5V
ENAB LE
DISA BLE
V
OH
PRES ET
CLEAR
CLOC K ENABLE
ETC.
O ctal lin k
O ctal lin k
O ctal lin k
O ctal lin k
O ctal lin k
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
8-link
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
1.0MHz; t
F
2.5ns; t
R
2.5ns
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