Integrated Device Technology, Inc.
MILITARY TEMPERATURE RANGE
AUGUST 1996
1996 Integrated Device Technology, Inc.
2986/7
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FEATURES:
High speed (equal access and cycle time)
-- Military: 25/35/45/55/70/85ns (max.)
Low power consumption
Battery backup operation--2V data retention (L version
only)
JEDEC standard high-density 22-pin ceramic DIP, 22-pin
leadless chip carrier
Produced with advanced CMOS high-performance
technology
Separate data input and output
Input and output directly TTL-compatible
Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT7187 is a 65,536-bit high-speed static RAM
organized as 64K x 1. It is fabricated using IDT's high-
performance, high-reliability CMOS technology. Access times
as fast as 25ns are available.
Both the standard (S) and low-power (L) versions of the
IDT7187 provide two standby modes--I
SB
and I
SB1
. I
SB
provides low-power operation; I
SB1
provides ultra-low-power
operation. The low-power (L) version also provides the capa-
bility for data retention using battery backup. When using a 2V
battery, the circuit typically consumes only 30
W.
Ease of system design is achieved by the IDT7187 with full
asynchronous operation, along with matching access and
cycle times. The device is packaged in an industry standard
22-pin, 300 mil ceramic DIP, or 22-pin leadless chip carriers.
Military grade product is manufactured in compliance with
the latest revision of MIL-STD-883, Class B, making it ideally
suited to military temperature applications demanding the
highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
ROW
SELECT
65,536-BIT
MEMORY ARRAY
COLUMN I/O
2986 drw 01
WE
CS
V
CC
GND
DATA
OUT
A
A
A
A
A
A
A
A
A
A
A
A
A
A
DATA
IN
6.2
1
CMOS STATIC RAM
64K (64K x 1-BIT)
IDT7187S
IDT7187L
6.2
2
IDT7187S/L
CMOS STATIC RAM 64K (64K x 1-BIT)
MILITARY TEMPERATURE RANGE
PIN CONFIGURATIONS
2986 drw 02
5
6
7
8
9
10
11
1
2
3
4
22
21
20
19
18
17
D22-1
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
V
CC
A
15
A
13
A
12
16
15
GND
CS
14
A
14
WE
DATA
OUT
A
11
13
12
A
10
A
9
A
8
DATA
IN
DIP
TOP VIEW
22-PIN LCC
TOP VIEW
5
6
7
8
9
L22-1
20
19
18
17
10 11 12 13
2
1
22 21
INDEX
A
4
V
CC
GND
WE
A
14
A
13
A
12
16
15
A
2
A
3
A
0
2986 drw 03
A
5
A
6
14
A
11
A
10
A
7
4
DATA
OUT
A
9
A
8
A
15
DATA
IN
CS
3
A
1
TRUTH TABLE
(1)
Mode
CS
CS
WE
WE
Output
Power
Standby
H
X
High-Z
Standby
Read
L
H
D
OUT
Active
Write
L
L
High-Z
Active
NOTE:
2986 tbl 02
1. H = V
IH
, L = V
IL
, X = don't care.
PIN DESCRIPTIONS
Name
Description
A
0
A
15
Address Inputs
CS
Chip Select
WE
Write Enable
V
CC
Power
DATA
IN
Data Input
DATA
OUT
Data Output
GND
Ground
2986 tbl 01
6.2
3
IDT7187S/L
CMOS STATIC RAM 64K (64K x 1-BIT)
MILITARY TEMPERATURE RANGE
CAPACITANCE
(T
A
= +25
C, F = 1.0MH
Z
)
Symbol
Parameter
(1)
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
8
pF
C
OUT
Output Capacitance
V
OUT
= 0V
8
pF
NOTE:
2986 tbl 04
1. This parameter is determined by device characterization, but is not
production tested.
RECOMMENDED DC OPERATING
CONDITIONS
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
4.5
5.0
5.5
V
G
ND
Supply Voltage
0
0
0
V
V
IH
Input High Voltage
2.2
--
6.0
V
V
IL
Input Low Voltage
0.5
(1)
--
0.8
V
NOTE:
2986 tbl 05
1. V
IL
(min.) = 3.0V for pulse width less than 20ns, once per cycle.
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade
Temperature
GND
V
CC
Military
55
C to +125
C
0V
5V
10%
Commercial
0
C to +70
C
0V
5V
10%
2986 tbl 06
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
Com'l.
Mil.
Unit
V
TERM
Terminal Voltage 0.5 to +7.0 0.5 to +7.0
V
with Respect
to GND
T
A
Operating
0 to +70
55 to +125
C
Temperature
T
BIAS
Temperature
55 to +125 65 to +135
C
Under Bias
T
STG
Storage
55 to +125 65 to +150
C
Temperature
P
T
Power Dissipation
1.0
1.0
W
I
OUT
DC Output
50
50
mA
Current
NOTE:
2986 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V
10%)
IDT7187S
IDT7187L
Symbol
Parameter
Test Condition
Min.
Max.
Min.
Max.
Unit
|I
LI
|
Input Leakage Current
V
CC
= Max.,
MIL.
--
10
--
5
A
V
IN
= GND to V
CC
COM'L.
--
5
--
2
|I
LO
|
Output Leakage Current
V
CC
= Max.,
CS
= V
IH
,
MIL.
--
10
--
5
A
V
OUT
= GND to V
CC
COM'L.
--
5
--
2
V
OL
Output Low Voltage
I
OL
= 10mA, V
CC
= Min.
0.5
--
0.5
V
I
OL
= 8mA, V
CC
= Min.
--
0.4
--
0.4
V
OH
Output High Voltage
I
OH
= 4mA, V
CC
= Min.
2.4
--
2.4
--
V
2986 tbl 07
6.2
4
IDT7187S/L
CMOS STATIC RAM 64K (64K x 1-BIT)
MILITARY TEMPERATURE RANGE
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(L Version Only) V
HC
= V
CC
- 0.2V, V
LC
= 0.2V
Typ.
(1)
Max.
V
CC
@
V
CC
@
Symbol
Parameter
Test Condition
Min.
2.0v
3.0V
2.0V
3.0V
Unit
V
DR
V
CC
for Data Retention
--
2.0
--
--
--
--
V
I
CCDR
Data Retention Current
MIL.
--
10
15
600
900
A
COM'L.
--
10
15
150
225
t
CDR
(3)
Chip Deselect to Data
CS
V
HC
0
--
--
--
--
ns
Retention Time
V
IN
V
HC
or
V
LC
t
R
(3)
Operation Recovery Time
t
RC
(2)
--
--
--
--
ns
|I
LI
|
(3)
Input Leakage Current
--
--
--
2
2
A
NOTES:
2986 tbl 09
1. T
A
= +25
C.
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed, but not tested.
LOW V
CC
DATA RETENTION WAVEFORM
2986 drw 04
DATA
RETENTION
MODE
4.5V
4.5V
V
DR
2V
V
IH
V
IH
t
R
t
CDR
V
CC
CS
V
DR
DC ELECTRICAL CHARACTERISTICS
(1)
(V
CC
= 5V
10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V)
7187S25
7187S35
7187S45
7187S55/70
7187S85
7187L25
7187L35
7187L45
7187L55/70
7187L85
Symbol
Parameter
Power
Com'l.
Mil.
Com'l.
Mil.
Com'l.
Mil.
Com'l.
Mil.
Com'l.
Mil.
Unit
I
CC1
Operating Power
S
--
105
--
105
--
105
--
105
--
105
mA
Supply Current
CS
= V
IL
, Outputs Open
L
--
85
--
85
--
85
--
85
--
85
V
CC
= Max., f = 0
(2)
I
CC2
Dynamic Operating
S
--
130
--
120
--
120
--
120
--
120
mA
Current
CS
= V
IL
, Outputs Open
L
--
110
--
100
--
95
--
90
--
90
V
CC
= Max., f = f
MAX
(2)
I
SB
Standby Power Supply
S
--
55
--
50
--
50
--
50
--
50
mA
Current (TTL Level)
CS
V
IH
, V
CC
= Max.,
L
--
50
--
40
--
35
--
30/28
--
28
Outputs Open, f = f
MAX
(2)
I
SB1
Full Standby Power
S
--
20
--
20
--
20
--
20
--
20
mA
Supply Current (CMOS
Level)
CS
V
HC
,
L
--
1.5
--
1.5
--
1.5
--
1.5
--
1.5
V
CC
=Max., V
IN
V
HC
or
V
IN
V
LC
, f = 0
(2)
NOTES:
2986 tbl 08
1. All values are maximum guaranteed values.
2. At f = f
MAX
address and data inputs are cycling at the maximum frequency of read cycles of 1/t
RC
. f = 0 means no input lines change.
6.2
5
IDT7187S/L
CMOS STATIC RAM 64K (64K x 1-BIT)
MILITARY TEMPERATURE RANGE
AC TEST CONDITIONS
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
5ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
AC Test Load
See Figures 1 and 2
2986 tbl 10
Figure 1. AC Test Load
Figure 2. AC Test Load
(for t
HZ
, t
LZ
, t
WZ
and t
OW
)
*Includes scope and jig capacitances
2986 drw 05
480
30pF*
255
DATA
OUT
5V
2986 drw 06
480
5pF*
255
DATA
OUT
5V
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0V
10%, All Temperature Ranges)
7187S25
7187S35/45
(1)
7187S55
(1)
7187S70
(1)
7187S85
(1)
7187L25
7187L35/45
(1)
7187L55
(1)
7187L70
(1)
7187L85
(1)
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
t
RC
Read Cycle Time
25
--
35/45
--
55
--
70
--
85
--
ns
t
AA
Address Access Time
--
25
--
35/45
--
55
--
70
--
85
ns
t
ACS
Chip Select Access Time
--
25
--
35/45
--
55
--
70
--
85
ns
t
OH
Output Hold from Address Change
5
--
5
--
5
--
5
--
5
--
ns
t
LZ
(2)
Output Selection to Output in Low-Z
5
--
5
--
5
--
5
--
5
--
ns
t
HZ
(2)
Chip Deselect to Output in High-Z
--
12
--
17/20
--
30
--
30
--
40
ns
t
PU
(2)
Chip Select to Power-Up Time
0
--
0
--
0
--
0
--
0
--
ns
t
PD
(2)
Chip Deselect to Power-Down Time
--
20
--
30/35
--
35
--
35
--
40
ns
NOTES:
2986 tbl 11
1. 55
C to +125
C temperature range only.
2. This parameter guaranteed but not tested.
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