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Электронный компонент: IDT7M9250

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1999 Integrated Device Technology, Inc.
DSC-4278
JUNE 1999
DS-3 / E-3 ATM Adapter
in PCI Mezzanine Card (PMC)
Form-Factor
ADVANCED INFORMATION
IDT7M9250
FEATURES:
Bus Interface: 33Mhz, 5V, 32-bit PCI bus version 2.1
Electrical Compliance
Form-Factor: Single-Size Common Mezzanine Card (74mm x
149mm). Full Dimensional Compliance to Common Mezzanine
Card Specification IEEE P1386 v.2.0.
User selectable DS-3 / E-3 data rates supported.
Up to 4K simultaneous transmit and receive connections
supported.
DESCRIPTION:
The IDT7M9250 provides reliable, high performance Asynchronous Trans-
fer Mode over DS-3 / E-3 connectivity support for PCI Mezzanine Card (PMC)-
based systems. The IDT7M9250 is designed for mechanical and electrical
compliance with the Common Mezzanine Card Specification (IEEE1386) and
the PCI Mezzanine Card Specification (IEEE1386.1). This low-profile I/O card
is ideally suited to serve as an ATM Uplink on a Fast Ethernet switch or as ATM
I/O card mounted on a standard VME or Compact PCI Board.
OVERVIEW:
The central component of the IDT7M9250 is the IDT77252 NICSTARTM
Segmentation and Reassembly (SAR) controller. The IDT77252 SAR con-
nects directly to the PCI bus, a private SRAM/EPROM bus, and the Utopia PHY
interface. The IDT77252's PCI bus master interface provides efficient, low
latency DMA transfer capability over PCI. For further information on the
IDT77252 refer to the IDT77252 Datasheet and User's Manual located on the
IDT website (www.idt.com).
The PMC PM7345 PHY chip provides ATM cell mapping and Physical
Layer Convergence Protocol (PLCP) for DS-3 and E-3 transmission sys-
tems. The PM7345 directly interfaces to the SAR through Utopia bus and
to DS-3 / E-3 line interface unit.
BLOCK DIAGRAM
ID T 7 7252
A B R S A R
D S 3/T 3
C lock
G eneratio n
XR T 7 300
D S 3/T 3
L IU
Local S R A M
(12 8K x3 2)
P M 734 5
D S 3/T 3
A T M P H Y
P C I B us
M em o ry B us
U top ia B us
B N C
connecto rs
U tility B us
S erial
E
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P R O M