TECHNICAL DATA
IN74LV08
Quad 2-Input AND Gate
ORDERING INFORMATION
IN74LV08N Plastic
IN74LV08D SOIC
IZ74LV08 Chip
T
A
= -40
125C for all packages
The IN74LV08 is low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT08A.
The IN74LV08 provides the 2-input AND function.
Optimized for Low Voltage applications: 1.2 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Low Input Current
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 14 =V
CC
PIN 7 = GND
A1
A2
A3
A4
Y1
Y2
Y3
Y4
B1
B2
B3
B4
FUNCTION TABLE
Input Output
A
B
Y = A*B
L L L
L H L
H L
L
H H H
H - high level
L - low level
1
IN T E G R A L
IN74LV08
MAXIMUM RATINGS
*
Symbol Parameter
Value
Unit
V
CC
DC supply voltage (Referenced to GND)
-0.5
+5.0
V
I
IK
*
1
DC input diode current
20
mA
I
OK
*
2
DC output diode current
50
mA
I
O
*
3
DC output source or sink current
-bus driver outputs
25
mA
I
CC
DC
V
CC
current for types with
- bus driver outputs
50
mA
I
GND
DC GND current for types with
- bus driver outputs
50
mA
P
D
Power dissipation per package, plastic DIP+
SOIC package+
750
500
mW
Tstg Storage
temperature
-65
+150
C
T
L
Lead temperature, 1.5 mm from Case for 10
seconds (Plastic DIP ), 0.3 mm (SOIC Package)
260
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 12 mW/
C from 70 to 125C
SOIC Package: : - 8 mW/
C from 70 to 125C
*
1
: V
I
< -0.5V or V
I
> V
CC
+0.5V
*
2
: Vo
< -0.5V or Vo > V
CC
+0.5V
*
3
: -0.5V
< Vo < V
CC
+0.5V
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
1.2
3.6
V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
-40
+125
C
t
r
, t
f
Input Rise and Fall Time
V
CC
=1.2 V
V
CC
=2.0 V
V
CC
=3.0 V
V
CC
=3.6 V
0
0
0
0
1000
700
500
400
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND
(V
IN
or V
OUT
)
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
2
IN T E G R A L
IN74LV08
AC ELECTRICAL CHARACTERISTICS
(C
L
=50 pF, t
LH
= t
HL
= 6.0 ns, V
IL
=0V, V
IH
=V
CC
, R
L
=1k)
V
CC
Guaranteed Limit
V
25
C
-40
C 85C
-40
C 125C
Symbol Parameter
min max
min
max
min
max
Unit
t
THL,
(t
TLH
) Output
Transition
Time, Any Output
(Figure 1)
1.2
2.0
*
-
-
60
16
10
-
-
-
75
20
13
-
-
-
90
24
15
ns
t
PHL,
(t
PLH
)
Propagation Delay,
Input A to Output Y
(Figure 1)
1.2
2.0
*
-
-
-
135
23
14
-
-
-
405
28
18
-
-
-
405
34
21
C
I
Input
Capacitance 3.0 -
7.0 - - - - pF
=25
, V
I
=0VV
CC
pF
C
PD
Power Dissipation Capacitance (Per Gate)
44
* - V
CC
= (3.30.3) V
Used to determine the no-load dynamic power consumption:
P
D
= C
PD
V
CC
2
f
I
+ (C
L
V
CC
2
fo), f
I
-input frequency, fo- output frequency (MHz)
(C
L
V
CC
2
fo) sum of the outputs
0.1
0.1
0.1
0.1
0.9
0.9
0.9
0.9
V
1
t
PLH
t
HL
t
THL
t
PHL
t
LH
t
TLH
V
1
V = 0.5 V
1 CC
Input , B
Output Y
GND
V
OL
V
OH
V
CC
V
1
V
1
Figure 1. Switching Waveforms
PULSE
GENERATOR
DEVICE
UNDER
TEST
V
CC
V
I
V
O
C
L
R
L
R
T
Termination resistance R
T
-
should be equal to Z
OUT
pulse
generators
Figure 2. Test Circuit
4
IN T E G R A L
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