Document Outline
- Cover Page
- Imprint
- Revision History
- Table of Contents
- 1 Overview
- 2 Pin Configurations and Block Diagrams
- 2.1 Pin Configuration
- 2.2 Block Diagrams
- Figure 3 Block Diagram Raw Card A UDIMM (x64, 1 Rank, x8)
- Table 9 Clock Signal Loads
- Figure 4 Block Diagram Raw Card A UDIMM (x72, 1 Rank, x8)
- Table 10 Clock Signal Loads
- Figure 5 Block Diagram Raw Card B UDIMM (x64, 2 Ranks, x8)
- Table 11 Clock Signal Loads
- Figure 6 Block Diagram Raw Card B UDIMM (x72, 2 Ranks, x8)
- Table 12 Clock Signal Loads
- Figure 7 Block Diagram Raw Card C UDIMM (x64, 1 Rank, x16)
- Figure 8 Block Diagram Raw Card D UDIMM (x64, 1 Rank, x8)
- Table 13 Clock Signal Loads
- Figure 9 Block Diagram Raw Card E UDIMM (x64, 2 Ranks, x8)
- Table 14 Clock Signal Loads
- Figure 10 Block Diagram Raw Card F UDIMM (x72, 1 Rank, x8)
- Table 15 Clock Signal Loads
- Figure 11 Block Diagram Raw Card G UDIMM (x72, 2 Ranks, x8)
- Table 16 Clock Signal Loads
- 3 Electrical Characteristics
- 4 SPD Codes
- 5 Package Outlines
- 6 Product Type Nomenclature (DDR2 DRAMs and DIMMs)
N e v e r s t o p t h i n k i n g .
HYS64T32000HU[3/3S/3.7/5]A
HYS[64/72]T64000HU[3/3S/3.7/5]A
HYS[64/72]T128020HU[3/3S/3.7/5]A
240-Pin Unbuffered DDR2 SDRAM Modules
UDIMM
DDR2 SDRAM
RoHS Compliant
Data Sheet, Rev. 1.2, Jun. 2005
Memory Products
Edition 2005-06
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 Mnchen, Germany
Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (
www.infineon.com
).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Template: mp_a4_s_rev314 / 3 / 2005-05-02
HYS64T32000HU[3/3S/3.7/5]A HYS[64/72]T64000HU[3/3S/3.7/5]A HYS[64/72]T128020HU[3/3S/3.7/5]A
Revision History: 2005-06, Rev. 1.2
Page
Subjects (major changes since last revision)
Changed ECC module-label to 'E' instead of 'U'
Previous Version: 2005-03 Rev. 1.11
Re-added DDR2-400 and DDR2-533
Removed HYS72T32000HU-x-A products as it belongs to a different data sheet
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send us your proposal (including a reference to this document) to:
techdoc.mp@infineon.com
HYS[64/72]T[32/64/128]0[0/2]0HU[3/3S/3.7/5]A
Unbuffered DDR2 SDRAM Modules
Data Sheet
4
Rev. 1.2, 2005-06
09122003-GZEK-H4J6
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2
Pin Configurations and Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2
Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.1
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.2
DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.3
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.3.1
Speed Grade Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.3.2
AC Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.3.3
ODT AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.4
Currents Specifications and Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
3.4.1
Currents Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.4.2
On Die Termination (ODT) Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4
SPD Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
5
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
6
Product Type Nomenclature (DDR2 DRAMs and DIMMs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table of Contents
Data Sheet
5
Rev. 1.2, 2005-06
09122003-GZEK-H4J6
240-Pin Unbuffered DDR2 SDRAM Modules
UDIMM
HYS64T32000HU[3/3S/3.7/5]A
HYS[64/72]T64000HU[3/3S/3.7/5]A
HYS[64/72]T128020HU[3/3S/3.7/5]A
1
Overview
This chapter gives an overview of the 240-Pin Unbuffered DDR2 SDRAM Modules product family and describes
its main characteristics.
1.1
Features
240-Pin PC2-5300, PC2-4200 and PC2-3200
DDR2 SDRAM memory modules for use as main
memory when installed in systems such as mobile
personal computers.
32M
64, 64M 64, 64M 72, 128M 64,
128M
72 module organization, and 32M 16,
64M
8 chip organization
256 MByte, 512 MByte and 1 GByte modules built
with 512-Mbit DDR2 SDRAMs in P-TFBGA-60 and
P-TFBGA-84 chipsize packages
All Speed grades faster than DDR2-400 comply
with DDR2-400 timing specifications.
Standard Double-Data-Rate-Two Synchronous
DRAMs (DDR2 SDRAM) with a single + 1.8 V
( 0.1 V) power supply
Programmable CAS Latencies (3, 4 and 5), Burst
Length (8 & 4) and Burst Type
Auto Refresh (CBR) and Self Refresh
All inputs and outputs SSTL_1.8 compatible
Off-Chip Driver Impedance Adjustment (OCD) and
On-Die Termination (ODT)
Serial Presence Detect with E
2
PROM
Dimensions (nominal):
30 mm high, 133.35 mm wide
Based on standard reference layouts Raw Card "A",
"B""C","D","E","F" and "G"
RoHS compliant products
1)
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic
equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January
2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated biphenyls and
polybrominated biphenyl ethers.
Table 1
Performance for DDR2667
Product Type Speed Code
3
3S
Unit
Speed Grade
PC25300 444
PC25300 555
--
max. Clock Frequency
@CL5
f
CK5
333
333
MHz
@CL4
f
CK4
333
266
MHz
@CL3
f
CK3
200
200
MHz
min. RAS-CAS-Delay
t
RCD
12
15
ns
min. Row Precharge Time
t
RP
12
15
ns
min. Row Active Time
t
RAS
45
45
ns
min. Row Cycle Time
t
RC
57
60
ns
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