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Электронный компонент: SAB-C161O-LM3V

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N e v e r s t o p t h i n k i n g .
M i c r o c o n t r o l l e r s
D a t a S h e e t , V 2 . 0 , J a n . 2 0 0 1
C 1 6 1 K
C 1 6 1 O
1 6 - B i t S i n g l e - C h i p M i c r o c o n t r o l l e r
Edition 2001-01
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 Mnchen, Germany
Infineon Technologies AG 2001.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide.
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
M i c r o c o n t r o l l e r s
D a t a S h e e t , V 2 . 0 , J a n . 2 0 0 1
N e v e r s t o p t h i n k i n g .
C 1 6 1 K
C 1 6 1 O
1 6 - B i t S i n g l e - C h i p M i c r o c o n t r o l l e r
C161K/O

Revision History:
2001-01
V2.0
Previous Version:
03.97
(Preliminary)
09.96
(Advance Information)
Page
Subjects (major changes since last revision)
All
Converted to Infineon layout
All
C161V removed
2
Ordering Codes and Cross-Reference replaced with Derivative Synopsis
5
-
8
Open drain functionality described for P2, P3, P6
8
Bidirectional reset introduced
19
Figure updated
28
,
29
Revised description of Absolute Max. Ratings and Operating Conditions
32
-
56
Specifications for reduced supply voltage introduced
35
Reduced power consumption
36
,
37
Clock Generation Modes added
38
,
39
Description of External Clock Drive improved
41
-
56
Standard 25-MHz timing introduced (timing granularity 2 ns)
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Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to:
mcdocu.comments@infineon.com
Data Sheet
1
V2.0, 2001-01
C161K/O
16-Bit Single-Chip Microcontroller
C166 Family
C161K/O
High Performance 16-bit CPU with 4-Stage Pipeline
80 ns Instruction Cycle Time at 25 MHz CPU Clock
400 ns Multiplication (16
16 bit), 800 ns Division (32 / 16 bit)
Enhanced Boolean Bit Manipulation Facilities
Additional Instructions to Support HLL and Operating Systems
Register-Based Design with Multiple Variable Register Banks
Single-Cycle Context Switching Support
16 MBytes Total Linear Address Space for Code and Data
1024 Bytes On-Chip Special Function Register Area
16-Priority-Level Interrupt System with 20 Sources, Sample-Rate down to 40 ns
8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC)
Clock Generation via prescaler or via direct clock input
On-Chip Memory Modules
2 KBytes On-Chip Internal RAM (IRAM) on C161O,
1 KByte IRAM on C161K
On-Chip Peripheral Modules
Two Multi-Functional General Purpose Timer Units with 5 Timers on C161O,
one Timer Unit with 3 Timers on C161K
Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
Up to 4 MBytes External Address Space for Code and Data
Programmable External Bus Characteristics for Different Address Ranges
Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
Data Bus Width
Four Programmable Chip-Select Signals on C161O,
two Chip-Select Signals on C161K
Idle and Power Down Modes
Programmable Watchdog Timer
Up to 63 General Purpose I/O Lines
Power Supply: the C161K/O can operate from a 5 V or a 3 V power supply
Supported by a Large Range of Development Tools like C-Compilers,
Macro-Assembler Packages, Emulators, Evaluation Boards, HLL-Debuggers,
Simulators, Logic Analyzer Disassemblers, Programming Boards
On-Chip Bootstrap Loader
80-Pin MQFP Package (0.65 mm pitch)