Edition 07.99
Published by Siemens AG,
Bereich Halbleiter, Marketing-
Kommunikation, Balanstraße 73,
81541 München

Siemens AG 1995.

All Rights Reserved.
Attention please!
As far as patents or other rights of third parties
are concerned, liability is only assumed for
components, not for applications, processes
and circuits implemented within components
or assemblies.
The information describes the type of compo-
nent and shall not be considered as assured
characteristics.
Terms of delivery and rights to change design
reserved.
For questions on technology, delivery and
prices please contact the Semiconductor
Group Offices in Germany or the Siemens
Companies and Representatives worldwide
(see address list).
Due to technical requirements components
may contain dangerous substances. For infor-
mation on the types in question please contact
your nearest Siemens Office, Semiconductor
Group.
Siemens AG is an approved CECC manufac-
turer.
Packing
Please use the recycling operators known to
you. We can also help you get in touch with
your nearest sales office. By agreement we
will take packing material back, if it is sorted.
You must bear the costs of transport.

For packing material that is returned to us
unsorted or which we are not obliged to
accept, we shall have to invoice you for any
costs incurred.
Components used in life-support devices
or systems must be expressly authorized
for such purpose!
Critical components

of the Semiconductor

Group of Siemens AG, may only be used in
life-support devices or systems

with the

express written approval of the Semiconductor
Group of Siemens AG.

1 A critical component is a component used

in a life-support device or system whose
failure can reasonably be expected to
cause the failure of that life-support device
or system, or to affect its safety or effec-
tiveness of that device or system.

2 Life support devices or systems are

intended (a) to be implanted in the human
body, or (b) to support and/or maintain and
sustain human life. If they fail, it is reasona-
ble to assume that the health of the user
may be endangered.

Ausgabe 07.99
Herausgegeben von Siemens AG,
Bereich Halbleiter, Marketing-
Kommunikation, Balanstraße 73,
81541 München

Siemens AG 1995.

Alle Rechte vorbehalten.
Wichtige Hinweise!
Gewähr für die Freiheit von Rechten Dritter
leisten wir nur für Bauelemente selbst, nicht
für Anwendungen, Verfahren und für die in
Bauelementen oder Baugruppen realisierten
Schaltungen.
Mit den Angaben werden die Bauelemente
spezifiziert, nicht Eigenschaften zugesichert.

Liefermöglichkeiten und technische Änderun-
gen vorbehalten.
Fragen über Technik, Preise und Liefermögli-
chkeiten richten Sie bitte an den Ihnen nächst-
gelegenen Vertrieb Halbleiter in Deutschland
oder an unsere Landesgesellschaften im Aus-
land.
Bauelemente können aufgrund technischer
Erfordernisse Gefahrstoffe enthalten.
Auskünfte darüber bitten wir unter Angabe
des betreffenden Typs ebenfalls über den Ver-
trieb Halbleiter einzuholen.
Die Siemens AG ist ein Hersteller von CECC-
qualifizierten Produkten.
Verpackung
Bitte benutzen Sie die Ihnen bekannten Verw-
erter. Wir helfen Ihnen auch weiter wenden
Sie sich an Ihren für Sie zuständigen Vertrieb
Halbleiter. Nach Rücksprache nehmen wir
Verpackungsmaterial sortiert zurück. Die
Transportkosten müssen Sie tragen.
Für Verpackungsmaterial, das unsortiert an
uns zurückgeliefert wird oder für das wir keine
Rücknahmepflicht haben, müssen wir Ihnen
die anfallenden Kosten in Rechnung stellen.
Bausteine in lebenserhaltenden Geräten
oder Systemen müssen ausdrücklich dafür
zugelassen sein!
Kritische Bauelemente

des Bereichs Hal-

bleiter der Siemens AG dürfen nur mit aus-
drücklicher schriftlicher Genehmigung des
Bereichs Halbleiter der Siemens AG in leb-
enserhaltenden Geräten oder Systemen

eingesetzt werden.
1 Ein kritisches Bauelement ist ein in einem

lebenserhaltenden Gerät oder System
eingesetztes Bauelement, bei dessen Aus-
fall berechtigter Grund zur Annahme
besteht, daß das lebenserhaltende Gerät
oder System ausfällt bzw. dessen Sicher-
heit oder Wirksamkeit beeinträchtigt wird.

2 Lebenserhaltende Geräte und Systeme

sind (a) zur chirurgischen Einpflanzung in
den menschlichen Körper gedacht, oder
(b) unterstützen bzw. erhalten das men-
schliche Leben. Sollten sie ausfallen,
besteht berechtigter Grund zur Annahme,
daß die Gesundheit des Anwenders
gefährdet werden kann.

Semiconductor Group

21.7.99

Data Sheet

TDA6170X

Features

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pinning

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Ordering Information

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

General Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4.1

Application

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pinconfiguration

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5.1

Package outline P-DSO-28-1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Pin Definitions and Functions

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Block Diagram

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Circuit Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.1

General

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.2

PLL Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.3

Fast I

C-Bus Interface

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

8.3.1

Logic Allocation

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8.3.2

IF-Muting

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8.4

Converter Mixer

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8.5

IF Limiter with Demodulator

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

8.6

Expander Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

8.7

AF Switch and Volume Control

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Pinning

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Absolute Maximum Ratings

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Operating Range

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Electrical Characteristics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Application Circuit

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Test circuit

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Diagrams

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

15.1

C-Bus Timing

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Semiconductor Group

21.7.99

Satellite Sound IF

TDA6170X

with Wegener Expander

Data Sheet

BIPOLAR

Features

Fast I

C-bus controlled (max. 400 kHz)

PLL controlled sound IF tuning with
10 kHz stepwidth

Second order high-pass mixer input

IF MUX for 10.7 MHz
broad / small IF filters

Two identical high sensitive alignment free
FM demodulators

Original Wegener PANDA 1

expander

Volume control for individual settings

s / 75

s / J17 de-emphasis for main

sound reception

Fully ESD protection

P-DSO-28

Package

Ordering Information

General Description

Multistandard satellite sound IF device consisting of a mixer and a voltage controlled oscillator (VCO) as a fre-
quency converter that can be continuously tuned in 10 kHz increments with crystal accuracy by means of a
PLL, two FM limiter amplifiers with PLL FM demodulators followed by two Wegener PANDA1

expanders.

The AF signal passes through two switches. Each switch can select the AF sources and the mono / stereo
mode the de-emphasis networks together with the two following volume control stages with audio buffers.
In front of one FM section an IF multiplexer is used to select the IF bandwidth.
The switching functions and settings of the PLL are controlled by an I

C-bus.

3.1

Application

For use in satellite receivers

Type

Package

Ordering Code

TDA6170X

P-DSO-28-1

Q67001-A5214

Data Sheet

TDA6170X

Semiconductor Group

21.7.99

Pin Definitions and Functions

Pin No.

Symbol

Function

XTAL

crystal input for 4 MHz oscillator

synthesizer loop-filter

GNDD

C-bus and synthesizer ground

CAS

C-bus address selection

LP1

FM-PLL lowpass capacitor (channel 1)

LP2

FM-PLL lowpass capacitor (channel 2)

EXT1

external audio input (channel 1)

AF1

audio output (channel 1)

AF2

audio output (channel 2)

EXT2

external audio input (channel 2)

DEEMP2

de-emphasis capacitor (channel 2)

EXP2 C

expander tracking capacitor (channel 2)

EXP2 C

expander release capacitor (channel 2)

EXP2 TC

expander time constant (channel 2)

EXP1 TC

expander time constant (channel 1)

EXP1 C

expander release capacitor (channel 1)

EXP1 C

expander tracking capacitor (channel 1)

DEEMP1

de-emphasis capacitor (channel 1)

IF3

intercarrier input 3

IF2

intercarrier input 2

GNDA

analog ground

IF1

intercarrier input 1

analog supply voltage (+8V)

MIXOUT

intercarrier mixer output

MIXIN

mixer input

C-bus and synthesizer supply voltage (+5V)

SCL

C-bus serial clock input

SDA

C-bus serial data input/output

Data Sheet

TDA6170X

Semiconductor Group

21.7.99

Circuit Description

7.1

General

The sound intermediate frequencies contained in the baseband of a demodulated FM satellite signal can lie
between 5 and 9.9 MHz. This band of frequencies is applied rough filtered to the high-pass input of the con-
verter mixer. The purpose of this mixer is to convert the different sound IF`s in the baseband to fixed output
frequencies (e.g. 10.7 / 10.72 MHz). These frequencies are then fed by external filters to the three sound IF
inputs.
The VCO of the mixer can be continuously tuned between 29 and 40 MHz in 20 kHz increments with crystal
accuracy by means of a PLL circuit.
The settings of the programmable divider and switching of the IF MUX and de-emphasis networks and volume
control are done by the I

C-bus.

Pin 5 (CAS) offers two switchable chip addresses to enable parallel operation of two devices.
All pins are guarded against electrostatic discharge. SCL and SDA include special protective structures to
permit continued bus operation when the device is switched off.

7.2

PLL Description

The VCO signal is applied to the PLL input. It passes through a programmable divider (N=1024 to 2047) and
then compared with a reference frequency (f

REF

= 20 kHz in a digital frequency / phase detector. This fre-

quency is derived from a 4 MHz crystal oscillator whose signal is divided by 200.
The phase detector has a charge pump push-pull current output. If the negative edge of the divided VCO sig-
nal appears before the negative edge of the reference signal, the current source I+ will pulse for the duration
of the phase difference. In the reverse case it is the current sink I-. If both signals are in phase, the output has
a high impedance and the PLL is locked. The current pulses are filtered by means of an integrator.
The pump current can be switched between two values (1 and 5) by software with a control bit 5I. This permits
a change in the control response during and after lock-in state.

7.3

Fast I

C-Bus Interface

Information is exchanged between the processor and the sound IF device on an fast asynchronous bidirec-
tional data bus. The timing for this comes from the processor (input SCL), while pin SDA functions as an I/O
depending on the direction of the data (open collector; external pull-up resistor). The bus will work with clock
frequencies up to 400 kHz.
The data from the processor goes to an I

C-bus controller and are put into registers (latches 0 to x) according

to their function. When the bus is not busy, both lines are in the marking state (SDA, SCL are high). Each tel-
egram begins with the start condition: SDA goes low while SCL remains high. All further exchanges of infor-
mation occur when SCL is low and are read by the controller with the positive clock edge. If SDA goes high
while the clock is high, the I

C-bus interface recognizes this as a stop condition and thus the end of the tele-

gram.
For what follows, refer to the table of logic assignments below.
All telegrams are transferred byte for byte, followed by a ninth clock pulse during which the controller pulls the
SDA line to low (i.e. acknowledge condition). The first byte consists of seven address bits with which the proc-
essor selects the PLL from among several other peripheral devices (chip select). The eighth bit is always low.
The first bit of the first or third data byte in the data part of the telegram determines whether a divider ratio or
control information for the IF or audio part will follow. In every case the first byte must be followed by a byte of
the same data type (or stop condition). When the supply voltage is applied, a power-on reset circuit prevents
the PLL from pulling the SDA line to low and thus blocking the bus.

Data Sheet

TDA6170X

Semiconductor Group

21.7.99

7.3.1

Logic Allocation

7.3.2

IF-Muting

7.4

Converter Mixer

In the converter mixer the sound subcarriers (frequency band approx. 5 to 9.9 MHz) contained in the base-
band of the received composite satellite signal are converted to an output frequency of 10.52 MHz and 10.7
MHz for example. The converter consists of a high-pass input filter followed by a double balanced mixer and a
low impedance output.
The signal of the on chip voltage controlled oscillator (VCO) is applied to the PLL input.

7.5

IF Limiter with Demodulator

The two limiter amplifiers are implemented as balanced five stage, capacitively coupled differential amplifiers.
The three inputs are designed as high-pass inputs. The load resistors for the IF filters are connected to
ground.
The output signals of the limiter amplifiers are fed directly to the internal PLL FM demodulators.
The demodulated AF signals are fed to the input of a pre volume control part in front of the expander the de-
emphasis networks and audio switches.

Byte

Data

Remarks

Address Byte

R/W

Progr. Divider Byte 1

N11

N10

Progr. Divider Byte 2

Control Byte 1

Control Byte 2

VL2

VL1

VL0

VR2

VR1

VR0

Control Byte 3

PVL2

PVL1

PVL0 PVR2 PVR1 PVR0

Address Byte 1

1. Chip address (CAS) Pin 5 grounded

=H44

Address Byte 2

2. Chip address (CAS) Pin 5 open

=H46

Control Bits

IF-Source

Function

IF1

IF2

IF3

off

expanders are working, audio = stereo

off

expanders are working, audio = mono

off

expanders are working, audio = mono

off

de-emphasis = 50

; audio = mono

off

de-emphasis = 75

; audio = mono

off

de-emphasis = J17; audio = mono

off

External audio

off

Mute

Data Sheet

TDA6170X

Semiconductor Group

21.7.99

7.6

Expander Description

The demodulated and level controlled audio signals are fed via low-pass filters to the inputs of two identical
expander circuits. The IF3 audio signal is also applied in parallel via different de-emphasis networks to the
input of the audio switch for broadband mono reception. The expander circuits have the reverse characteris-
tics of the audio compressor of the TV station. A 3 bit pre volume control (control byte 3: PVL2...PVL0 and
PVR2...PVR0) for each audio channel enables a correct adjustment of the expander characteristics and
allows the possibility to align to the right level for both broadband and smallband sound IF reception.

7.7

AF Switch and Volume Control

The input signals of the AF switch can be derived from the external audio input pair. However, these signals
can also be derived from either the different de-emphasis networks or from both expanders. The selection of
the output signals from IF1, IF2 or IF3 is done by using the I

C-bus interface. The switches are followed by a

volume control section with buffered outputs Ch1 and Ch2.
In case of small-band reception the demodulated signals of IF1 and IF2 are processed in both expanders and
fed to the switches. So it is possible to select one of each or both in the audio switches for both AF outputs
Ch1 and Ch2.
In the case of broad-band audio transmission with 50

s, 75

s or J17 pre-emphasis the IF3 input is active and

with the audio switch the demodulated audio signals are selected after the three de-emphasis networks and
fed to both AF outputs in mono mode.
The 3 bit volume control (control byte 2: VL2...VL0 and VR2...VR0) in front of each AF output enables the
same audio level for different FM deviations of several satellite transponders.

Data Sheet

TDA6170X

Semiconductor Group

21.7.99

Absolute Maximum Ratings

The maximal ratings may not be exceeded under any circumstances, not even momentary and individual, as

permanent damage to the IC will result.

Ambient Temperature under bias: T

=0 to 70

All values are referred to ground (pin), unless stated otherwise.
All currents are designated according to the source and sink principle, i.e. if the device pin is to be regarded as a sink (the current
flows into the stated pin to internal ground), it has a negative sign, and if it is a source (the current flows from Vs across the
designated pin), it has a positive sign.

Parameter

Symbol

Limit Values

Unit

Test Conditions

min

max

Supply voltage (digital)

Supply voltage (analog)

13.2

Mixer input

MIXIN

-0.3

13.2

IF inputs

-0.3

Crystal oscillator

XTAL

1.5

SDA; SCL; CAS

-0.3

Junction temperature

150

Storage temperature

stg

125

Thermal resistance

th j-a

K/W

ESD-Protection

ESD

all pins

Data Sheet

TDA6170X

Semiconductor Group

21.7.99

11 Electrical Characteristics

AC / DC characteristics involve the spread of values guaranteed in the specified supply voltage and ambient

temperature range. Typical characteristics are the median of the production.

Parameter

Symbol

Limit Values

Unit

Test conditions

min

typ

max

Power Supply

Current consumption V

digital

Current consumption V

analog

Mixer

Mixer input voltage

MIXIN(rms)

200

Mixer output current

MIXOUT

Input impedance

MIXIN

3.5

Output frequency range

MIXOUT

10.7

11.5

MHz

Mixer gain

MIX

RL = 100

Charge pump

Phase detector charge current

160

250

360

repetition time of charge pump
pulses

VCO

Frequency range VCO

VCO

MHz

VCO frequency

VCO

35.5

MHz

= 2.5V

VCO sensitivity

VCO

-16

MHz/V

Cyrstal oscillator (4 MHz)

crystal oscillator frequency

xtal

MHz

resonance resistance of crystal

xtal

parallel capacitance of crystal

xtal

4.5

input current from external source I

Sound IF

Sound IF input resistance

260

330

400

Input frequency range

11.5

MHz

Input sensitivity

IF(rms)

0.3

S/N(A) > 40 dB;
f

= 10.7 MHz;

f = 27 kHz;

mod

= 1 kHz

AM rejection

= 10.7 MHz;

= 5 to 100mV;

mod

= 30%

Data Sheet

TDA6170X

Semiconductor Group

21.7.99

FM PLL demodulators

free-running frequency

cco

10.6

MHz

lock range of PLL

CCO

11.5

MHz

Expander

Pre volume control range

2.5

-3.5

-3

3.5

-2.5

PVL = 000
PVL = 111

Control resolution

0.6

0.8

Low-pass filter response

kHz

AF Switch and Volume Control

Max. external input voltage

EXT(rms)

Volume control range

-1

-12

-14

-16

VL = 000
VL = 111

Control resolution

1.6

2.4

Output Buffer

Output DC level

3.6

Output resistance

100

125

150

total harmonic distortion

THD

0.01

0.2

signal to noise ratio

S/N (A)

A-weighted
V

EXT

= 500 mV

rms

Control Byte = 110

crosstalk between channels

L/R

;

R/L

EXT

= 2 V

rms

f = 1 kHz
Control Byte = 110

Overall performance

Input voltage

MIXIN

0.5

S/N > 40 dB

f = 27kHz,

Control Byte = 000

1.5

S/N > 40 dB

f = 50kHz,

Control Byte = 011

Output voltage

400

500

600

f = 27kHz,

mod

= 1kHz,

Control Byte = 000

400

500

600

f = 50kHz,

mod

= 1kHz,

Control Byte = 011

Parameter

Symbol

Limit Values

Unit

Test conditions

min

typ

max

Data Sheet

TDA6170X

Semiconductor Group

21.7.99

total harmonic distortion

THD

0.2

0.5

MIXIN

> 2 mV

f = 27kHz,

mod

= 1kHz,

Control Byte = 000

0.2

0.5

MIXIN

> 2 mV

f = 50kHz,

mod

= 1kHz,

Control Byte = 011

signal to noise ratio

S/N

A-weighted,

f = 27kHz,

mod

= 1kHz,

Control Byte = 000

Mute attenuation

MUTE

Control Byte = 111

C-Bus Interface

LOW level input voltage for both
SDA and SCL

-0.5

1.5

HIGH level input voltage for both
SDA and SCL

0.5

Hysteresis of Schmitt trigger
inputs

hys

0.2

Pulse width of spikes which must
be suppressed by the input filters

LOW level output voltage (open
collector)

OL1

OL2

0
0

0.4
0.6

3 mA sink current
6 mA sink current

Output fall time from
V

IHmin

to V

ILmax

with a bus

capacitance from 10 pF to 400 pF

20 +

0.1C

250

Input current for both SDA + SCL

-10

SCL clock frequency

SCL

400

kHz

Bus free time between a STOP
and START condition

BUF

1.3

Hold time (repeated) START con-
dition. After this period, the first
clock pulse is generated

HD,STA

0.6

LOW period of the SCL clock

LOW

1.3

HIGH period of the SCL clock

HIGH

0.6

Set-up time for repeated START
condition

SU,DAT

0.6

Data hold time:
for I

C-bus devices

HD,DAT

0.9

Data set-up time

SU,DAT

100

Rise time of both SDA + SCL

20 +

0.1C

300

Parameter

Symbol

Limit Values

Unit

Test conditions

min

typ

max

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA6170

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA6170

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA6170