TECHNICAL DATA
DTMF RECEIVER
High-Performance Silicon-Gate CMOS
IL9270
ORDERING INFORMATION
IL9270N/D
T
A
= -10
to 70 C
The IL9270N/D is a complete DTMF receiver integrating both the
bandsplit filter and digital decoder functions. The filter section uses
switched capacitor techniques for high- and low-group filters and dial-
tone rejection. Digital counting techniques are employed in the decoder
to detect and decode all 16 DTMF tone-pairs into a 4-bit code. External
component count is minimized by on-chip provision of a differential
input amplifier, clock-oscillator and latched 3-state bus interface.
Complete receiver in an 18-pin package.
Excellent performance.
CMOS, single 5 volt operation.
D SUFFIX
SOIC
Minimum board area.
Central office quality.
Low power consumption.
LOGIC DIAGRAM
PIN 9 = GND
PIN 18 = V
CC
PINS 5,6 = NO CONNECTION
PIN ASSIGNMENT
* Connect to GND
IL9270
PIN DESCRIPTIONS
NAME PIN
DESCRIPTION
ESt
16
Early steering output. Presents a logic high immediately when the digital
algorithm detects a recognizable tone-pair (signal condition). Any momentary
loss of signal condition will cause ESt to return to a logic low.
GS
3
Gain Select. Gives access to output of front-end differential amplifier for
connection of feedback resistor.
IC 5,6
Internal
Connection. Must be tied to GND.
IN+
1
Non-Inverting Input
Connections to the front-end
IN- 2
Inverting
Input
differential amplifier.
C1
7
Clock Input
3.579545 MHz crystal connected between
C2 8
Clock
Output
these pins completes internal oscillator.
Q1-Q4
11-14
3-state data outputs. When enabled by OE, provide the code corresponding to the
last valid tone-pair received.
StD 15
Delayed
steering
output. Presents a logic high when a received tone-pair has been
registered and the output latch updated; returns to logic low when the voltage on
St/GT falls below V
TSt
.
St/GT
17
Steering input/guard time output (bi-directional). A voltage greater than V
TSt
,
detected at St causes the device to register the detected tone-pair and update the
output latch. A voltage less than V
TSt
frees the device to accept a new tone-pair.
The GT output acts to reset the external steering time-constant; its state is a
function of ESt and the voltage on St.
OE
10
3-state output enable (input). Logic high enables the outputs Q1-Q4. Internal
pull-up.
V
CC
18
Positive power supply, +5 V.
V
REF
4
Reference voltage output, nominally V
CC
/2. May be used to bias the inputs at
mid-rail.
GND
9
Negative power supply, normally connected to 0 V.
FUNCTIONAL DESCRIPTION
The IL9270 monolithic DTMF receivers offer small size,
low power consumption and high performance. The
architecture consists of a bandsplit filter section, which
separates the high and low tones of a receiver pair,
followed by a digital counting section which verifies the
frequency and duration of the received tones before
passing the corresponding code to the output bus.
Filter Section
Separation of the low-group and high-group tones is
achieved byapplying the dual-tone signal to the inputs of
two filters - a sixth order for the high group and an eight
order for the low group. The band-widths of which
correspond to the bands enclosing the low-group and
high-group tones (see Figure 1). The filter section also
incorporates notches at 350
Hz and 440
Hz for
exceptional dial-tone rejection. Each filter output is
followed by a second order switched-capacitor section
which smooths the signals prior to limiting. Limiting is
performed by high-gain comparators which are provided
with hysteresis to prevent detection of unwanted low-
level signals and noise; the outputs of the comparators
provide full-rail logic swings at the frequencies of the
incoming tones.
IL9270
Decoder Section
The decoder uses digital counting techniques to
determine the frequencies of the limited tones and to
verify that they correspond to standard DTMF
frequencies. A complex averaging algorithm protects
against tone simulation by extraneous signals, such as
voice, while providing tolerance to small frequency
deviations and variations. This averaging algorithm has
been developed to ensure an optimum combination of
immunity to "talk-off" and tolerance to the presence of
interfering signals ("third tones") and noise. When the
detector recognizes the simultaneous presence of two
valid tones (referred to as "signal condition" in some
industry specifications), it raises the "early steering" flag
(ESt). Any subsequent loss of signal-condition will
cause Est to fall.
Steering Circuit
Before registration of a decoded tone-pair, the receiver
checks for a valid signal duration (referred to as
"character-recognition-condition"). This check is
performed by an external RC time-constant driven by
ESt. A logic high on ESt causes V
C
(see Figure 2) to rise
as the capacitor discharges. Provided signal-condition is
maintained (ESt remains high) for the validation period
(t
GTP
), V
C
reaches the threshold (V
TSt
) of the steering
logic to register the tone-pair, latching its corresponding
4-bit code (see Figure 3) into the output latch. At this
point, the GT output is activated and drives V
C
to V
CC
.
GT continues to drive high as long as ESt remains high.
Finally after a short delay to allow the output latch to
settle, the "delayed-steering" output flag, StD, goes high,
signaling that a received tone-pair has been registered.
The contents of the output latch are made available on
the 4-bit output bus by raising the 3-state control input
(OE) to a logic high. The steering circuit works in
reverse to validate the interdigit pause between signals.
Thus, as well as rejecting signals too short to be
considered valid, the receiver will tolerate signal
interruptions ("drop-out") too short to be considered a
valid pause. The facility, together with the capability of
selecting the steering time-constants externally, allows
the designer to tailor performance to meet a wide variety
of system requirements.
Guard Time Adjustment
In many situations not requiring independent selection of
receive and pause, the simple steering circuit of Figure 2
is applicable. Component values are chosen according to
the following formula:
t
REC
= t
DP
+ t
GTP
t
ID
= t
DA
+ t
GTA
The value of t
DP
is a parameter of the device and t
REC
is
the minimum signal duration to be recognized by the
receiver. A value for C of 0.1
F is recommended for
most applications, leaving R to be selected by the
designer. For example, a suitable value of R for a t
REC
of
40 ms would be 300 k.
Different steering arrangements may be esed to select
independently the guard-times for tone-present (t
GTP
) and
tone-absent (t
GTA
). This may be necessary to meet
system specifications which place both accept and reject
limits on both tone duration and inter-digital pause.
Guard-time adjustment also allows the designer to tailor
system parameters such as talk-off and noise immunity.
Increasing t
REC
improves talk-off performance, since it
reduces the probability that tones simulated by speech
will maintain signal condition for long enough to be
registered. On the other hand, a relatively short t
REC
with
a long t
DO
would be appropriate for extremely noisy
environments where fast acquisition time and immunity
to drop-outs would be requirements. Design information
for guard-time adjustment is show in Figure 4.
Input Configuration
The input arrangement of the IN9270 provides a
differential-input operational amplifier as well as a bias
source (V
REF
) which is used to bias the inputs at mid-rail.
Provision is made for connection of a feedback resistor
to the op-amp output (GS) for adjustment of gain.
In a single-ended configuration, the input pins are
connected as shown in Figure 5 with the op-amp
connected for unity gain and V
REF
biasing the input at
1/2V
CC
. Figure 6 shows the differential configuration,
which permits the adjustment of gain with the feedback
resistor R
5
.
IL9270
MAXIMUM RATINGS
*
Symbol Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.3 to +6.0
V
V
IN
DC Input Voltage (Referenced to GND)
-0.3 to V
CC
+0.3
V
I
IN
DC InputCurrent, per Pin
10
mA
P
D
Power Dissipation in Still Air,
Plastic DIP
**
500 mW
Tstg
Storage Temperature
-65 to +150
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
**
Derating: -10
mW
/
C
from 65
C to 70C.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
4.75
5.25
V
V
IN
DC Input Voltage (Referenced to GND)
1.5
3.5
V
T
A
Operating Temperature
-10
+70
C
P
O
Power Consumption ( f = 3.579 MHz, V
CC
= 5 V)
-
45
mW
t
r
, t
f
Input Rise and Fall Time
0
110
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND
(V
IN
or
V
OUT
)
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
IL9270
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND, V
CC
= 5 V
5%,
T
A
= -10 to +70
C)
Guaranteed
Limits
Symbol Parameter
Test
Conditions
Min
Typ
Max
Unit
V
IH
Minimum High-Level
Input Voltage
V
OUT
=5 V
3.6
V
V
IL
Maximum Low-Level
Input Voltage
V
OUT
=5 V
1.4
V
V
OH
Minimum High-Level
Output Voltage
No Load
4.97
V
V
OL
Maximum Low-Level
Output Voltage
No Load
0.05
V
I
IN
Maximum Input Leakage
Current
V
IN
=V
CC
or GND
0.1
A
I
SO
Maximum Pull Up
(Source) Current
OE = 0 V
24
A
I
OL
Minimum Output-Low
(Sink) Current
V
OUT
=0.4 V
0.8
mA
I
OH
Minimum Output-High
(Source) Current
V
OUT
=4.6 V
0.35
mA
I
CC
Maximum Quiescent
Supply Current (per
Package)
V
IN
=V
CC
11 mA
V
TSt
Steering Threshold
Voltage
2.2
2.5
V
R
IN
Input Impedance (Signal
Inputs 1,2)
@ 1 KHz
8
M
V
REF
Output Voltage
No Load
2.4
2.8
V
R
OR
Output Resistance
10
k
I
OZ
Maximum Three-State
Leakage current
Output in High-
Impedance State
V
IN
=V
IL
V
OUT
=V
CC
or GND
0.1
A
PDF 
ZIP