TECHNICAL DATA
64
Presettable Up/Down Counter
High-Voltage Silicon-Gate CMOS
The IW4029B consists of a four-stage binary or BCD-decade
up/down counter with provisions for look-ahead carry in both counting
modes. The inputs consists of a single CLOCK,
CARRY IN,(CLOCK ENABLE), BINARY/DECADE, UP/DOWN,
PRESET ENABLE, and four individual JAM signals. Q1, Q2, Q3, Q4
and a CARRY OUT signal are provided as outputs.
A high PRESET ENABLE signal allows information on the JAM
INPUTS to preset the counter to any state asynchronously with the
clock. A low on each JAM line, when the PRESET-ENABLE signal is
high, resets the counter to its zero count. The counter is advanced one
count at the positive transition of the clock when the CARRY IN and
PRESET ENABLE signals are low. Advancement is inhibited when
the CARRY
IN or PRESET ENABLE signals are high. The
CARRY OUT signal is normally high and goes low when the counter
reaches its maximum count in the UP mode or the minimum count in
the DOWN mode provided the CARRY IN signal is low. The
CARRY IN signal in the low state can thus be considered a
CLOCK ENABLE. The CARRY IN terminal must be connected to
GND when not in use.
Binary counting is accomplished when the BINARY/DECADE
input is high; the counter counts in the decade mode when the
BINARY/DECADE input is low. The counter counts up when the
UP/DOWN input is high, and down when the UP/DOWN input is
low.
Parallel clocking provides synchronous control and hence faster
response from all counting outputs. Ripple-clocking allows for
longer clock input rise and fall times.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1
A at 18 V over full package-
temperature range; 100 nA at 18 V and 25
C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
LOGIC DIAGRAM
IW4029B
ORDERING INFORMATION
IW4029BN Plastic
IW4029BD SOIC
T
A
= -55
to 125
C for all packages
PIN ASSIGNMENT
PIN 16=V
CC
PIN 8= GND
IW4029B
65
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +20
V
V
IN
DC Input Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
10
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
P
D
Power Dissipation per Output Transistor
100
mW
Tstg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
C from 65
to 125
C
SOIC Package: : - 7 mW/
C from 65
to 125
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
3.0
18
V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
-55
+125
C
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND
(V
IN
or V
OUT
)
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused outputs must be left open.
IW4029B
66
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
-55
C
25
C
125
C
Unit
V
IH
Minimum High-Level
Input Voltage
V
OUT
= 0.5 V or V
CC
- 0.5V
V
OUT
= 1.0 V or V
CC
- 1.0 V
V
OUT
= 1.5 V or V
CC
- 1.5V
5.0
10
15
3.5
7
11
3.5
7
11
3.5
7
11
V
V
IL
Maximum Low -Level
Input Voltage
V
OUT
= 0.5 V or V
CC
- 0.5V
V
OUT
= 1.0 V or V
CC
- 1.0 V
V
OUT
= 1.5 V or V
CC
- 1.5V
5.0
10
15
1.5
3
4
1.5
3
4
1.5
3
4
V
V
OH
Minimum High-Level
Output Voltage
V
IN
=GND or V
CC
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
4.95
9.95
14.95
V
V
OL
Maximum Low-Level
Output Voltage
V
IN
=GND or V
CC
5.0
10
15
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
I
IN
Maximum Input
Leakage Current
V
IN
= GND or V
CC
18
0.1
0.1
1.0
A
I
CC
Maximum Quiescent
Supply Current
(per Package)
V
IN
= GND or V
CC
5.0
10
15
20
5
10
20
100
5
10
20
100
150
300
600
3000
A
I
OL
Minimum Output Low
(Sink) Current
V
IN
= GND or V
CC
U
OL
=0.4 V
U
OL
=0.5 V
U
OL
=1.5 V
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.36
0.9
2.4
mA
I
OH
Minimum Output
High (Source) Current
V
IN
= GND or V
CC
U
OH
=2.5 V
U
OH
=4.6 V
U
OH
=9.5 V
U
OH
=13.5 V
5.0
5.0
10
15
-2
-0.64
-1.6
-4.2
-1.6
-0.51
-1.3
-3.4
-1.15
-0.36
-0.9
-2.4
mA
IW4029B
67
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF, R
L
=200k
, Input t
r
=t
f
=20 ns)
V
CC
Guaranteed Limit
Symbol
Parameter
V
-55
C
25
C
125
C
Unit
t
max
Maximum Clock Frequency (Figure 1)
5.0
10
15
2
4
5.5
2
4
5.5
1
2
2.75
MHz
t
PHL
, t
PLH
Maximum Propagation Delay, Clock to Q
(Figure 1)
5.0
10
15
500
240
180
500
240
180
1000
480
360
ns
t
PHL
, t
PLH
Maximum Propagation Delay, Clock to Carry
Output (Figure 1)
5.0
10
15
560
260
190
560
260
190
1120
520
380
ns
t
PHL
, t
PLH
Maximum Propagation Delay, Preset Enable
to Q (Figure 1)
5.0
10
15
470
200
160
470
200
160
940
400
320
ns
t
PHL
, t
PLH
Maximum Propagation Delay, Preset Enable to
Carry Output (Figure 1)
5.0
10
15
640
290
210
640
290
210
1280
580
420
ns
t
PHL
, t
PLH
Maximum Propagation Delay, Carry Input to
Carry Output (Figure 1)
5.0
10
15
340
140
100
340
140
100
680
280
200
ns
t
THL
, t
TLH
Maximum Output Transition Time, Any Output
(Figure 1)
5.0
10
15
200
100
80
200
100
80
400
200
160
ns
C
IN
Maximum Input Capacitance
-
7.5
pF
FUNCTION TABLE
CONTROL INPUT
LOGIC LEVEL
ACTION
BIN/DEC
(B/D)
H
L
BINARY COUNT
DECADE COUNT
UP/DOWN
(U/D)
H
L
UP COUNT
DOWN COUNT
PRESET ENABLE
(PE)
H
L
JAM IN
NO JAM
CARRY IN (CI)
(CLOCK ENABLE)
H
L
NO COUNTER ADVANCE AT POS.
CLOCK TRANSITION
ADVANCE COUNTER AT POS.
CLOCK TRANSITION
IW4029B
68
TIMING REQUIREMENTS
(C
L
=50pF, R
L
=200 k
, Input t
r
=t
f
=20 ns)
V
CC
Guaranteed Limit
Symbol
Parameter
V
-55
C
25
C
125
C
Unit
t
w
Minimum Pulse Width, Clock (Figure 1)
5.0
10
15
180
90
60
180
90
60
360
180
120
ns
t
w
Minimum Pulse Width, Preset Enable
(Figure 1)
5.0
10
15
130
70
50
130
70
50
260
140
100
ns
t
su
*
Minimum Setup Time, Clock to B/D or U/D
(Figure 1)
5.0
10
15
340
140
100
340
140
100
680
280
200
ns
t
rem
*
Minimum Removal Time, Preset Enable (Figure
1)
5.0
10
15
200
110
80
200
110
80
400
220
160
ns
t
h
**
Minimum Hold Time, Clock to Carry In (Figure
2)
5.0
10
15
50
30
25
50
30
25
100
60
50
ns
t
su
Minimum Setup Time, Carry In to Clock
(Figure 1)
5.0
10
15
200
70
60
200
70
60
400
140
120
ns
t
r
, t
f
**
Maximum Input Rise and Fall Times,Clock
(Figure 2)
5.0
10
15
15
15
15
15
15
15
30
30
30
s
*
From Up/Down, Binary/Decode, Carry In, or Preset Enable Control Inputs to Clock Edge.
**
From Carry In to Clock Edge
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