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Электронный компонент: 28F004S3-150

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E
PRELIMINARY
December 1998
Order Number: 290598-005
n
SmartVoltage Technology
2.7 V (Read-Only) or 3.3 V V
CC
and
3.3 V or 12 V V
PP
n
High-Performance
120 ns Read Access Time
n
Enhanced Data Protection Features
Absolute Protection with V
PP
= GND
Flexible Block Locking
Block Write Lockout during Power
Transitions
n
Enhanced Automated Suspend Options
Program Suspend to Read
Block Erase Suspend to Program
Block Erase Suspend to Read
n
Industry-Standard Packaging
40-Lead TSOP, 44-Lead PSOP
n
High-Density 64-Kbyte Symmetrical
Erase Block Architecture
4 Mbit: Eight Blocks
8 Mbit: Sixteen Blocks
16 Mbit: Thirty-Two Blocks
n
Extended Cycling Capability
100,000 Block Erase Cycles
n
Low Power Management
Deep Power-Down Mode
Automatic Power Savings Mode
Decreases I
CC
in Static Mode
n
Automated Program and Block Erase
Command User Interface
Status Register
n
SRAM-Compatible Write Interface
n
ETOXTM V Nonvolatile Flash
Technology
The Intel
3 Volt FlashFileTM memory family renders a variety of density offerings in the same package. The
4-, 8-, and 16-Mbit 3 Volt FlashFile memories provide high-density, low-cost, nonvolatile, read/write storage
solutions for a wide range of applications. Their symmetrically-blocked architecture, flexible voltage, and
extended cycling provide highly flexible components suitable for resident flash arrays, SIMMs, and memory
cards. Enhanced suspend capabilities provide an ideal solution for code or data storage applications. For
secure code storage applications, such as networking, where code is either directly executed out of flash or
downloaded to DRAM, the 4-, 8-, and 16-Mbit FlashFile memories offer three levels of protection: absolute
protection with V
PP
at GND, selective hardware block locking, or flexible software block locking. These
alternatives give designers ultimate control of their code security needs.
This family of products is manufactured on Intel
0.4
m ETOXTM V process technology. They come in
industry-standard packages: the 40-lead TSOP, ideal for board-constrained applications, and the rugged
44-lead PSOP. Based on the 28F008SA architecture, the 3 Volt FlashFile memory family enables quick and
easy upgrades for designs that demand state-of-the-art technology.
NOTE: This document formerly known as
Byte-Wide Smart 3 FlashFileTM Memory Family 4, 8, and 16 Mbit.
3 VOLT FlashFileTM MEMORY
28F004S3, 28F008S3, 28F016S3 (x8)
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of
Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
The 28F004S3, 28F008S3, 28F016S3 may contain design defects or errors known as errata which may cause the product to
deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call 1-800-548-4725
or visit Intel's Website at http://\www.intel.com
COPYRIGHT INTEL CORPORATION 1997, 1998
CG-041493
*
Third-party brands and names are the property of their respective owners
E
28F004S3/28F008S3/28F016S3
3
PRELIMINARY
CONTENTS
PAGE
PAGE
1.0 INTRODUCTION............................................. 5
1.1 New Features .............................................. 5
1.2 Product Overview ........................................ 5
1.3 Pinout and Pin Description........................... 6
2.0 PRINCIPLES OF OPERATION ..................... 11
2.1 Data Protection.......................................... 12
3.0 BUS OPERATION ........................................ 12
3.1 Read.......................................................... 12
3.2 Output Disable........................................... 12
3.3 Standby ..................................................... 12
3.4 Deep Power-Down..................................... 12
3.5 Read Identifier Codes Operation................ 13
3.6 Write .......................................................... 13
4.0 COMMAND DEFINITIONS............................ 13
4.1 Read Array Command ............................... 16
4.2 Read Identifier Codes Command............... 16
4.3 Read Status Register Command ............... 16
4.4 Clear Status Register Command ............... 16
4.5 Block Erase Command .............................. 16
4.6 Program Command ................................... 17
4.7 Block Erase Suspend Command ............... 17
4.8 Program Suspend Command..................... 18
4.9 Set Block and Master Lock-Bit Commands 18
4.10 Clear Block Lock-Bits Command ............. 19
5.0 DESIGN CONSIDERATIONS ....................... 27
5.1 Three-Line Output Control ......................... 27
5.2 RY/BY# Hardware Detection ..................... 27
5.3 Power Supply Decoupling.......................... 27
5.4 V
PP
Trace on Printed Circuit Boards .......... 27
5.5 V
CC
, V
PP
, RP# Transitions ......................... 27
5.6 Power-Up/Down Protection........................ 27
5.7 V
PP
Program and Erase Voltages on Sub-
0.4 S3 Memory Family ............................ 28
6.0 ELECTRICAL SPECIFICATIONS ................. 29
6.1 Absolute Maximum Ratings ....................... 29
6.2 Commercial Temperature Operating
Conditions................................................. 29
6.3 Capacitance............................................... 29
6.4 DC Characteristics-- Commercial
Temperature ............................................. 30
6.5 AC Characteristics--Read-Only
Operations--Commercial Temperature..... 34
6.6 AC Characteristics--Write Operations--
Commercial Temperature ......................... 36
6.7 Block Erase, Program, and Lock-Bit
Configuration Performance--Commercial
Temperature ............................................. 38
6.8 Extended Temperature Operating
Conditions................................................. 39
6.9 DC Characteristics--Extended
Temperature ............................................. 39
6.10 AC Characteristics--Read-Only
Operations--Extended Temperature......... 39
7.0 ORDERING INFORMATION ......................... 40
8.0 ADDITIONAL INFORMATION....................... 40
28F004S3/28F008S3/28F016S3
E
4
PRELIMINARY
REVISION HISTORY
Number
Description
-001
Original version
-002
Table 3 revised to reflect change in abbreviations from "W" for write to "P" for program.
Ordering information graphic (Appendix A) corrected: from PB = Ext. Temp. 44-Lead
PSOP to TB = Ext. Temp. 44-Lead PSOP
Updated Ordering Information and table
Correction to table, Section 6.2.3. Under I
LO
Test Conditions, previously read V
IN
= V
CC
or GND, corrected to V
OUT
= V
CC
or GND
Section 6.2.7, modified Program and Block Erase Suspend Latency Times
-003
Updated disclaimer
-004
Added 2.7 V V
PP
specifications
Added
BGA* CSP pinouts and corrected error in PSOP pinout
Added Design Consideration for V
PP
Program and Erase Voltages on future sub-0.4
devices
-005
Added maximum Block Erase time for 2.7 V operation
Name of document changed from
Byte-Wide Smart 3 FlashFileTM Memory Family 4, 8,
and 16 Mbit
E
28F004S3/28F008S3/28F016S3
5
PRELIMINARY
1.0
INTRODUCTION
This datasheet contains 4-, 8-, and 16-Mbit 3 Volt
FlashFile memory specifications. Section 1.0
provides a flash memory overview. Sections 2.0,
3.0, 4.0, and 5.0 describe the memory organization
and functionality. Section 6.0 covers electrical
specifications for commercial and extended
temperature product offerings. Ordering information
is provided in Section 7.0. Finally, the 3
Volt
FlashFile memory family documentation also
includes application notes and design tools which
are referenced in Section 8.0.
1.1
New Features
The 3
Volt FlashFile memory family maintains
backwards-compatibility with Intel
28F008SA-L.
Key enhancements include:
SmartVoltage Technology
Enhanced Suspend Capabilities
In-System Block Locking
They share a compatible status register, software
commands, and pinouts. These similarities enable
a clean upgrade from the 28F008SA-L to 3 Volt
FlashFile products. When upgrading, it is important
to note the following differences:
Because of new feature and density options,
the devices have different device identifier
codes. This allows for software optimization.
V
PPLK
has been lowered from 6.5 V to 1.5 V to
support low V
PP
voltages during block erase,
program, and lock-bit configuration operations.
Designs that switch V
PP
off during read
operations should transition V
PP
to GND.
To take advantage of SmartVoltage tech-
nology, allow V
PP
connection to 3.3 V.
For more details see application note
AP-625,
28F008SC Compatibility with 28F008SA (order
number 292180)
.
1.2
Product Overview
The 3
Volt FlashFile memory family provides
density upgrades with pinout compatibility for the
4-
, 8-, and 16-Mbit densities. The 28F004S3,
28F008S3, and 28F016S3 are high-performance
memories arranged as 512 Kbyte, 1 Mbyte, and
2 Mbyte of eight bits. This data is grouped in eight,
sixteen, and thirty-two 64-Kbyte blocks which are
individually erasable, lockable, and unlockable in-
system. Figure 5 illustrates the memory
organization.
SmartVoltage technology enables fast factory
programming and low power designs. Specifically
designed for 3
V systems, 3
Volt FlashFile
components support read operations at 2.7 V and
3.3 V V
CC
and block erase and program operations
at 2.7 V, 3.3 V and 12 V V
PP
. The 12 V V
PP
option
renders the fastest program performance which will
increase your factory throughput. With the 2.7 V or
3.3 V V
PP
option, V
CC
and V
PP
can be tied together
for a simple, low-power 2.7 V or 3 V design. In
addition to the voltage flexibility, the dedicated V
PP
pin gives complete data protection when V
PP
V
PPLK
.
Internal V
PP
detection circuitry automatically
configures the device for optimized block erase and
program operations.
A Command User Interface (CUI) serves as the
interface between the system processor and
internal operation of the device. A valid command
sequence written to the CUI initiates device
automation. An internal Write State Machine (WSM)
automatically executes the algorithms and timings
necessary for block erase, program, and lock-bit
configuration operations.
A block erase operation erases one of the device's
64-Kbyte blocks typically within 1.1 second
(12 V V
PP
), independent of other blocks. Each block
can be independently erased 100,000 times
(1.6 million block erases per device). A block erase
suspend operation allows system software to
suspend block erase to read data from or program
data to any other block.
Data is programmed in byte increments typically
within 7.6
s (12
V V
PP
). A program suspend
operation permits system software to read data or
execute code from any other flash memory array
location.