The Intelligent Way to Connect
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Footprint compatibility allows for flexible designs
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Lower system costs and higher density
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ASF 1.0 and SMBus 2.0 enabled
Product Description
The Intel
82540EM Gigabit Ethernet Controller integrates Gigabit Ethernet MAC and PHY layer
functions in a single, compact component. Packaged in a 15x15mm TFBGA, the Intel 82540EM
Gigabit Ethernet Controller is physically and electrically compatible with the Intel
82551QM and
88551ER Fast Ethernet Controllers, allowing for a flexible, Gigabit Ethernet or 10/100 Ethernet design.
The Intel 82540EM combines Intel's fourth-generation Gigabit MAC design, with fully integrated,
physical-layer circuitry to provide a standard IEEE 802.3 Ethernet interface for 1000BASE-T,
100BASE-TX, and 10BASE-T applications (802.3, 802.3u, 802.3ab). In addition, the controller
provides a direct Peripheral Component Interconnect (PCI) 2.2 compliant bus up to 66MHz.
The Intel 82540EM's on-board SMBus port enables enhanced manageability and system health
monitoring via the LAN: Management packets can be routed to or from a management processor.
The SMBus port enables implementation of industry standards such as IPMI (Intelligent Platform
Management Interface). In addition, ASF 1.0 (Alert Standard Format) circuitry provides alerting and
remote-control capabilities with standardized interfaces.
The Intel 82540EM Gigabit Ethernet Controller architecture is optimized to deliver both high-
performance networking and PCI bus efficiency with the lowest power and smallest size. Using state
logic design with a pipelined DMA Unit and 128-bit-wide buses for the fastest performance, the
82540EM controller handles Gigabit Ethernet traffic with low network latency and minimal internal
processing overhead. The controller's architecture includes independent transmit and receive queues to
limit PCI bus traffic, and a PCI interface that maximizes the use of bursts for efficient bus usage. The
Intel 82540EM Gigabit Ethernet Controller prefetches up to 64 packet descriptors in a single burst for
efficient PCI-bandwidth usage. A 64KB, on-chip packet buffer maintains superior performance as
available PCI bandwidth changes. Advanced interrupt moderation hardware manages interrupts
generated by the 82540EM controller to further improve system efficiency. In addition, using hardware
acceleration, the controller also offloads tasks from the host processor, such as TCP/UDP/IP checksum
calculations and TCP segmentation.
Applications
The Intel
82540EM Gigabit Ethernet Controller is designed for use in the following applications:
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LAN on Motherboard (LOM) in desktop, mobile and other space-constrained designs
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Communications and networking devices requiring improved performance over 10/100 Ethernet
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Gigabit Ethernet connectivity for embedded clients such as Web kiosks and POS terminals
Intel
82540EM
Gigabit Ethernet
Controller
High-Performance Gigabit Connection
for Desktop Designs
Product Brief
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right. Intel products are not intended for use in medical, life saving, or life sustaining applications.
* Other names and brands may be claimed as the property of others.
Intel may make changes to specifications and product descriptions at any time, without notice.
Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries.
Features
Benefits
PCI Bus Features
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PCI revision 2.2, 32-bit, 33/66MHz
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Application flexibility in LOM or embedded use
MAC Specific Features
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64KB configurable RX and TX packet FIFO
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No external FIFO memory requirements
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FIFO size tunable to the application
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Low-latency transmit and receive queues
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Network packets handled without waiting or buffer overflow
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IEEE 802.3x-compliant flow-control support with software-controllable
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Reduced frame loss due to receive FIFO overrun
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Caches up to 64 packet descriptors in a single burst
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Efficient PCI-bandwidth usage
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Programmable host memory receive buffers (256B to 16KB);
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Efficient usage of PCI bandwidth
Programmable cache line size from 16B to 256B
Gigabit PHY Specific Features
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Integrated PHYs for 10/100/1000Mb/s full- and half-duplex operation
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Reduced board space and lower power dissipation
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IEEE 802.3ab Auto-Negotiation
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Automatic link configuration including speed, duplex, and flow control
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Proven PHY compatible with IEEE 802.3ab
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Robust operation over the installed base of CAT-5 twisted-pair cabling
at lengths greater than 100m
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State-of-the-art DSP architecture implements digital adaptive
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Robust 1000Mb/s performance in noisy environments and despite severe cable
equalization, echo, cross-talk and baseline wander cancellation
installation problems
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PHY detects polarity, MDI-X, 2 pair vs. 4 pair cables, and cable length
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Easier network installation and maintenance
Host Offloading Features
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Transmit TCP segmentation IP, TCP, and UDP checksum off-loading
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Increased throughput and lower CPU utilization. Compatible with large send
capabilities on RX and TX
offload feature found in Windows* 2000 and Windows* XP
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Advanced packet filtering
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16 exact matched (unicast or multicast)
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Promiscuous (unicast/multicast) transfer mode
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IEEE 802.1Q VLAN support with VLAN tag insertion and stripping and
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Enables IT staff to easily create multiple virtual LAN segments
packet filtering for up to 4096 VLAN tags
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Descriptor ring management hardware for TX and RX
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Optimized fetching and write-back mechanisms for efficient system memory
and PCI bandwidth usage
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Jumbo frame support up to 16KB
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High throughput for large data transfers on networks supporting jumbo frames
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Interrupt moderation controls
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Reduces the number of interrupts generated by receive and transmit operations
Manageability Features
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On-chip SMBus 2.0 port
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Enables IPMI, and ASF implementations
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ASF 1.0 alerting
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Provides alerting and remote-control capabilities with standardized interfaces
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Compliance with PCI Power Management v1.1/ACPI v2.0
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PCI power management capability requirements for PC and embedded
applications
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Wake on LAN (WoL) support
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Packet recognition and wakeup for network adapter and LOM applications
without software configuration
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Automatic link speed switching from 1000Mb/s down to 10 or 100Mb/s
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Low power in standby states
in standby
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Supports power-down states without software assistance
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Smart Power Down mode when no signal is detected on the wire
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Enables very low power mobile or battery powered implementations
Additional Device Features
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Four programmable LED outputs
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Indications for link speed, activity, duplex, collisions, pause by flow control,
PCI speed, PCI width, and port ID on each port
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Allows design customization without affecting software drivers
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Internal PLL for clock generation using a 25MHz crystal or a
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Lower component count and cost
25MHz oscillator
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On-chip power regulator control circuitry
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Fewer on-board power supply regulators
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Simplified power supply design
Characteristics
Electrical
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PCI Signaling
3.3V and 5V
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Power Dissipation
1.8W (typical)
Environmental
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Operating temperature
0C to 70C (maximum); Does not require a heat sink or forced airflow.
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Storage temperature
-65C to 140C
Physical
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Package
196-pin TFBGA, 1mm ball pitch, 15 X 15mm (Simplifies LOM board designs).
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Footprint-compatible with Intel
82551QM
Enables a Gigabit Ethernet or 10/100 LOM implementation on the same board.
and 82551ER Fast Ethernet Controllers
For more information, contact your Intel
sales representative.
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