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Электронный компонент: 82546EB

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The Intelligent Way to Connect
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Dual port single-chip configuration simplifies designs
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Footprint compatibility for flexible designs
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Enhanced manageability and system health monitoring
Product Description
The Intel
82546EB Dual Port Gigabit Ethernet Controller incorporates two full Gigabit Ethernet MAC
and PHY layer functions on a single, compact component. Packaged in a very small 21x21mm PBGA,
the 82546EB Dual Port Gigabit Ethernet Controller provides dual port functionality without requiring
additional board space for the component.
The Intel 82546EB integrates Intel's fourth-generation Gigabit MAC design, with fully integrated,
physical-layer circuitry, to provide two standard IEEE 802.3 Ethernet interfaces for 1000BASE-T,
100BASE-TX, and 10BASE-T applications (802.3, 802.3u, 802.3ab). For fiber-optic applications, the Intel
82546EB's two integrated SERDES support 1000BASE-SX and 1000BASE-LX (802.3z). In addition, the
controller provides a single, direct Peripheral Component Interconnect (PCI) 2.2 and PCI-X 1.0a compliant
bus that operates as a single multi-function device on the bus at clock frequencies up to 133MHz.
The Intel 82546EB on-board SMBus port enables enhanced manageability and system health
monitoring via the LAN. With SMBus, management packets can be routed to or from a management
processor. The SMBus port enables industry standards such as IPMI (Intelligent Platform Management
Interface) to be implemented with the 82546EB. In addition, ASF 1.0 (Alert Standard Format) circuitry
provides alerting and remote-control capabilities with standardized interfaces.
The Intel 82546EB Gigabit Ethernet Controller architecture is optimized to deliver both high-
performance networking and PCI/PCI-X bus efficiency. Using state logic design with a pipelined DMA
Unit and 128-bit-wide buses for the fastest performance, the 82546EB controller handles Gigabit
Ethernet traffic with low network latency and minimal internal processing overhead. The controller's
architecture includes independent transmit and receive queues to limit PCI bus traffic, and a PCI
interface that maximizes the use of bursts for efficient bus usage. The Intel 82546EB Gigabit Ethernet
Controller prefetches up to 64 packet descriptors in a single burst for efficient PCI-bandwidth usage.
Two 64KB on-chip packet buffers maintain superior performance as available PCI bandwidth changes.
Advanced interrupt moderation hardware manages interrupts generated by the 82546EB controller to
further improve system efficiency. In addition, using hardware acceleration, the controller also offloads
tasks from the host processor, such as TCP/UDP/IP checksum calculations and TCP segmentation.
Applications
The Intel
82546EB Gigabit Ethernet Controller is designed for use in the following applications:
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LAN on Motherboard (LOM) in dense, space-constrained systems such as rack-mounted servers and
high-density blade servers
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Communications platform using dual Gigabit Ethernet on the backplane (PICMG 2.16 compliant
or 1000BASE-X)
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Internet infrastructure devices with high-speed requirements and limited board real estate, such as
switches, routers and load balancers
Intel
82546EB
Dual Port Gigabit
Ethernet Controller
Two Integrated Gigabit Connections
for High-Density Designs
Product Brief
Intel Corporation 2002. All rights reserved.
0302/OC/EW/PG/2.5K
Please Recycle
NP2102
Information in this document is provided in connection with Intel
products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property
right. Intel products are not intended for use in medical, life saving, or life sustaining applications.
* Other names and brands may be claimed as the property of others.
Intel may make changes to specifications and product descriptions at any time, without notice.
Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries.
Features
Benefits
PCI/PCI-X Features
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133MHz PCI-X bus
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Supports bandwidth to allow wire-speed performance of two Gigabit Ethernet
connections
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Multi-function PCI device
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Lowest latency solution a PCI/PCI-X bridge component is not required to
implement a dual port design
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PCI revision 2.2, 32/64-bit, 33/66MHz
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Application flexibility in LOM or embedded use
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64-bit addressing for systems with more than 4GB of physical memory
MAC Specific Features
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Dual 64KB configurable RX and TX packet FIFOs
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No external FIFO memory requirements
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FIFO size tunable to the application
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Low-latency transmit and receive queues
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Network packets handled without waiting or buffer overflow
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IEEE 802.3x compliant flow control support with software controllable
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Reduced frame loss due to receive FIFO overrun
pause times and threshold values
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Caches up to 64 packet descriptors in a single burst
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Efficient PCI-bandwidth usage
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Programmable host memory receive buffers (256B to 16KB);
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Efficient usage of PCI bandwidth
Programmable cache line size from 16B to 256B
Gigabit PHY Specific Features
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Two integrated PHYs for 10/100/1000Mb/s full- and half-duplex operation
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Reduced board space and lower power dissipation
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IEEE 802.3ab Auto-Negotiation
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Automatic link configuration including speed, duplex, and flow control
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Proven PHY compatible with IEEE 802.3ab
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Robust operation over CAT-5 twisted-pair cabling at lengths over 100m
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State-of-the-art DSP architecture implements digital adaptive equalization,
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Robust 1000Mb/s performance in noisy environments and despite severe cable
echo, cross-talk and baseline wander cancellation
installation problems
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PHY detects polarity, MDI-X, 2 pair vs. 4 pair cables, and cable length
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Easier network installation and maintenance
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Dual Internal Serializer-Deserializers (SERDES)
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Solution for server blade backplane connections and Fiber Gigabit Ethernet
Host Offloading Features
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Transmit TCP segmentation IP, TCP, and UDP checksum off-loading
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Increased throughput and lower CPU utilization. Compatible with large send
capabilities on RX and TX
offload feature found in Windows* 2000 and Windows* XP
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Advanced packet filtering
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16 exact matched (unicast or multicast)
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Promiscuous (unicast/multicast) transfer mode
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IEEE 802.1Q VLAN support with VLAN tag insertion and stripping and
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Enables IT staff to easily create multiple virtual LAN segments
packet filtering for up to 4096 VLAN tags
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Descriptor ring management hardware for TX and RX
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Optimized fetching and write-back mechanisms for efficient system memory
and PCI bandwidth usage
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Jumbo frame support up to 16KB
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High throughput for large data transfers on networks supporting jumbo frames
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Interrupt moderation controls
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Reduces the number of interrupts generated by receive and transmit operations
Manageability Features (available on both ports)
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On-chip SMBus 2.0 port
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Enables IPMI, and ASF implementations
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ASF 1.0 alerting
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Provides alerting and remote-control capabilities with standardized interfaces
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Compliance with PCI Power Management v1.1/ACPI v2.0
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PCI power management capability requirements for PC and embedded applications
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Wake on LAN (WoL) support
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Packet recognition and wakeup for network adapter and LOM applications
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Automatic link speed switching from 1000Mb/s down to 10 or 100Mb/s
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Low power in standby states
in standby
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Supports power-down states without software assistance
Additional Device Features
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Eight programmable LED outputs
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Indications for link speed, activity, duplex, collisions, pause by flow control,
PCI speed, PCI width, and port ID on each port
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Allows design customization without affecting software drivers
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Internal PLL for clock generation using a 25MHz crystal or a 25MHz oscillator
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Lower component count and cost
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On-chip power regulator control circuitry
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Simplified power supply design
Characteristics
Electrical
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PCI Signaling
3.3V and 5V
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Power Dissipation
3.5W (1.75W/port) (typical)
Environmental
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Operating temperature
0C to 55C (maximum); Does not require a heat sink or forced airflow.
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Storage temperature
-65C to 140C
Physical
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Package
364-pin PBGA. 1mm ball pitch, 21 x 21mm (Saves critical space on LOM board designs).
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Footprint-compatible with Intel
Enables a single-port or dual-port implementation on the same board.
82544GC and Intel
82545EM
Gigabit Ethernet Controllers
For more information, contact your Intel
sales representative.