82559 Fast Ethernet* Multifunction PCI/
CardBus Controller
Networking Silicon
Datasheet
Product Features
s
Optimum Integration for Lowest Cost
Solution
-- Integrated IEEE 802.3 10BASE-T and
100BASE-TX compatible PHY
-- Glueless 32-bit PCI master interface
-- Glueless CardBus master interface
-- Modem interface for combination
solutions in PCI, CardBus, and MiniPCI
designs
-- PXE Support in Combo Designs
-- 128 Kbyte Flash interface
-- Integrated power management functions
-- Thin BGA 15mm
2
package
s
Wired for Management and Reduced Total
Cost of Ownership
-- Wired for Management support
-- System Management Bus support for
Total Cost of Ownership support
-- Power management capabilities
-- ACPI and PCI Power Management
standards compliance
-- Wake on "interesting" packets and link
status change support
-- Magic Packet* support
-- Remote power up support
s
High Performance Networking Functions
-- Chained memory structure similar to the
82558, 82557, and 82596
-- Improved dynamic transmit chaining
with multiple priorities transmit queues
-- Backward compatible software to the
82558 and 82557
-- Full Duplex support at both 10 and 100
Mbps
-- IEEE 802.3u Auto-Negotiation support
-- 3 Kbyte transmit and 3 Kbyte receive
FIFOs
-- Fast back-to-back transmission support
with minimum interframe spacing
-- IEEE 802.3x 100BASE-TX Flow
Control support
-- Adaptive Technology
-- TCP/UDP checksum offload capabilities
s
Low Power Features
-- Low power 3.3 V device
-- Efficient dynamic standby mode
-- Deep power down support
-- Clockrun protocol support
Order Number: 743892-004
Revision 2.2
May 2001
Datasheet
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability
whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not
intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 82559 may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current
characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel's website at http://www.intel.com.
Copyright 2001, Intel Corporation.
* Other product and corporate names may be trademarks of other companies and are used only for explanation and to the owners' benefit, without
intent to infringe.
Datasheet
iii
Networking Silicon -- 82559
Contents
1.0
Introduction......................................................................................................................... 1
1.1
82559 Overview .................................................................................................... 1
1.2
Features, Enhancements, and Changes to the 82559 from the 82558................. 1
1.3
Enhancements to the 82559 C-Step ..................................................................... 2
2.0
82559 Architectural Overview ............................................................................................3
2.1
Parallel Subsystem Overview................................................................................3
2.2
FIFO Subsystem Overview ................................................................................... 4
2.3
10/100 Mbps Serial CSMA/CD Unit Overview ......................................................5
2.4
10/100 Mbps Physical Layer Unit.......................................................................... 5
3.0
Signal Descriptions............................................................................................................. 7
3.1
Signal Type Definitions ......................................................................................... 7
3.2
PCI Bus and CardBus Interface Signals ............................................................... 7
3.2.1
Address and Data Signals ....................................................................... 7
3.2.2
Interface Control Signals .........................................................................8
3.2.3
System and Power Management Signals ...............................................9
3.3
Local Memory Interface Signals .......................................................................... 10
3.4
System Management Bus (SMB) Interface Signals ........................................... 12
3.5
Testability Port Signals ....................................................................................... 12
3.6
PHY Signals ....................................................................................................... 12
4.0
82559 Media Access Control Functional Description....................................................... 15
4.1
82559 Initialization............................................................................................... 15
4.1.1
Initialization Effects on 82559 Units ....................................................... 15
4.1.2
Initialization Effects on TCO Functionality .............................................. 16
4.2
PCI and CardBus Interface ................................................................................. 16
4.2.1
82559 Bus Operations............................................................................ 16
4.2.2
PCI Mode Pin ......................................................................................... 25
4.2.3
Clockrun Signal ...................................................................................... 25
4.2.4
Power Management Event and Card Status Change Signals................ 26
4.3
PCI Power Management .....................................................................................26
4.3.1
Power States ..........................................................................................26
4.3.2
Wake-up Events .....................................................................................31
4.4
CardBus Power Management ............................................................................. 32
4.5
Wake on LAN (Preboot Wake-up) .......................................................................32
4.6
Parallel Flash/Modem Interface........................................................................... 33
4.7
Serial EEPROM Interface.................................................................................... 33
4.8
10/100 Mbps CSMA/CD Unit............................................................................... 36
4.8.1
Full Duplex ............................................................................................. 37
4.8.2
Flow Control ........................................................................................... 37
4.8.3
Address Filtering Modifications .............................................................. 37
4.8.4
VLAN Support ........................................................................................ 37
4.9
Media Independent Interface (MII) Management Interface .................................38
5.0
82559 Physical Layer Functional Description ..................................................................39
5.1
100BASE-TX PHY Unit ....................................................................................... 39
82559 -- Networking Silicon
iv
Datasheet
5.1.1
100BASE-TX Transmit Clock Generation .............................................. 39
5.1.2
100BASE-TX Transmit Blocks ............................................................... 39
5.1.3
100BASE-TX Receive Blocks ................................................................ 42
5.1.4
100BASE-TX Collision Detection ........................................................... 43
5.1.5
100BASE-TX Link Integrity and Auto-Negotiation Solution.................... 43
5.1.6
Auto 10/100 Mbps Speed Selection ....................................................... 43
5.2
10BASE-T Functionality ...................................................................................... 44
5.2.1
10BASE-T Transmit Clock Generation................................................... 44
5.2.2
10BASE-T Transmit Blocks.................................................................... 44
5.2.3
10BASE-T Receive Blocks..................................................................... 44
5.2.4
10BASE-T Collision Detection................................................................ 45
5.2.5
10BASE-T Link Integrity ......................................................................... 45
5.2.6
10BASE-T Jabber Control Function ....................................................... 45
5.2.7
10BASE-T Full Duplex ........................................................................... 46
5.3
Auto-Negotiation Functionality ............................................................................ 46
5.3.1
Description ............................................................................................. 46
5.3.2
Parallel Detect and Auto-Negotiation ..................................................... 46
5.4
LED Description .................................................................................................. 47
6.0
82559 Modem Functionality ............................................................................................. 49
6.1
PCI Address Mapping to the Modem .................................................................. 49
6.2
Modem Read and Write Cycles .......................................................................... 49
6.3
Modem and Preboot eXtension Environment Coexistence................................. 49
6.3.1
Programming Details.............................................................................. 49
6.3.2
Support Circuitry .................................................................................... 50
7.0
82559 TCO Functionality ................................................................................................. 51
7.1
System Functionality with a TCO Controller ....................................................... 51
7.2
System Functionality without a TCO Controller .................................................. 53
7.3
TCO Interface...................................................................................................... 53
7.3.1
SMB Alert Signal (SMBALRT#).............................................................. 53
7.3.2
Alert Response Address (ARA) Cycle.................................................... 54
8.0
PCI and CardBus Configuration Registers....................................................................... 55
8.1
Function 0: LAN (Ethernet) PCI Configuration Space ......................................... 55
8.1.1
PCI Vendor ID and Device ID Registers ................................................ 55
8.1.2
PCI Command Register ......................................................................... 56
8.1.3
PCI Status Register................................................................................ 57
8.1.4
PCI Revision ID Register........................................................................ 58
8.1.5
PCI Class Code Register ....................................................................... 58
8.1.6
PCI Cache Line Size Register................................................................ 58
8.1.7
PCI Latency Timer ................................................................................. 59
8.1.8
PCI Header Type ................................................................................... 59
8.1.9
PCI Base Address Registers.................................................................. 59
8.1.10 Base Address Registry Summary .......................................................... 61
8.1.11 CardBus Card Information Structure (CIS) Pointer ................................ 61
8.1.12 PCI Subsystem Vendor ID and Subsystem ID Registers....................... 61
8.1.13 Capability Pointer ................................................................................... 62
8.1.14 Interrupt Line Register............................................................................ 62
8.1.15 Interrupt Pin Register ............................................................................. 62
8.1.16 Minimum Grant Register ........................................................................ 62
Datasheet
v
Networking Silicon -- 82559
8.1.17 Maximum Latency Register.................................................................... 63
8.1.18 Capability ID Register............................................................................. 63
8.1.19 Next Item Pointer.................................................................................... 63
8.1.20 Power Management Capabilities Register .............................................63
8.1.21 Power Management Control/Status Register (PMCSR)......................... 64
8.1.22 Data Register ......................................................................................... 64
8.2
Function 1: Modem PCI Configuration Space ..................................................... 66
8.2.1
Modem Configuration ID Register .......................................................... 66
8.2.2
Modem Command Register ................................................................... 67
8.2.3
Modem Status Register .......................................................................... 67
8.2.4
Modem Revision ID Register..................................................................68
8.2.5
Modem Header Type Register ............................................................... 68
8.2.6
Modem I/O Base Address Register........................................................ 68
8.2.7
Modem Memory Base Address Register................................................ 68
8.2.8
Modem CardBus CIS Pointer ................................................................. 68
8.2.9
Modem Subsystem Vendor ID Register ................................................. 68
8.2.10 Modem Subsystem ID Register.............................................................. 69
8.2.11 Modem Capabilities Pointer ................................................................... 69
8.2.12 Modem Interrupt Register.......................................................................69
8.2.13 Modem Power Management Capabilities Register ................................ 69
8.2.14 Modem Power Management Control/Status Register ............................ 69
8.2.15 Modem Data Register ............................................................................ 69
8.2.16 Modem Support in PCI Mode ................................................................. 70
9.0
Control/Status Registers .................................................................................................. 71
9.1
LAN (Ethernet) Control/Status Registers ............................................................ 71
9.1.1
System Control Block Status Word ........................................................ 73
9.1.2
System Control Block Command Word .................................................. 73
9.1.3
System Control Block General Pointer ................................................... 74
9.1.4
PORT ..................................................................................................... 74
9.1.5
Flash Control Register............................................................................ 74
9.1.6
EEPROM Control Register ..................................................................... 74
9.1.7
Management Data Interface Control Register ........................................74
9.1.8
Receive Direct Memory Access Byte Count........................................... 74
9.1.9
Early Receive Interrupt........................................................................... 75
9.1.10 Flow Control Register ............................................................................. 75
9.1.11 Power Management Driver Register ...................................................... 75
9.1.12 General Control Register........................................................................ 76
9.1.13 General Status Register .........................................................................76
9.1.14 Ethernet Card Status Change Registers ................................................ 76
9.2
Statistical Counters ............................................................................................. 79
9.3
Modem Control/Status Registers ........................................................................ 81
9.3.1
Modem Base Memory Addressing ......................................................... 81
9.3.2
Modem Base I/O Addressing ................................................................. 82
9.3.3
Modem CardBus CSTCHG Registers ....................................................82
10.0
PHY Unit Registers .......................................................................................................... 85
10.1
MDI Registers 0 - 7 ............................................................................................. 85
10.1.1 Register 0: Control Register Bit Definitions ........................................... 85
10.1.2 Register 1: Status Register Bit Definitions ............................................ 86
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