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February 1995
COPYRIGHT
INTEL CORPORATION 1995
Order Number 270501-007
80C51FA 83C51FA
EVENT-CONTROL CHMOS SINGLE-CHIP
8-BIT MICROCONTROLLER
Automotive
Y
Extended Automotive
Temperature Range
(
b
40 C to
a
125 C Ambient)
Y
High Performance CHMOS Process
Y
Three 16-Bit Timer Counters
Timer 2 is an Up Down
Timer Counter
Y
Programmable Counter Array with
High Speed Output
Compare Capture
Pulse Width Modulator
Watchdog Timer Capabilities
Y
8K On-Chip ROM
Y
256 Bytes of On-Chip Data RAM
Y
Boolean Processor
Y
32 Programmable I O Lines
Y
7 Interrupt Sources
Y
Programmable Serial Channel with
Framing Error Detection
Automatic Address Recognition
Y
TTL and CMOS Compatible Logic
Levels
Y
64K External Program Memory Space
Y
64K External Data Memory Space
Y
MCS
51 Microcontroller Fully
Compatible Instruction Set
Y
Power Saving Idle and Power Down
Modes
Y
ONCE (On-Circuit Emulation) Mode
Y
Available in PLCC and PDIP Packages
(See Packaging Specification Order
231369)
Y
Available in 12 MHz and 16 MHz
Versions
MEMORY ORGANIZATION
PROGRAM MEMORY Up to 8 Kbytes of the program memory can reside in the on-chip ROM In addition the
device can address up to 64K of program memory external to the chip
DATA MEMORY This microcontroller has a 256 x 8 on-chip RAM In addition it can address up to 64 Kbytes of
external data memory
The Intel 80C51FA 83C51FA is a single-chip control oriented microcontroller which is fabricated on Intel's
CHMOS III (83C51FA) ROM technology For the remainder of this datasheet references to the ROMless
(80C51FA) and ROM (83C51FA) versions will be denoted as 83C51FA Being a member of the MCS
51
microcontroller family the 83C51FA uses the same powerful instruction set has the same architecture and is
pin-for-pin compatible with the existing MCS 51 microcontroller products The 83C51FA is an enhanced
version of the 87C51 It's added features make it an even more powerful microcontroller for applications that
require Pulse Width Modulation High Speed I O and up down counting capabilities such as brake and
traction control It also has a more versatile serial channel that facilitates multi-processor communications
NOTICE
This datasheet contains information on products in full production Specifications within this datasheet
are subject to change without notice Verify with your local Intel sales office that you have the latest
datasheet before finalizing a design
AUTOMOTIVE 80C51FA 83C51FA
270501 1
Figure 1 83C51FA Block Diagram
2
AUTOMOTIVE 80C51FA 83C51FA
80C51FA 83C51FA PRODUCT
OPTIONS
Intel's extended and automotive temperature range
products are designed to meet the needs of those
applications whose operating requirements exceed
commercial standards
With the commercial standard temperature range
operational characteristics are guaranteed over the
temperature range of 0 C to 70 C ambient With the
extended temperature range option
operational
characteristics are guaranteed over the temperature
range of b40 C to a85 C ambient For the automo-
tive temperature range option operational charac-
teristics are guaranteed over the temperature range
of b40 C to a125 C ambient
As shown in Figure 2 temperature burn-in and
package options are identified by a one- or two-letter
prefix to the part number
270501 2
Example
AN83C51FA indicates an automotive temperature range version of the 83C51FA in a PLCC package with 8 Kbyte ROM
program memory
Figure 2 MCS
51 Microcontroller Product Family Nomenclature
Table 1 Temperature Options
Temperature
Temperature
Operating
Burn-In
Classification
Designation
Temperature
Options
C Ambient
Extended
T
b
40 to a85
Standard
L
b
40 to a85
Extended
Automotive
A
b
40 to a125
Standard
B
b
40 to a125
Extended
3
AUTOMOTIVE 80C51FA 83C51FA
PIN DESCRIPTIONS
V
CC
Supply voltage
V
SS
Circuit ground
Port 0
Port 0 is an 8-bit open drain bidirectional
I O port As an output port each pin can sink several
LS TTL inputs Port 0 pins that have 1's written to
them float and in that state can be used as high-im-
pedance inputs
Port 0 is also the multiplexed low-order address and
data bus during accesses to external Program and
Data Memory In this application it uses strong inter-
nal pullups when emitting1's and can source and
sink several LS TTL inputs
Port 0 outputs the code bytes during program verifi-
cation External pullup resistors are required during
program verification
Port 1
Port 1 is an 8-bit bidirectional I O port with
internal pullups The Port 1 output buffers can drive
LS TTL inputs Port 1 pins that have 1's written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 1
pins that are externally pulled low will source current
(I
IL
on the datasheet) because of the internal pull-
ups
In addition Port 1 serves the functions of the follow-
ing special features of the 83C51FA
Port Pin
Alternate Function
P1 0
T2 (External Count Input to Timer
Counter 2)
P1 1
T2EX (Timer Counter 2 Capture
Reload Trigger and Direction Control)
P1 2
ECI (External Count Input to the PCA)
P1 3
CEX0 (External I O for Compare
Capture Module 0)
P1 4
CEX1 (External I O for Compare
Capture Module 1)
P1 5
CEX2 (External I O for Compare
Capture Module 2)
P1 6
CEX3 (External I O for Compare
Capture Module 3)
P1 7
CEX4 (External I O for Compare
Capture Module 4)
Port 2
Port 2 is an 8-bit bidirectional I O port with
internal pullups The Port 2 output buffers can drive
LS TTL inputs Port 2 pins that have 1's written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 2
pins that are externally pulled low will source current
(I
IL
on the datasheet) because of the internal pull-
ups
Port 2 emits the high-order address byte during
fetches from external Program Memory and during
accesses to external Data Memory that use 16-bit
addresses (MOVX
DPTR) In this application it
uses strong internal pullups when emitting 1's Dur-
ing accesses to external Data Memory that use 8-bit
Pin (PDIP)
270501 3
Pad (PLCC)
270501 4
Do not connect reserved pins
Diagrams are for pin reference only Package sizes are not to scale
Figure 3 Pin Connections
4
AUTOMOTIVE 80C51FA 83C51FA
addresses (MOVX
Ri) Port 2 emits the contents of
the P2 Special Function Register
Port 3
Port 3 is an 8-bit bidirectional I O port with
internal pullups The Port 3 output buffers can drive
LS TTL inputs Port 3 pins that have 1's written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 3
pins that are externally pulled low will source current
(I
IL
on the datasheet) because of the pullups
Port 3 also serves the functions of various special
features of the MCS 51 microcontroller family as
listed below
Port Pin
Alternate Function
P3 0
RXD (serial input port)
P3 1
TXD (serial output port)
P3 2
INT0 (external interrupt 0)
P3 3
INT1 (external interrupt 1)
P3 4
T0 (Timer 0 external input)
P3 5
T1 (Timer 1 external input)
P3 6
WR (external data memory write strobe)
P3 7
RD (external data memory read strobe)
RESET
Reset input A high on this pin for two ma-
chine cycles while the oscillator is running resets the
device An internal pulldown resistor permits a pow-
er-on reset with only a capacitor connected to V
CC
ALE PROG
Address Latch Enable output pulse for
latching the low byte of the address during accesses
to external memory
In normal operation ALE is emitted at a constant
rate of
the oscillator frequency and may be used
for external timing or clocking purposes Note how-
ever that one ALE pulse is skipped during each ac-
cess to external Data Memory
Throughout the remainder of this datasheet ALE will
refer to the signal coming out of the ALE PROG pin
and the pin will be referred to as the ALE PROG pin
PSEN
Program Store Enable is the read strobe to
external Program Memory
When the 83C51FA is executing code from external
Program Memory PSEN is activated twice each ma-
chine cycle except that two PSEN activations are
skipped during each access to external Data Memo-
ry
EA V
PP
External Access enable
EA must be
strapped to V
SS
in order to enable the device to
fetch code from external Program Memory locations
0000H to 0FFFFH Note however that if either of
the Program Lock bits are programmed EA will be
internally latched on reset
EA should be strapped to V
CC
for internal program
executions
XTAL1
Input to the inverting oscillator amplifier
XTAL2
Output from the inverting oscillator amplifi-
er
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output respec-
tively of a inverting amplifier which can be config-
ured for use as an on-chip oscillator as shown in
Figure 4 Either a quartz crystal or ceramic resonator
may be used More detailed information concerning
the use of the on-chip oscillator is available in Appli-
cation Note AP-155 ``Oscillators for Microcontrol-
lers ''
To drive the device from an external clock source
XTAL1 should be driven while XTAL2 floats as
shown in Figure 5 There are no requirements on the
duty cycle of the external clock signal since the in-
put to the internal clocking circuitry is through a di-
vide-by-two flip-flop but minimum and maximum
high and low times specified on the datasheet must
be observed
An external oscillator may encounter as much as a
100 pF load at XTAL1 when it starts up This is due
to interaction between the amplifier and its feedback
capacitance Once the external signal meets the V
IL
and V
IH
specifications the capacitance will not ex-
ceed 20 pF
270501 5
C1 C2 e 30 pF
g
10 pF for Crystals
For Ceramic Resonators contact resonator manufacturer
Figure 4 Oscillator Connections
5
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