CD1865
Intelligent Eight-Channel Communications Controller
Datasheet
Product Features
s
Eight full-duplex asynchronous channels
supporting data rates up to 115.2 kbps
Note: To support this data rate, the
specified system clock frequency is
required.
s
Register-based interrupt acknowledges
eliminate need for separate interrupt
acknowledge signals
s
Automatic prioritizing scheme allows
device to respond to an interrupt
acknowledge with the highest internal
interrupt pending (host-programmable)
s
Sophisticated interrupt schemes
-- Vectored interrupts
-- Fair Share interrupts
-- Good Data
interrupts for improved
throughput
-- Simultaneous interrupt requests for three
classes of interrupts: Rx, Tx, and
modem state changes
s
Independent baud-rate generators for each
channel/direction
s
Software compatibility with the CD180 and
CD1864 devices
s
Generation and detection of special
characters
s
Automatic flow control
-- In-band (Xon, Xoff generation, and
detection)
-- Out-of-band (DTR/DSR or RTS/CTS)
s
On-chip FIFO -- 8 bytes each for Rx, Tx,
and Status
s
Line break detection and generation
s
Multiple-chip daisy-chain cascading
feature
s
Odd, even, forced, or no parity
s
modem/general-purpose I/O signals per
channel
s
System clock up to 66 MHz (x2), 33MHz
(x1)
s
CMOS technology in 100-pin MQFP
As of May 18, 2001, this document replaces the Basis
Communications Corp. document CL-CD1865 -- Intelligent 8-Channel Communications Controller. May 2001
Datasheet
Information in this document is provided in connection with Intel
products. No license, express or implied, by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability
whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not
intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The CD1865 may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current
characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel's website at http://www.intel.com.
Copyright Intel Corporation, 2001
*Third-party brands and names are the property of their respective owners.
Datasheet
3
Intelligent Eight-Channel Communications Controller -- CD1865
Contents
1.0
Overview
...................................................................................................................... 10
1.1
Theory of Operation ............................................................................................ 10
2.0
Conventions
............................................................................................................... 13
2.1
Abbreviations....................................................................................................... 13
2.2
Acronyms ............................................................................................................13
3.0
Device Selection Considerations
...................................................................... 15
4.0
Pin Information
.......................................................................................................... 16
4.1
Pin Diagram......................................................................................................... 16
4.2
Pin Assignments.................................................................................................. 17
5.0
Functional Description
........................................................................................... 18
5.1
Introduction.......................................................................................................... 18
5.2
Internal Operation................................................................................................ 20
5.3
Service Request and Interrupt Operation............................................................ 26
5.3.1
Theory of Operation ............................................................................... 26
5.3.2
Internal Implementation of the Service Request Logic........................... 28
5.3.3
Priorities and Fair Share......................................................................... 31
5.4
Types of Service Requests ................................................................................. 31
5.4.1
Receive Service Requests .....................................................................32
5.4.2
Transmit Service Requests .................................................................... 35
5.4.3
Modem Signal Change Service Requests.............................................. 35
5.5
Implementing Service Requests.......................................................................... 35
5.5.1
Method 1a -- Full Interrupt Type A, Three-Level Interrupt
with Three-Level Acknowledge .............................................................. 37
5.5.2
Method 1b -- Full Interrupt Type B, Three-Level
Interrupt with Single-Level Acknowledge ............................................... 38
5.5.3
Method 2b -- Interrupt Interface, Single-Level
Interrupt with Single-Level Acknowledge ............................................... 39
5.5.4
Method 3b -- Polled Interface................................................................ 40
5.5.5
Comparison of Interrupt and Polled Code Sequences ........................... 42
5.5.6
Cascading Service Requests with Multiple CD1865s ............................ 43
5.5.7
Multiple CD1865s without Cascading..................................................... 44
5.5.8
Acknowledging Service Requests .......................................................... 44
6.0
System Bus Interface and System Clock
....................................................... 46
6.1
System Interface Considerations ........................................................................ 47
6.2
System Clock and Bit Rate Options .................................................................... 47
6.2.1
System Clock .........................................................................................47
6.2.2
External Clock ........................................................................................ 47
6.2.3
1 Clock Option ...................................................................................... 48
6.2.4
Bit Rate Options ..................................................................................... 48
6.2.5
Maximum Throughput Limits .................................................................. 51
6.3
CD1865 Basic Bus Interface and Addressing ..................................................... 51
6.3.1
Intel, Versus Motorola, Interface Signals and Addressing ...................... 51
CD1865 -- Intelligent Eight-Channel Communications Controller
4
Datasheet
6.3.2
Unclocked Versus Clocked Bus Interface .............................................. 52
6.4
Interface Examples ............................................................................................. 54
6.4.1
Interfacing to 80X86-Family Processors ................................................ 55
6.4.2
Interfacing to 680X0-Family Processors ................................................ 55
6.4.3
Interfacing to the VME Bus .................................................................... 55
7.0
Serial Interfaces
........................................................................................................ 58
7.1
Receiver Operation ............................................................................................. 58
7.1.1
Basic Operation...................................................................................... 58
7.1.2
Receive FIFO Operation ........................................................................ 58
7.1.3
FIFO Timer Operations .......................................................................... 60
7.1.4
Receive Service Requests ..................................................................... 60
7.1.5
Receive Good Data Service Request ................................................. 61
7.1.6
Receive Exception Service Request ...................................................... 61
7.1.7
Types of Errors....................................................................................... 62
7.1.8
Types of Exceptions ............................................................................... 62
7.1.9
Flow-Control Characters ........................................................................ 63
7.1.10 Programming Notes ............................................................................... 68
7.2
Transmitter Operation ......................................................................................... 68
7.2.1
Basic Operation...................................................................................... 68
7.2.2
FIFO Operation ...................................................................................... 69
7.2.3
Transmit Service Requests .................................................................... 69
7.2.4
Special Transmitter Commands ............................................................. 70
7.2.5
Special Character Transmission by Send
Special Character Command ................................................................. 70
7.2.6
Embedded Transmit Commands............................................................ 70
7.2.7
Sending Breaks ...................................................................................... 71
7.2.8
Sending Inter-Character Delays ............................................................. 71
7.2.9
Summary of Special Transmitter Commands......................................... 71
7.3
Flow Control ........................................................................................................ 72
7.3.1
Receiver Flow Control ............................................................................ 72
7.3.2
Receiver Hardware (Out-of-Band) Flow Control .................................... 73
7.3.3
Receiver Software (In-Band) Flow Control............................................. 74
7.3.4
Transmitter Flow Control ........................................................................ 75
7.3.5
Transmitter Hardware (Out-of-Band) Flow Control ................................ 76
7.3.6
Transmitter Software (In-Band) Flow Control......................................... 76
7.4
Modem Signals and General-Purpose I/O .......................................................... 78
7.4.1
Generating Service Requests with Modem Pins .................................... 80
7.4.2
Using Modem Pins as General-Purpose I/O .......................................... 80
7.5
Testing the CD1865 -- Loopback Tests ............................................................. 80
8.0
Programming
............................................................................................................. 83
8.1
Types of Registers .............................................................................................. 83
8.2
Access Duty Cycle .............................................................................................. 84
8.3
Accessing FIFOs Versus Other Registers .......................................................... 84
8.4
Initialization ......................................................................................................... 84
8.5
Global Register Initialization................................................................................ 86
8.6
Service Request Initialization .............................................................................. 86
8.7
Prescaler ............................................................................................................. 86
8.8
Channel Initialization and Changes..................................................................... 87
Datasheet
5
Intelligent Eight-Channel Communications Controller -- CD1865
8.9
Transmitting Data ................................................................................................ 87
8.10
Receiving Data .................................................................................................... 88
8.11
Programming Examples ...................................................................................... 88
8.11.1 Programming the Service Match Registers ............................................88
8.11.2 CD1865 Initialization .............................................................................. 88
8.11.3 Basic I/O Operations .............................................................................. 90
8.11.4 Interrupt Response Operations .............................................................. 90
8.11.5 Polled Mode Operation........................................................................... 93
9.0
Detailed Register Descriptions
........................................................................... 94
9.1
Register Map Quick Reference ........................................................................... 94
9.2
Global Registers.................................................................................................. 97
9.2.1
Miscellaneous Registers ........................................................................ 98
9.2.2
Configuration Registers.......................................................................... 98
9.2.3
Service Request/Interrupt Control Registers ........................................ 103
9.3
Indexed Indirect Registers................................................................................. 108
9.3.1
Receive Data Count Register............................................................... 108
9.3.2
Receive Data Register ......................................................................... 109
9.3.3
Receive Character Status Register ...................................................... 110
9.3.4
Transmit Data Register ........................................................................ 111
9.3.5
End-of-Service Request Register......................................................... 111
9.4
Channel Registers.............................................................................................111
9.4.1
Enable Register................................................................................... 112
9.4.2
Channel Command Register ................................................................ 112
9.4.3
Channel Option Register 1 ...................................................................116
9.4.4
Channel Option Register 2 ...................................................................116
9.4.5
Channel Option Register 3 ...................................................................117
9.4.6
Channel Control Status Register.......................................................... 118
9.4.7
Receiver Bit Register............................................................................ 119
9.4.8
Receive Time-Out Period Register....................................................... 120
9.4.9
Receive Bit Rate Period Registers (High/Low)..................................... 120
9.4.10 Transmit Bit Rate Period Registers (High/Low).................................... 121
9.4.11 Special Character Register 1 ............................................................... 121
9.4.12 Special Character Register 2 ............................................................... 122
9.4.13 Special Character Register 3 ............................................................... 122
9.4.14 Special Character Register 4 ............................................................... 123
9.4.15 Modem Change Register ..................................................................... 123
9.4.16 Modem Change Option Register 1....................................................... 124
9.4.17 Modem Change Option Register 2....................................................... 125
9.4.18 Modem Signal Value Register.............................................................. 125
9.4.19 Modem Signal Value Request-to-Send Register.................................. 126
9.4.20 Modem Signal Value Data-Terminal-Ready Register .......................... 126
10.0
Electrical Specifications
.................................................................................... 127
10.1
Absolute Maximum Ratings............................................................................... 127
10.2
Recommended Operating Conditions ............................................................... 127
10.3
DC Electrical Characteristics............................................................................. 127
10.4
Index of Timing Information............................................................................... 128
10.5
AC Electrical Characteristics ............................................................................. 128
10.5.1 Clocked Bus Interface ..........................................................................128
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