1
TM
ACTS04MS
Radiation Hardened
Hex Inverter
Pinouts
14 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835
DESIGNATOR CDIP2-T14, LEAD FINISH C
TOP VIEW
14 PIN CERAMIC FLATPACK MIL-STD-1835
DESIGNATOR CDFP3-F14, LEAD FINISH C
TOP VIEW
Functional Diagram
TRUTH TABLE
INPUTS
OUTPUTS
An
Yn
L
H
H
L
NOTE: L = Logic Level Low, H = Logic level High
A1
Y1
A2
Y2
A3
Y3
GND
VCC
A6
Y6
A5
Y5
A4
Y4
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
13
12
11
10
9
8
2
3
4
5
6
7
1
A1
Y1
A2
Y2
A3
Y3
GND
VCC
A6
Y6
A5
Y5
A4
Y4
An
Yn
Features
Devices QML Qualified in Accordance with MIL-PRF-38535
Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96712 and Intersil's QM Plan
1.25 Micron Radiation Hardened SOS CMOS
Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
Single Event Upset (SEU) Immunity: <1 x 10
-10
Errors/Bit/Day
(Typ)
SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
2
/mg
Dose Rate Upset . . . . . . . . . . . . . . . . >10
11
RAD (Si)/s, 20ns Pulse
Dose Rate Survivability . . . . . . . . . . . >10
12
RAD (Si)/s, 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range . . . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Significant Power Reduction Compared to ALSTTL Logic
DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current
1
A at VOL, VOH
Fast Propagation Delay . . . . . . . . . . . . . . . . . 14ns (Max), 9ns (Typ)
Description
The Intersil ACTS04MS is a Radiation Hardened Hex Inverter.
The ACTS04MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of radiation hardened,
high-speed, CMOS/SOS Logic Family.
The ACTS04MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
January 1996
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962F9671201VCC
-55
o
C to +125
o
C
MIL-PRF-38535 Class V
14 Lead SBDIP
5962F9671201VXC
-55
o
C to +125
o
C
MIL-PRF-38535 Class V
14 Lead Ceramic Flatpack
ACTS04D/Sample
25
o
C
Sample
14 Lead SBDIP
ACTS04K/Sample
25
o
C
Sample
14 Lead Ceramic Flatpack
ACTS04HMSR
25
o
C
Die
Die
tle
TS
S)
-
ia-
d-
rte
hor
-
ds
r-
ia-
d-
,
d,
L,
l-
,
s
ic,
S,
,
rte
Spec Number
518782
File Number
3383.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001, All Rights Reserved
3
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable.
However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its
use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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ACTS04MS
Spec Number
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