1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright
Intersil Corporation 1999
ACS521MS
Radiation Hardened
8-Bit Magnitude Comparator
Features
Devices QML Qualified in Accordance with MIL-PRF-38535
Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96709 and Intersil' QM Plan
1.25 Micron Radiation Hardened SOS CMOS
Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
Single Event Upset (SEU) Immunity: <1 x 10
-10
Errors/Bit/Day
(Typ)
SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
2
/mg
Dose Rate Upset . . . . . . . . . . . . . . . . >10
11
RAD (Si)/s, 20ns Pulse
Dose Rate Survivability . . . . . . . . . . . >10
12
RAD (Si)/s, 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range . . . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Significant Power Reduction Compared to ALSTTL Logic
DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
Input Current
1
A at VOL, VOH
Fast Propagation Delay . . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ)
Description
The Intersil ACS521MS is a Radiation Hardened 8 bit magnitude com-
parator device. It provides a low output YB when Word A equals word B
and input GB is low. All other input states cause a high output.
The ACS521MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of radiation hardened,
high-speed, CMOS/SOS Logic Family.
The ACS521MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
January 1996
Pinouts
20 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T20,
LEAD FINISH C
TOP VIEW
20 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP4-F20,
LEAD FINISH C
TOP VIEW
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
GB
A0
B0
A1
B1
A2
A3
B2
B3
GND
VCC
B7
A7
B6
YB
A6
B5
A5
B4
A4
2
3
4
5
6
7
8
1
20
19
18
17
16
15
14
13
9
10
12
11
GB
A0
B0
A1
B1
A2
B2
A3
B3
GND
VCC
B7
A7
B6
YB
A6
B5
A5
B4
A4
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962F9670901VRC
-55
o
C to +125
o
C
MIL-PRF-38535 Class V
20 Lead SBDIP
5962F9670901VXC
-55
o
C to +125
o
C
MIL-PRF-38535 Class V
20 Lead Ceramic Flatpack
ACS521D/Sample
25
o
C
Sample
20 Lead SBDIP
ACS521K/Sample
25
o
C
Sample
20 Lead Ceramic Flatpack
ACS521HMSR
25
o
C
Die
Die
Spec Number
518821
File Number
3111.1
2
ACS521MS
Functional Diagram
TRUTH TABLE
INPUTS
OUTPUT
GB
A
B
YB
0
A
=
B
L
0
A
B
H
1
X
X
H
NOTE: L = Low, H = High, X = Don't Care
A
B
8
+
8
1
+
8
GB
1
YB
Spec Number
518821
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
3
ACS521MS
Spec Number
518821
Die Characteristics
DIE DIMENSIONS:
102mils x 102mils
2,600mm x 2,600mm
METALLIZATION:
Type: AlSi
Metal 1 Thickness: 7.125k
1.125k
Metal 2 Thickness: 9k
1k
GLASSIVATION:
Type: SiO
2
Thickness: 8k
1k
WORST CASE CURRENT DENSITY:
<2.0 x 10
5
A/cm
2
BOND PAD SIZE:
> 4.3mils x 4.3mils
> 110
m x 110
m
Metallization Mask Layout
ACS521MS
(1) GB
(2) A0
(20) VCC
(16) B6
GND (10)
A4 (11)
B4 (12)
NC
A1 (4)
A3 (8)
(14) B5
(15) A6
B1 (5)
NC
A2 (6)
NC
B2 (7)
B3 (9)
A5 (13)
(17) A7
NC
3) B0
(18) B7
(19) YB
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