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Электронный компонент: CA3450

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1
CA3450
220MHz, Video Line Driver, High Speed
Operational Amplifier
The CA3450 is a large signal video line driver and high
speed operational amplifier capable of driving 50
transmission lines and flash A/Ds. The uncompensated unity
gain crossing occurs at 230MHz without load. It can operate
at dual or single supplies of
7.25V or 14.5V, respectively.
The CA3450 can be compensated with a single capacitor
network. It has output drive capability of 75mA SINK or
SOURCE. The CA3450 is capable of driving Flash A/Ds in
video or high speed instrumentation (accurate) applications
with bandwidth up to 10MHz. Offset voltage nulling terminals
are also available.
Pinout
CA3450
(PDIP)
TOP VIEW
Features
High Open Loop Gain at Video Frequencies
- A
OL
. . . . . . . . . . . . . . . . . . . . . . . . . . >40dB at f = 5MHz
Power Bandwidth of 10MHz . . . . . . . A
CL
= 5; V
O
=
3.5V
Slew Rate at Full Load . . . . . . . . . . . . . 330V/
s (A
V
10)
f
T
= 220MHz; C
C
= 0pF With a Load of 50
||20pF|| 1M
(Scope Input)
V
OUT
=
4.1V Into 75
Offset Null Terminals
Applications
Video Line Driver
High Frequency Unity Gain Buffer
Pulse Amplifier
High Speed Comparator
High Frequency Oscillator and Video Amplifiers
Driver for A/Ds in Video Applications . . . . . . . .10MHz BW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
OFFSET NULL
NC
- INPUT
V-
V-
V
O
V+
V+
OFFSET NULL
+ INPUT
V-
V-
COMP
NC
COMP
NC
Part Number Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CA3450E
-40 to 85
16 Ld PDIP
E16.3
January 1999
File Number
1732.5
OBSOLETE PR
ODUCT
NO RECOMMENDED REPLA
CEMENT
Call Central Applications 1-800-442-7747
or email: centapp@harris.com
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
Intersil Corporation 1999
2
Block Diagram
Schematic Diagram
OUTPUT
INPUT CURRENT
COMPENSATED
DIFFERENTIAL
AMPLIFIER
X180
DC LEVEL
SHIFT
OUTPUT POWER
DRIVER AND
OUTPUT POWER
STAGE
X0.50
X18
BIAS CIRCUIT
-
+
13
6
12
5
4
11
9
STAGE
16
1
14
3
7
V+
8
V+
OFFSET
NULL
PHASE
COMP
V-
+IN
-IN
Q
2
Q
1
Q
3
D
1
Q
26
Q
27
Q
24
Q
25
Q
28
V+
D
7
R
12
250
R
13
860
C
7
Q
29
Q
30
Q
31
Q
32
C
1
Q
33
Q
34
Q
36
Q
37
FREQUENCY
COMPEN-
R
11
3k
R
14
860
R
15
130
R
16
860
R
17
500
R
18
200
R
19
100
R
20
170
R
21
270
R
22
250
Q
7
Q
6
Q
5
Q
4
D
2
Q
8
Q
10
Q
11
C
2
Q
9
Q
12
Q
14
Q
15
Q
16
C
3
Q
35
Q
38
C
4
C
5
C
6
D
3
D
4
D
5
D
6
Q
18
Q
19
D
9
R
7
6
OUTPUT
16
4, 5, 12, 13
V-
1
9
6
D
10
R
8
30
R
5
2K
R
6
2K
R
4
8.5K
11
7
V+
V+
8
FREQUENCY
COMPENSATION
Q
17
14
3
NON-
INVERTING
INPUT
V-
INVERTING
INPUT
Q
21
Q
22
R
3
R
2
140
Q
20
Q
23
R
1
100K
R
9
780
R
10
3.2K
SATION
V-
CA3450
3
Absolute Maximum Ratings
Thermal Information
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . 14.5V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
C
C
= 5pF, V
SUPPLY
=
6V, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
DC
Input Offset Voltage
|V
IO
|
25
-
8
20
mV
Full
-
10
35
mV
Input Bias current
|I
IB
|
25
-
100
400
nA
Input Offset Current
|I
IO
|
25
-
50
200
nA
Open Loop DC Gain
A
OL
V
OUT
=
2.5V, R
L
= 50
25
60
70
-
dB
Full
55
-
-
dB
Power Supply Rejection Ratio
PSRR
V =
1V
25
55
65
-
dB
Common Mode Rejection Ratio
CMRR
V
ICR
=
3.5V
25
50
60
-
dB
Common Mode Input Range
V
ICR
25
3.5
3.7
-
V
Full
3.0
-
-
V
Supply Current
I+
25
-
30
40
mA
Full
-
-
50
mA
DYNAMIC
-3dB Bandwidth
A
V
= 1 (See Figure 2)
C
C
= 5pF
No Load
25
-
200
-
MHz
R
L
= 1M
||20pF
25
-
190
-
MHz
R
L
= 50
||20pF
25
-
185
-
MHz
Bandwidth (Unity Gain Crossing)
A
V
= Open Loop
C
C
= 0 (See Figure 1)
No Load
25
210
230
-
MHz
R
L
= 20pF||1M
25
180
200
-
MHz
R
L
= 50
||20pF
25
180
220
-
MHz
Bandwidth (Unity Gain Crossing)
A
V
= 10, C
C
= 0pF
R
FEEDBACK
= 450
R
PIN 3 - G
= 50
(See Figure 2)
No Load
25
200
210
-
MHz
50
25
175
190
-
MHz
1M||20pF
25
180
195
-
MHz
50
||1M||20pF
25
170
188
-
MHz
Transient Response, Overshoot
(See Figure 3)
OS
A
V
= 1, C
C
= 5pF
R
L
= 50
||20pF
25
-
30
-
%
No Load
25
-
20
-
%
A
V
10, C
C
= 0pF, R
L
= 50
||20pF
25
-
10
-
%
Settling Time (See Figure 5)
(2V Step, R
L
= 50
||20pF)
t
S
A
V
= -1, C
C
= 5pF, 0.1%, 10 Bits
25
-
35
-
ns
A
V
= 1, C
C
= 5pF, 0.1%, 10 Bits
25
-
50
-
ns
A
V
= 10, C
C
= 0pF, 0.1%, 10 Bits
25
-
35
-
ns
A
V
= 10, C
C
= 0pF, 1.0%, 7 Bits
25
-
25
-
ns
CA3450
4
Slew Rate (See Figures 2, 4)
SR
A
V
= 1, C
C
= 5pF
No Load
25
-
220
-
V/
s
R
L
= 50
||20pF
25
-
160
-
V/
s
A
V
10, C
C
= 0pF
No Load
25
370
440
-
V/
s
R
L
= 50
||20pF
25
300
330
-
V/
s
Full Power Bandwidth
(FPBW = SR/
V
P-P
)
FPBW
A
V
= 5, C
C
= 5pF
V
OUT
=
3.5V
No Load
25
-
10
-
MHz
R
L
= 50
||20pF
25
-
7.2
-
MHz
A
V
10, C
C
= 0pF
V
OUT
=
2.0V
No Load
25
29
35
-
MHz
R
L
= 50
||20pF
25
24
26
-
MHz
Input Noise Voltage
e
N
f = 1kHz
25
-
12
-
nV/
Hz
Differential Gain
DG
See Figure 8
25
-
0.2
-
%
Differential Phase
DP
See Figure 8
25
-
0.2
-
Degrees
Output Current
I
OUT
Into +4V or -4V
25
60
75
-
mA
Output Voltage Swing
V
OM
+
R
L
= 75
25
3.9
4.1
-
V
V
OM
-
25
-3.9
-4.1
-
V
Input Capacitance
C
I
f = 1MHz
25
-
2.2
-
pF
Input Resistance
R
I
25
-
1
-
M
Output Resistance
R
OUT
See Figure 14, A
V
= 1, 30MHz
25
-
4
-
Electrical Specifications
C
C
= 5pF, V
SUPPLY
=
6V, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
Test Circuits and Waveforms
FIGURE 1. OPEN LOOP GAIN vs FREQUENCY TEST CIRCUIT
13
1
16
12
5
4
CA3450
+
-
OFFSET
NULL
14
3
GEN
50
50
8
7
11
9
C
C
C
C
50
0.001
F
1M
20pF
6
0.1
F
10
(NOTE 2)
-6V
4.7
F (TANT.)
10
820pF SILVER MICA
OR EQUIVALENT
MULTILAYER
CERAMIC CHIP
0.1
F
0.1
F
10
(NOTE 2)
+6V
4.7
F (TANT.)
+
-
+
-
SCOPE INPUT
NOTE:
2. A 10
,
1
/
4
W supply decoupling resistor is shown in all application circuits of this device. The resistor serves two purposes. First it provides a
means of decoupling the IC directly at its terminal without introducing additional supply resonance due to parallel connected capacitors. Second,
it also provides protection for the device in event of a sustained short circuit applied directly to the output terminals.
All 0.1
F and 0.001
F supply decoupling capacitors
are multilayer ceramic chip types.
51K
CA3450
5
FIGURE 2. UNITY GAIN AND X10 NON-INVERTING AMPLIFIER/AND SLEW RATE TEST CIRCUIT
Transient Response Waveforms
FIGURE 3. TRANSIENT RESPONSE WAVEFORM
FIGURE 4. SLEW RATE WAVEFORM
Test Circuits and Waveforms
(Continued)
10
12
5
4
2
CA3450
+
-
3
GEN
50
11
9
8
7
50
0.1
F
10
-6V
4.7
F (TANT.)
+
-
50
14
CABLE
1M
LENGTH
TEKTRONIX 2465
OSCILLOSCOPE
50
CABLE
1M
LENGTH
15
13
0.1
F
10
+6V
4.7
F (TANT.)
+
-
5pF (A
V
= 1)
6
3
450
6
50
FOR A
V
= 10
0pF (A
V
= 10)
CA3450