6-24
Features
Fast Access Time
- V
DD
= 5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450ns
- V
DD
= 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250ns
Common Data Inputs and Outputs
Multiple Chip Select Inputs to Simplify Memory
System Expansion
Description
The CDP1823 and CDP1823C are 128-word by 8-bit CMOS
SOS static random-access memories. These memories are
compatible with general-purpose microprocessors. The two
memories are functionally identical. They differ in that the
CDP1823 has a recommended operating voltage range of
4V to 10.5V, and the CDP1823C has a recommended oper-
ating voltage range of 4V to 6.5V.
The CDP1823 memory has 8 common data input and data
output terminals for direct connection to a bidirectional data
bus and is operated from a single voltage supply. Five chip-
select inputs are provided to simplify memory-system expan-
sion. In order to enable the CDP1823, the chip-select inputs
CS2, CS3 and CS5 require a low input signal, and the chip-
select inputs CS1 and CS4 require a high input signal.
The MRD signal enables all 8 output drivers when in the low
state and should be in a high state during a write cycle.
After valid data appear at the output, the address inputs may
be changed immediately. Output data will be valid until either
the MRD signal goes high, the device is deselected, or t
AA
(access time) after address changes.
Pinout
Ordering Information
5V
10V
PACKAGE
TEMP. RANGE
PKG.
NO.
CDP1823CE
CDP1823E
PDIP
-40
o
C to +85
o
C E24.6
CDP1823CD
CDP1823D
SBDIP
-40
o
C to +85
o
C D24.6
CDP1823CDX
-
Burn-In
D24.6
CDP1823, CDP1823C
(PDIP, SBDIP)
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
BUS 0
BUS 1
BUS 2
BUS 3
BUS 4
BUS 5
BUS 6
BUS 7
CS1
CS2
CS3
V
SS
16
17
18
19
20
21
22
23
24
15
14
13
V
DD
MA1
MA2
MA3
MA4
MA6
MRD
CS5
CS4
MA0
MA5
MWR
March 1997
CDP1823,
CDP1823C
128-Word x 8-Bit
LSI Static RAM
File Number
1198.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
6-25
OPERATIONAL MODES
FUNCTION
MRD
MWR
CS1
CS2
CS3
CS4
CS5
BUS TERMINAL STATE
Read
0
X
1
0
0
1
0
Storage State of Addressed Word
Write
1
0
1
0
0
1
0
Input High-Impedance
Stand-By (Active)
1
1
1
0
0
1
0
High Impedance
Not Selected
X
X
0
X
X
X
X
High Impedance
X
X
X
1
X
X
X
High Impedance
X
X
X
X
1
X
X
High Impedance
X
X
X
X
X
0
X
High Impedance
X
X
X
X
X
X
1
High Impedance
Logic 1 = High, Logic 0 = Low, X = Don't Care
CDP1823, CDP1823C
6-26
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage Range, (V
DD
)
(All Voltages Referenced to V
SS
Terminal)
CDP1823 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +11V
CDP1823C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to V
DD
+0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . . .
10mA
Operating Temperature Range (T
A
)
Package Type D . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Package Type E . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to +85
o
C
Thermal Resistance (Typical)
JA
(
o
C/W)
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
60
N/A
SBDIP Package . . . . . . . . . . . . . . . . . .
60
17
Maximum Storage Temperature Range (T
STG
) . . .-65
o
C to +150
o
C
Maximum Junction Temperature
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150
o
C
Maximum Lead Temperature (During Soldering) . . . . . . . . . . 300
o
C
Recommended Operating Conditions
At T
A
= Full Package Temperature Range. For maximum reliability, operating conditions
should be selected so that operation is always within the following ranges:
PARAMETER
LIMITS
UNITS
CDP1823D
CDP1823CD
MIN
MAX
MIN
MAX
Supply Voltage Range
4
10.5
4
6.5
V
Recommended Input Voltage Range
V
SS
V
DD
V
SS
V
DD
V
Static Electrical Specifications
At T
A
= -40
o
C to +85
o
C, Except as Noted:
PARAMETER
SYMBOL
CONDITIONS
LIMITS
UNITS
V
O
(V)
V
IN
(V)
V
DD
(V)
CDP1823
CDP1823C
MIN
(NOTE 1)
TYP
MAX
MIN
(NOTE 1)
TYP
MAX
Quiescent Device
Current
I
DD
-
0, 5
5
-
-
500
-
-
500
A
-
0, 10
10
-
-
1000
-
-
-
A
Output Low (Sink)
Current
I
OL
0.4
0, 5
5
2
4
-
2
4
-
mA
0.5
0, 10
10
4.5
9
-
-
-
-
mA
Output High (Source)
Current
I
OH
4.6
0, 5
5
-1
-2
-
-1
-2
-
mA
9.5
0, 10
10
-2.2
-4.4
-
-
-
-
mA
Output Voltage
Low-Level
V
OL
-
0, 5
5
-
0
0.1
-
0
0.1
V
-
0, 10
10
-
0
0.1
-
-
-
V
Output Voltage
High-Level
V
OH
-
0, 5
5
4.9
5
-
4.9
5
-
V
-
0, 10
10
9.9
10
-
-
-
-
V
Input Low Voltage
V
IL
0.5, 4.5
-
5
-
-
1.5
-
-
1.5
V
0.5, 9.5
-
10
-
-
3
-
-
-
V
Input High Voltage
V
IH
0.5, 9.5
-
5
3.5
-
-
3.5
-
-
V
0.5, 9.5
-
10
7
-
-
-
-
-
V
Input Leakage Current
I
IN
Any
Input
0, 5
5
-
-
5
-
-
5
A
0, 10
10
-
-
10
-
-
-
A
Operating Current
(Note 2)
I
DD1
-
0, 5
5
-
4
8
-
4
8
mA
-
0, 10
10
-
8
16
-
-
-
mA
Three-State Output
Leakage Current
I
OUT
0, 5
0, 5
5
-
-
5
-
-
5
A
0, 10
0, 10
10
-
-
10
-
-
-
A
Input Capacitance
C
IN
-
-
-
-
5
7.5
-
5
7.5
pF
Output Capacitance
C
OUT
-
-
-
-
10
15
-
10
15
pF
NOTES:
1. Typical values are for T
A
= +25
o
C and nominal V
DD
.
2. Outputs open circuited; Cycle time = 1
s.
CDP1823, CDP1823C
6-27
+
Dynamic Electrical Specifications
At T
A
= -40 to +85
o
C, V
DD
5%, t
R
, t
F
= 20ns, C
L
= 100pF
PARAMETER
SYMBOL
V
DD
(V)
LIMITS
CDP1823
CDP1823C
UNITS
(NOTE 2)
MIN
(NOTE 1)
TYP
MAX
(NOTE 2)
MIN
(NOTE 1)
TYP
MAX
Read Cycle (See Figure 1)
Access Time From Address
Change
t
AA
5
-
275
450
-
275
450
ns
10
-
150
250
-
-
-
ns
Access Time From Chip
Select
t
DOA
5
-
150
250
-
150
250
ns
10
-
100
150
-
-
-
ns
MRD to Output Active
t
AM
5
-
150
250
-
150
250
ns
10
-
100
150
-
-
-
ns
Data Hold Time After Read
t
DOH
5
25
50
75
25
50
75
ns
10
15
25
40
-
-
-
ns
NOTES:
1. Typical values are at T
A
= 25
o
C and nominal voltage.
2. Time required by a limit device to allow for the indicated function.
ADDRESS
t
AA
t
AM
t
DOA
t
DOH
MRD
CS2, CS3, CS5
CS1, CS4
DATA OUT
HIGH IMPEDANCE
VALID DATA
90%
10%
NOTE:
1. MWR is high during read operation. Timing measurement reference is 0.5 V
DD
.
FIGURE 1. READ CYCLE TIMING DIAGRAM
CDP1823, CDP1823C
6-28
Dynamic Electrical Specifications
At T
A
= -40 to +85
o
C, V
DD
5%, t
R
, t
F
= 20ns, C
L
= 100pF
PARAMETER
SYMBOL
V
DD
(V)
LIMITS
CDP1823
CDP1823C
UNITS
(NOTE 2)
MIN
(NOTE 1)
TYP
MAX
(NOTE 2)
MIN
(NOTE 1)
TYP
MAX
Write Cycle (See Figure 2)
Write Recovery
t
WR
5
75
-
-
75
-
-
ns
10
50
-
-
-
-
-
ns
Write Cycle
t
WC
5
400
-
-
400
-
-
ns
10
225
-
-
-
-
-
ns
Write Pulse Width
t
WRW
5
200
-
-
200
-
-
ns
10
100
-
-
-
-
-
ns
Address Setup Time
t
AS
5
125
-
-
125
-
-
ns
10
75
-
-
-
-
-
ns
Data Setup Time
t
DS
5
100
-
-
100
-
-
ns
10
75
-
-
-
-
-
ns
Data Hold Time From MWR
t
DH
5
75
-
-
75
-
-
ns
10
50
-
-
-
-
-
ns
NOTES:
1. Typical values are at T
A
= 25
o
C and nominal voltage.
2. Time required by a limit device to allow for the indicated function.
ADDRESS
t
WC
t
AS
t
WR
CS1, CS4
CS2, CS3, CS5
t
WRW
t
DS
t
DH
MWR
BUS 0-7
VALID DATA
NOTE:
1. MRD must be high during write operation.
FIGURE 2. WRITE CYCLE TIMING DIAGRAM
CDP1823, CDP1823C