1
FN7033
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
EL2072
730MHz Closed Loop Buffer
The EL2072 is a wide bandwidth, fast
settling monolithic buffer built using an
advanced complementary bipolar
process. This buffer is closed loop to achieve lower output
impedance and higher gain accuracy. Designed for closed-
loop unity gain, the EL2072 has a 730MHz -3dB bandwidth
and 5ns settling to 0.2% while consuming only 15mA of
supply current.
The EL2072 is an obvious high-performance solution for
video distribution and line-driving applications. With low
15mA supply current and a 70mA output drive, performance
in these areas is assured.
The EL2072's settling to 0.2% in 5ns, low distortion, and
ability to drive capacitive loads make it an ideal flash A/D
driver. The wide 730MHz bandwidth and extremely linear
phase allow unmatched signal fidelity.
The EL2072 can be used inside an amplifier loop or PLL as
its wide bandwidth and fast rise time have minimal effect on
loop dynamics.
Elantec products and facilities comply with MIL-I-45028A,
and other applicable quality specifications. For information
on Elantec's processing, see Elantec document QRA-1:
Elantec's Processing, Monolithic Integrated Circuits.
Pinout
Features
730MHz -3dB bandwidth (0.5V
PP
)
5ns settling to 0.2%
V
S
= 5V @ 15mA
Low distortion: HD2, HD3 of -65dBc at 20MHz
Overload/short-circuit protected
Closed-loop, unity gain
Low cost
Direct replacement for CLC110
Applications
Video buffer
Video distribution
HDTV buffer
High-speed A/D buffer
Photodiode, CCD preamps
IF processors
High-speed communications
EL2072
(8-PIN PDIP SO)
TOP VIEW
Manufactured under U.S. Patent No. 4,893,091
Ordering Information
PART
NUMBER
TEMP.
RANGE
PACKAGE
PKG. NO.
EL2072CN
-40C to +85C
8-Pin PDIP
MDP0031
EL2072CS
-40C to +85C
8-Pin SO
MDP0027
Data Sheet
December 1995, Rev. E
OBS
OLE
TE P
ROD
UCT
NO R
ECO
MME
NDE
D RE
PLAC
EME
NT
cont
act o
ur Te
chni
cal S
uppo
rt Ce
nter
at
1-888
-INTE
RSIL
or w
ww.i
nters
il.com
/tsc
2
Absolute Maximum Ratings
(T
A
= 25C)
Supply Voltage (V
S
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Output Current
Output is short-circuit protected to ground, however, maximum reliability is
obtained if I
OUT
does not exceed 70mA.
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
S
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40C to +85C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . -60C to +150C
Thermal Resistance
. . . . . . . . . . . . . . . . . . . . . . . . .
JA
= 95C/W PDIP
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JA
= 175C/W SO
Note: See EL2071/EL2171 for Thermal Impedance curves.
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications
V
S
= 5V, R
L
= 100
, R
S
= 50
unless otherwise specified
PARAMETER
DESCRIPTION
TEST CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
V
OS
Output Offset Voltage
25C
2.0
8.0
mV
T
MIN
16.0
mV
T
MAX
13.0
mV
TCV
OS
Average Offset Voltage Drift
25C - T
MAX
20.0
50.0
V/C
25C - T
MIN
20.0
100.0
I
B
Input Bias Current
25C, T
MAX
10.0
50.0
A
T
MIN
100.0
A
TCI
B
Average Input Bias Current Drift
25C - T
MAX
200.0
300.0
nA/C
25C - T
MIN
200.0
700.0
A
V
Small Signal Gain
R
L
= 100
25C
0.96
0.98
V/V
T
MIN
, T
MAX
0.95
V/V
ILIN
Integral End Point linearity
2V F.S.
25C
0.2
0.4
%F.S.
T
MIN
0.8
%F.S.
T
MAX
0.3
%F.S.
PSRR
Power Supply Rejection Ratio
All
45.0
65.0
dB
I
S
Supply Current--Quiescent
No Load
All
15.0
20.0
mA
R
IN
Input Resistance
25C
100.0
160.0
k
T
MIN
50.0
k
T
MAX
200.0
k
C
IN
Input Capacitance
25C
1.6
2.2
pF
T
MIN
, T
MAX
2.5
pF
R
OUT
Output Impedance (DC)
25C
2.0
3.0
T
MIN
, T
MAX
3.5
I
OUT
Output Current
25C, T
MAX
50.0
70.0
mA
T
MIN
45.0
mA
V
OUT
Output Voltage Swing
R
L
= 100
25C, T
MAX
3.2
4.0
V
T
MIN
3.0
V
EL2072
3
AC Electrical Specifications
V
S
= 5V, R
L
= 100
, R
S
= 50
unless otherwise specified
PARAMETER
DESCRIPTION
TEST CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
FREQUENCY RESPONSE
SSBW
-3dB Bandwidth
(V
OUT
< 0.5V
PP
)
25C
400.0
730.0
MHz
T
MIN
400.0
MHz
T
MAX
300.0
MHz
LSBW
-3dB Bandwidth
(V
OUT
= 5.0V
PP
)
25C
55.0
90.0
MHz
T
MIN
, T
MAX
50.0
MHz
GAIN FLATNESS
GFPL
Peaking V
OUT
< 0.5V
PP
< 200MHz
25C
0.0
0.5
dB
T
MAX
0.6
dB
T
MIN
0.8
dB
GFR
Rolloff V
OUT
< 0.5V
PP
< 200MHz
25C
0.0
0.8
dB
T
MIN
1.0
dB
T
MAX
1.2
dB
GDL
Group Delay
< 200MHz
25C, T
MIN
0.75
1.0
ns
T
MAX
1.2
ns
LPD
Linear Phase Deviation
V
OUT
< 0.5V
PP
< 200MHz
25C, T
MIN
0.7
1.5
T
MAX
2.0
TIME-DOMAIN RESPONSE
TR1, TF1
Rise Time, Fall Time
Input Signal Rise/Fall = 300ps
0.5V Step
25C, T
MIN
0.4
1.0
ns
T
MAX
1.4
ns
TR2, TF2
Rise Time, Fall Time
Input Signal Rise/Fall 1ns
5.0V Step
25C
4.5
7.5
ns
T
MIN
, T
MAX
8.5
ns
TS1
Settling Time to 0.2%
Input Signal Rise/Fall 1ns
2.0V Step
All
5.0
10.0
ns
OS
Overshoot
Input Signal Rise/Fall = 300ps
0.5V Step
25C
0.0
10.0
%
T
MIN
, T
MAX
15.0
%
SR
Slew Rate
25C
500.0
800.0
V/s
T
MIN
, T
MAX
450.0
V/s
DISTORTION
HD2
2nd Harmonic Distortion
at 20MHz
2V
PP
25C -55.0
-50.0
dBc
T
MIN
-48.0
dBc
T
MAX
-55.0
dBc
HD2A
2nd Harmonic Distortion
at 50MHz
2V
PP
25C, T
MAX
-50.0
-45.0
dBc
T
MIN
-40.0
dBc
HD3
3rd Harmonic Distortion
at 20MHz
2V
PP
25C -65.0
-55.0
dBc
T
MIN
, T
MAX
-55.0
dBc
HD3A
3rd Harmonic Distortion
at 50MHz
2V
PP
25C, T
MIN
-60.0
-50.0
dBc
T
MAX
-45.0
dBc
EL2072
4
EQUIVALENT INPUT NOISE
NF
Noise Floor
> 100kHz
25C, T
MIN
-158.0
-155.0
dBm (1Hz)
T
MAX
-154.0
dBm (1Hz)
INV
Integrated Noise
100kHz to 200MHz
25C, T
MIN
40.0
57.0
V
T
MAX
63.0
V
AC Electrical Specifications
V
S
= 5V, R
L
= 100
, R
S
= 50
unless otherwise specified (Continued)
PARAMETER
DESCRIPTION
TEST CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
EL2072
5
Typical Performance Curves
Forward Gain and Phase
Gain Flatness & Deviation
from Linear Phase
Reverse Gain and phase
Recommended R
S
vs
Load Capacitance
Output Impedance
Input Impedance
Integral Linearity Error
Frequency Response vs
R
LOAD
|S
21
| vs C
LOAD
with Recommended R
s
Forward Gain and Phase
Small Signal
Pulse Response
Large Signal
Pulse Response
Long-Term
Settling Time
2nd Harmonic Distortion
3rd Harmonic Distortion
2-Tone, 3rd Order
Intermodulation Intercept
EL2072
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