1
FN7186.4
EL5120, EL5220, EL5420
12MHz Rail-to-Rail Input-Output Op Amps
The EL5120, EL5220, and EL5420 are low power, high
voltage, rail-to-rail input-output amplifiers. The EL5120
contains a single amplifier, the EL5220 contains two
amplifiers, and the EL5420 contains four amplifiers.
Operating on supplies ranging from 5V to 15V, while
consuming only 500A per amplifier, the EL5120, EL5220,
and EL5420 have a bandwidth of 12MHz (-3dB). They also
provide common mode input ability beyond the supply rails,
as well as rail-to-rail output capability. This enables these
amplifiers to offer maximum dynamic range at any supply
voltage.
The EL5120, EL5220, and EL5420 also feature fast slewing
and settling times, as well as a high output drive capability of
30mA (sink and source). These features make these
amplifiers ideal for use as voltage reference buffers in Thin
Film Transistor Liquid Crystal Displays (TFT-LCD). Other
applications include battery power, portable devices, and
anywhere low power consumption is important.
The EL5420 is available in the space-saving 14-pin TSSOP
package, the industry-standard 14-pin SO package, as well
as the 16-pin QFN package. The EL5220 is available in the
8-pin MSOP package and the EL5120 is available in the 5-
pin TSOT and 8-pin HMSOP packages. All feature a
standard operational amplifier pin out. These amplifiers are
specified for operation over the full -40C to +85C
temperature range.
Features
12MHz -3dB bandwidth
Supply voltage = 4.5V to 16.5V
Low supply current (per amplifier) = 500A
High slew rate = 10V/s
Unity-gain stable
Beyond the rails input capability
Rail-to-rail output swing
Ultra-small package
Pb-Free available (RoHS compliant)
Applications
TFT-LCD drive circuits
Electronics notebooks
Electronics games
Touch-screen displays
Personal communication devices
Personal digital assistants (PDA)
Portable instrumentation
Sampling ADC amplifiers
Wireless LANs
Office automation
Active filters
ADC/DAC buffer
Data Sheet
February 21, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2
FN7186.4
February 21, 2005
Pinouts
Ordering Information
PART NUMBER
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL5120IWT-T7
5-Pin TSOT
7" (3K pcs)
MDP0049
EL5120IWT-T7A
5-Pin TSOT
7" (250 pcs)
MDP0049
EL5120IWTZ-T7
(See Note)
5-Pin TSOT
(Pb-Free)
7" (3K pcs)
MDP0049
EL5120IWTZ-T7A
(See Note)
5-Pin TSOT
(Pb-Free)
7" (250 pcs)
MDP0049
EL5120IYE
8-Pin HMSOP
-
MDP0050
EL5120IYE-T7
8-Pin HMSOP
7"
MDP0050
EL5120IYE-T13
8-Pin HMSOP
13"
MDP0050
EL5120IYEZ
(See Note)
8-Pin HMSOP
(Pb-Free)
-
MDP0050
EL5120IYEZ-T7
(See Note)
8-Pin HMSOP
(Pb-Free)
7"
MDP0050
EL5120IYEZ-T13
(See Note)
8-Pin HMSOP
(Pb-Free)
13"
MDP0050
EL5220CY
8-Pin MSOP
-
MDP0043
EL5220CY-T7
8-Pin MSOP
7"
MDP0043
EL5220CY-13
8-Pin MSOP
13"
MDP0043
EL5220CYZ
(See Note)
8-Pin MSOP
(Pb-Free)
-
MDP0043
EL5220CYZ-T7
(See Note)
8-Pin MSOP
(Pb-Free)
7"
MDP0043
EL5220CYZ-T13
(See Note)
8-Pin MSOP
(Pb-Free)
13"
MDP0043
EL5420CL
16-Pin QFN
-
MDP0046
EL5420CL-T7
16-Pin QFN
7"
MDP0046
EL5420CL-T13
16-Pin QFN
13"
MDP0046
EL5420CLZ
(See Note)
16-Pin QFN
(Pb-free)
-
MDP0046
EL5420CLZ-T7
(See Note)
16-Pin QFN
(Pb-free)
7"
MDP0046
EL5420CLZ-T13
(See Note)
16-Pin QFN
(Pb-free)
13"
MDP0046
EL5420CS
14-Pin SO
-
MDP0027
EL5420CS-T7
14-Pin SO
7"
MDP0027
EL5420CS-T13
14-Pin SO
13"
MDP0027
EL5420CSZ
(See Note)
14-Pin SO
(Pb-free)
-
MDP0027
EL5420CSZ-T7
(See Note)
14-Pin SO
(Pb-free)
7"
MDP0027
EL5420CSZ-T13
(See Note)
14-Pin SO
(Pb-free)
13"
MDP0027
EL5420CR
14-Pin TSSOP
-
MDP0044
EL5420CR-T7
14-Pin TSSOP
7"
MDP0044
EL5420CR-T13
14-Pin TSSOP
13"
MDP0044
EL5420CRZ
(Note)
14-Pin TSSOP
(Pb-Free)
-
MDP0044
EL5420CRZ-T7
(Note)
14-Pin TSSOP
(Pb-Free)
7"
MDP0044
EL5420CRZ-T13
(Note)
14-Pin TSSOP
(Pb-Free)
13"
MDP0044
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Ordering Information
(Continued)
PART NUMBER
PACKAGE
TAPE &
REEL
PKG. DWG. #
EL5420
(16-PIN QFN)
TOP VIEW
1
2
3
5
4
1
2
3
4
8
7
6
5
1
2
3
4
12
11
10
9
5
6
7
8
16
15
14
13
VINA-
VINA+
VS+
VINB+
VI
N
B
-
VO
U
T
B
VO
U
T
C
VI
N
C
-
NC
VO
U
T
A
VO
U
T
D
NC
VIND-
VIND+
VS-
VINC+
VS+
VIN-
VIN+
VS-
VOUT
VS+
VOUTB
VINB-
VINB+
VS-
VINA+
VINA-
VOUTA
-
+
-
+
-
+
THERMAL
PAD
EL5220
(8-PIN MSOP)
TOP VIEW
EL5120
(5-PIN TSOT)
TOP VIEW
1
2
3
4
8
7
6
5
NC
VS+
OUT
NC
VS-
IN+
IN-
NC
-
+
EL5120
(8-PIN HMSOP)
TOP VIEW
1
2
3
4
14
13
12
11
5
6
7
10
9
8
- +
-
+
VOUTD
VIND-
VIND+
VS-
VINC+
VINC-
VOUTC
VOUTB
VINB-
VINB+
VS+
VINA+
VINA-
VOUTA
- +
-
+
EL5420
(14-PIN TSSOP, SO)
TOP VIEW
EL5120, EL5220, EL5420
3
FN7186.4
February 21, 2005
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Absolute Maximum Ratings
(T
A
= 25C)
Supply Voltage between V
S
+ and V
S
- . . . . . . . . . . . . . . . . . . . .+18V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V
S
- - 0.5V, V
S
+0.5V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
V
S
+
= +5V, V
S
-
= -5V, R
L
= 10k
and C
L
= 10pF to 0V, T
A
= 25C, unless otherwise specified.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CHARACTERISTICS
V
OS
Input Offset Voltage
V
CM
= 0V
2
12
mV
TCV
OS
Average Offset Voltage Drift
(Note 1)
5
V/C
I
B
Input Bias Current
V
CM
= 0V
2
50
nA
R
IN
Input Impedance
1
G
C
IN
Input Capacitance
1.35
pF
CMIR
Common-Mode Input Range
-5.5
+5.5
V
CMRR
Common-Mode Rejection Ratio
for V
IN
from -5.5V to +5.5V
50
70
dB
A
VOL
Open Loop Gain
-4.5V
V
OUT
+4.5V
75
95
dB
OUTPUT CHARACTERISTICS
V
OL
Output Swing Low
I
L
= -5mA
-4.92
-4.85
V
V
OH
Output Swing High
I
L
= 5mA
4.85
4.92
V
I
SC
Short Circuit Current
120
mA
I
OUT
Output Current
30
mA
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
V
S
is moved from 2.25V to 7.75V
60
80
dB
I
S
Supply Current (Per Amplifier)
No load
500
750
A
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 2)
-4.0V
V
OUT
+4.0V, 20% to 80%
10
V/s
t
S
Settling to +0.1% (A
V
= +1)
(A
V
= +1), V
O
= 2V step
500
ns
BW
-3dB Bandwidth
R
L
= 10k
, C
L
= 10pF
12
MHz
GBWP
Gain-Bandwidth Product
R
L
= 10k
, C
L
= 10pF
8
MHz
PM
Phase Margin
R
L
= 10k
, C
L
= 10 pF
50
CS
Channel Separation
f = 5MHz (EL5220 & EL5420 only)
75
dB
NOTES:
1. Measured over operating temperature range
2. Slew rate is measured on rising and falling edges
EL5120, EL5220, EL5420
4
FN7186.4
February 21, 2005
Electrical Specifications
V
S
+
= +5V, V
S
-
= 0V, R
L
= 10k
and C
L
= 10pF to 2.5V, T
A
= 25C, unless otherwise specified.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CHARACTERISTICS
V
OS
Input Offset Voltage
V
CM
= 2.5V
2
10
mV
TCV
OS
Average Offset Voltage Drift
(Note 1)
5
V/C
I
B
Input Bias Current
V
CM
= 2.5V
2
50
nA
R
IN
Input Impedance
1
G
C
IN
Input Capacitance
1.35
pF
CMIR
Common-Mode Input Range
-0.5
+5.5
V
CMRR
Common-Mode Rejection Ratio
for V
IN
from -0.5V to +5.5V
45
66
dB
A
VOL
Open Loop Gain
0.5V
V
OUT
+ 4.5V
75
95
dB
OUTPUT CHARACTERISTICS
V
OL
Output Swing Low
I
L
= -5mA
80
150
mV
V
OH
Output Swing High
I
L
= +5mA
4.85
4.92
V
I
SC
Short Circuit Current
120
mA
I
OUT
Output Current
30
mA
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
V
S
is moved from 4.5V to 15.5V
60
80
dB
I
S
Supply Current (Per Amplifier)
No load
500
750
A
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 2)
1V
V
OUT
4V, 20% to 80%
10
V/s
t
S
Settling to +0.1% (A
V
= +1)
(A
V
= +1), V
O
= 2V step
500
ns
BW
-3dB Bandwidth
R
L
= 10k
, C
L
= 10pF
12
MHz
GBWP
Gain-Bandwidth Product
R
L
= 10 k
, C
L
= 10pF
8
MHz
PM
Phase Margin
R
L
= 10 k
, C
L
= 10 pF
50
CS
Channel Separation
f = 5MHz (EL5220 & EL5420 only)
75
dB
NOTES:
1. Measured over operating temperature range
2. Slew rate is measured on rising and falling edges
EL5120, EL5220, EL5420
5
FN7186.4
February 21, 2005
Electrical Specifications
V
S
+
= +15V, V
S
-
= 0V, R
L
= 10k
and C
L
= 10pF to 7.5V, T
A
= 25C, unless otherwise specified.
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CHARACTERISTICS
V
OS
Input Offset Voltage
V
CM
= 7.5V
2
14
mV
TCV
OS
Average Offset Voltage Drift
(Note 1)
5
V/C
I
B
Input Bias Current
V
CM
= 7.5V
2
50
nA
R
IN
Input Impedance
1
G
C
IN
Input Capacitance
1.35
pF
CMIR
Common-Mode Input Range
-0.5
+15.5
V
CMRR
Common-Mode Rejection Ratio
for V
IN
from -0.5V to +15.5V
53
72
dB
A
VOL
Open Loop Gain
0.5V
V
OUT
14.5V
75
95
dB
OUTPUT CHARACTERISTICS
V
OL
Output Swing Low
I
L
= -5mA
80
150
mV
V
OH
Output Swing High
I
L
= +5mA
14.85
14.92
V
I
SC
Short Circuit Current
120
mA
I
OUT
Output Current
30
mA
POWER SUPPLY PERFORMANCE
PSRR
Power Supply Rejection Ratio
V
S
is moved from 4.5V to 15.5V
60
80
dB
I
S
Supply Current (Per Amplifier)
No load
500
750
A
DYNAMIC PERFORMANCE
SR
Slew Rate (Note 2)
1V
V
OUT
14V, 20% to 80%
10
V/s
t
S
Settling to +0.1% (A
V
= +1)
(A
V
= +1), V
O
= 2V step
500
ns
BW
-3dB Bandwidth
R
L
= 10k
, C
L
= 10pF
12
MHz
GBWP
Gain-Bandwidth Product
R
L
= 10k
, C
L
= 10pF
8
MHz
PM
Phase Margin
R
L
= 10k
, C
L
= 10 pF
50
CS
Channel Separation
f = 5MHz (EL5220 & EL5420 only)
75
dB
NOTES:
1. Measured over operating temperature range
2. Slew rate is measured on rising and falling edges
EL5120, EL5220, EL5420
6
FN7186.4
February 21, 2005
Typical Performance Curves
FIGURE 1. EL5420 INPUT OFFSET VOLTAGE DISTRIBUTION
FIGURE 2. EL5420 INPUT OFFSET VOLTAGE DRIFT
FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE
FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE
FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE
FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE
400
1200
QUANTIT
Y
(
A
MP
LIFIERS)
INPUT OFFSET VOLTAGE (mV)
0
-1
2
1800
1600
800
200
1400
1000
600
-1
0
-8
-6
-4
-2
-0
2
4
6
8
10
12
V
S
=5V
T
A
=25C
TYPICAL
PRODUCTION
DISTRIBUTION
INPUT OFFSET VOLTAGE DRIFT, TCV
OS
(V/C)
1
3
5
7
9
11
13
15
17
19
21
10
50
QUANTITY
(AMP
L
I
FIE
R
S)
0
70
30
60
40
20
V
S
=5V
TYPICAL
PRODUCTION
DISTRIBUTION
0
150
0
5
I
N
PUT O
F
FS
ET V
O
L
T
AGE
(m
V)
TEMPERATURE (C)
-5
50
-50
100
10
V
S
=5V
0.0
INP
U
T BIAS
CURRENT
(
n
A
)
TEMPERATURE (C)
-2.0
2.0
0
150
50
-50
100
V
S
=5V
4.94
4.95
OUTPUT HIGH
VOL
T
AGE (V)
4.93
4.97
0
150
TEMPERATURE (C)
50
-50
100
4.96
V
S
=5V
I
OUT
=5mA
-4.95
-4.93
OUTPUT
LO
W VOL
T
AG
E (V)
-4.97
-4.91
0
150
TEMPERATURE (C)
50
-50
100
-4.92
-4.94
-4.96
V
S
=5V
I
OUT
=-5mA
EL5120, EL5220, EL5420
7
FN7186.4
February 21, 2005
FIGURE 7. OPEN LOOP GAIN vs TEMPERATURE
FIGURE 8. SLEW RATE vs TEMPERATURE
FIGURE 9. EL5420 SUPPLY CURRENT PER AMPLIFIER vs
TEMPERATURE
FIGURE 10. EL5420 SUPPLY CURRENT PER AMPLIFIER vs
SUPPLY VOLTAGE
FIGURE 11. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS R
L
Typical Performance Curves
(Continued)
80
90
OPE
N
L
O
OP
GAI
N
(d
B)
100
0
150
TEMPERATURE (C)
50
-50
100
V
S
=5V
R
L
=10k
0
150
10.30
10.35
SLEW RA
TE (V/
s)
TEMPERATURE (C)
10.25
50
-50
100
10.40
V
S
=5V
0.5
0.55
SUPP
L
Y
CURRENT
(mA)
0.45
0
150
TEMPERATURE (C)
50
-50
100
V
S
=5V
5
20
400
600
S
U
PPL
Y CUR
RE
NT
(A)
SUPPLY VOLTAGE (V)
300
10
0
700
500
15
T
A
=25C
10
10K
100M
50
200
FREQUENCY (Hz)
-50
GAI
N
(
d
B)
PHASE (
)
20
-130
-230
100
1K
100K
1M
10M
150
0
100
-30
-80
-180
V
S
=5V, T
A
=25C
R
L
=10K
to GND
C
L
=12pF to GND
PHASE
GAIN
1M
100M
-5
0
MAGNITUDE (
N
ORMALIZED)
(dB)
FREQUENCY (Hz)
-15
10M
100K
5
-10
C
L
=10pF
A
V
=1
V
S
=5V
10k
1k
560
150
EL5120, EL5220, EL5420
8
FN7186.4
February 21, 2005
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS C
L
FIGURE 14. CLOSED LOOP OUTPUT IMPEDANCE vs
FREQUENCY
FIGURE 15. MAXIMUM OUTPUT SWING vs FREQUENCY
FIGURE 16. CMRR vs FREQUENCY
FIGURE 17. PSRR vs FREQUENCY
FIGURE 18. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs
FREQUENCY
Typical Performance Curves
(Continued)
1M
100M
FREQUENCY (Hz)
10M
100K
0
10
MAG
N
ITUDE (NORMALIZE
D
)
(dB)
-30
20
-20
-10
R
L
=10k
A
V
=1
V
S
=5V
12pF
50pF
100pF
1000pF
OUTPUT IMPE
DAN
CE
(
)
FREQUENCY (Hz)
10K
100K
0
40
80
120
200
1M
160
10M
A
V
=1
V
S
=5V
T
A
=25C
MAXI
MUM
O
U
TP
U
T
SWI
N
G (V
P-
P
)
FREQUENCY (Hz)
10K
100K
0
2
4
12
1M
6
10M
8
10
V
S
=5V
T
A
=25C
A
V
=1
R
L
=10k
C
L
=12pF
Distortion <1%
100
0
CMRR
(dB)
FREQUENCY (Hz)
80
60
40
20
1M
10M
10K
100K
1K
V
S
=5V
T
A
=25C
100
0
P
S
RR (
d
B)
FREQUENCY (Hz)
80
60
40
20
1M
10M
10K
100K
V
S
=5V
T
A
=25C
1K
PSRR+
PSRR-
100
100K
100M
10
100
VOL
T
AGE
NO
IS
E
(nV/
Hz
)
FREQUENCY (Hz)
1
10M
1K
10K
1M
600
EL5120, EL5220, EL5420
9
FN7186.4
February 21, 2005
FIGURE 19. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
FIGURE 20. CHANNEL SEPARATION vs FREQUENCY
RESPONSE
FIGURE 21. SMALL SIGNAL OVERSHOOT vs LOAD
CAPACITANCE
FIGURE 22. SETTLING TIME vs STEP SIZE
FIGURE 23. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 24. SMALL SIGNAL TRANSIENT RESPONSE
Typical Performance Curves
(Continued)
1K
10K
100K
0.005
0.008
FREQUENCY (Hz)
THD
+
N (%
)
0.010
0.001
0.003
V
S
=5V
R
L
=10k
A
V
=1
V
IN
=1V
RMS
0.006
0.009
0.007
0.004
0.002
1K
-60
X-
T
A
LK
(
d
B
)
FREQUENCY (Hz)
-140
-120
-100
-80
1M
6M
10K
100K
V
S
=5V
R
L
=10k
A
V
=1
V
IN
=220mV
RMS
DUAL MEASURED CHANNEL A TO B
QUAD MEASURED CHANNEL A TO D
OR B TO C
OTHER COMBINATIONS YIELD
IMPROVED REJECTION
10
100
1K
LOAD CAPACITANCE (pF)
OVE
R
SHOO
T (%
)
V
S
=5V
A
V
=1
R
L
=10k
V
IN
=50mV
T
A
=25C
50
90
70
30
10
800
-2
2
S
T
EP
SI
ZE (
V
)
SETTLING TIME (ns)
600
0
4
200
400
3
1
-3
0
-1
-4
V
S
=5V
A
V
=1
R
L
=10k
C
L
=12pF
T
A
=25C
0.1%
0.1%
V
S
=5V
T
A
=25C
A
V
=1
R
L
=10k
C
L
=12pF
1V
1s
V
S
=5V
T
A
=25C
A
V
=1
R
L
=10k
C
L
=12pF
50mV
200ns
EL5120, EL5220, EL5420
10
FN7186.4
February 21, 2005
Applications Information
Product Description
The EL5120, EL5220, and EL5420 voltage feedback
amplifiers are fabricated using a high voltage CMOS
process. They exhibit rail-to-rail input and output capability,
they are unity gain stable, and have low power consumption
(500A per amplifier). These features make the EL5120,
EL5220, and EL5420 ideal for a wide range of general-
purpose applications. Connected in voltage follower mode
and driving a load of 10k
and 12pF, the EL5120, EL5220,
and EL5420 have a -3dB bandwidth of 12MHz while
maintaining a 10V/s slew rate. The EL5120 is a single
amplifier, the EL5220 is a dual amplifier, and the EL5420 is a
quad amplifier.
Operating Voltage, Input, and Output
The EL5120, EL5220, and EL5420 are specified with a
single nominal supply voltage from 5V to 15V or a split
supply with its total range from 5V to 15V. Correct operation
is guaranteed for a supply range of 4.5V to 16.5V. Most
EL5120, EL5220, and EL5420 specifications are stable over
both the full supply range and operating temperatures of
-40C to +85C. Parameter variations with operating voltage
and/or temperature are shown in the typical performance
curves.
The input common-mode voltage range of the EL5120,
EL5220, and EL5420 extends 500mV beyond the supply
rails. The output swings of the EL5120, EL5220, and
EL5420 typically extend to within 80mV of positive and
negative supply rails with load currents of 5mA. Decreasing
load currents will extend the output voltage range even
closer to the supply rails. Figure 25 shows the input and
Pin Descriptions
EL5120
EL5220
EL5420
PIN NAME
PIN FUNCTION
EQUIVALENT CIRCUIT
1
1
1
VOUTA
Amplifier A Output
CIRCUIT 1
4
2
2
VINA-
Amplifier A Inverting Input
CIRCUIT 2
3
3
3
VINA+
Amplifier A Non-Inverting Input
(Reference Circuit 2)
5
8
4
VS+
Positive Power Supply
5
5
VINB+
Amplifier B Non-Inverting Input
(Reference Circuit 2)
6
6
VINB-
Amplifier B Inverting Input
(Reference Circuit 2)
7
7
VOUTB
Amplifier B Output
(Reference Circuit 1)
8
VOUTC
Amplifier C Output
(Reference Circuit 1)
9
VINC-
Amplifier C Inverting Input
(Reference Circuit 2)
10
VINC+
Amplifier C Non-Inverting Input
(Reference Circuit 2)
2
4
11
VS-
Negative Power Supply
12
VIND+
Amplifier D Non-Inverting Input
(Reference Circuit 2)
13
VIND-
Amplifier D Inverting Input
(Reference Circuit 2)
14
VOUTD
Amplifier D Output
(Reference Circuit 1)
V
S+
GND
V
S-
V
S+
V
S-
EL5120, EL5220, EL5420
11
FN7186.4
February 21, 2005
output waveforms for the device in the unity-gain
configuration. Operation is from 5V supply with a 10k
load
connected to GND. The input is a 10V
P-P
sinusoid. The
output voltage is approximately 9.985V
P-P
.
FIGURE 25. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
Short Circuit Current Limit
The EL5120, EL5220, and EL5420 will limit the short circuit
current to 120mA if the output is directly shorted to the
positive or the negative supply. If an output is shorted
indefinitely, the power dissipation could easily increase such
that the device may be damaged. Maximum reliability is
maintained if the output continuous current never exceeds
30mA. This limit is set by the design of the internal metal
interconnects.
Output Phase Reversal
The EL5120, EL5220, and EL5420 are immune to phase
reversal as long as the input voltage is limited from (V
S
-)
-0.5V to (V
S
+) +0.5V. Figure 26 shows a photo of the output
of the device with the input voltage driven beyond the supply
rails. Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input voltage
exceeds supply voltage by more than 0.6V, electrostatic
protection diodes placed in the input stage of the device
begin to conduct and overvoltage damage could occur.
FIGURE 26. OPERATION WITH BEYOND-THE-RAILS INPUT
Power Dissipation
With the high-output drive capability of the EL5120, EL5220,
and EL5420 amplifiers, it is possible to exceed the 125C
"absolute-maximum junction temperature" under certain load
current conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if load conditions need to be modified for the
amplifier to remain in the safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
where:
T
JMAX
= Maximum junction temperature
T
AMAX
= Maximum ambient temperature
JA
= Thermal resistance of the package
P
DMAX
= Maximum power dissipation in the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
when sourcing, and:
when sinking.
where:
i = 1 to 2 for dual and 1 to 4 for quad
V
S
= Total supply voltage
I
SMAX
= Maximum supply current per amplifier
V
OUT
i = Maximum output voltage of the application
I
LOAD
i = Load current
If we set the two P
DMAX
equations equal to each other, we
can solve for R
LOAD
i to avoid device overheat. Figures 27
and 28 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the previous equation, it is a
simple matter to see if P
DMAX
exceeds the device's power
derating curves. To ensure proper operation, it is important
to observe the recommended derating curves in Figures 27
and 28.
V
S
=5V
T
A
=25C
A
V
=1
V
IN
=10V
P-P
OUT
P
UT
INP
U
T
V
S
=2.5V
T
A
=25C
A
V
=1
V
IN
=6V
P-P
1V
100s
1V
P
DMAX
T
JMAX
T
AMAX
JA
---------------------------------------------
=
P
DMAX
i
V
S
I
SMAX
V
S
+
(
V
OUT
i
)
I
LOAD
i
+
[
]
=
P
DMAX
i
V
S
I
SMAX
V
OUT
i
(
V
S
-
)
I
LOAD
i
+
[
]
=
EL5120, EL5220, EL5420
12
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7186.4
February 21, 2005
FIGURE 27. PACKAGE POWER DISSIPATION VS AMBIENT
TEMPERATURE
FIGURE 28. PACKAGE POWER DISSIPATION VS AMBIENT
TEMPERATURE
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
Driving Capacitive Loads
The EL5120, EL5220, and EL5420 can drive a wide range of
capacitive loads. As load capacitance increases, however,
the -3dB bandwidth of the device will decrease and the
peaking increase. The amplifiers drive 10pF loads in parallel
with 10k
with just 1.5dB of peaking, and 100pF with 6.4dB
of peaking. If less peaking is desired in these applications, a
small series resistor (usually between 5
and 50) can be
placed in series with the output. However, this will obviously
reduce the gain slightly. Another method of reducing peaking
is to add a "snubber" circuit at the output. A snubber is a
shunt load consisting of a resistor in series with a capacitor.
Values of 150
and 10nF are typical. The advantage of a
snubber is that it does not draw any DC load current or
reduce the gain
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5120, EL5220, and EL5420 can provide gain at high
frequency. As with any high-frequency device, good printed
circuit board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power supply
pins must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the V
S
- pin is
connected to ground, a 0.1F ceramic capacitor should be
placed from V
S
+ to pin to V
S
- pin. A 4.7F tantalum
capacitor should then be connected in parallel, placed in the
region of the amplifier. One 4.7F capacitor may be used for
multiple devices. This same capacitor combination should be
placed at each supply pin to ground if split supplies are to be
used.
3
2.5
2
1.5
1
0.5
0
0
25
50
75
100
150
AMBIENT TEMPERATURE (C)
P
O
WER DIS
S
IP
A
T
ION
(
W
)
2.500W
JA
=40C/W
QFN16
125
85
1.136W
870mW
JA
=115C/W
MSOP8
1.0W
JA
=100C/W
TSSOP14
JA
=88C/W
SO14
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
486mW
JA
=206C/W
MSOP8
833mW
JA
=120C/W
SO14
1
0.9
0.8
0.6
0.4
0.1
0
0
25
50
75
100
150
AMBIENT TEMPERATURE (C)
POWER DISS
IP
AT
ION (W)
125
85
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.2
606mW
0.7
0.3
0.5
667mW
JA
=165C/W
TSSOP14
JA
=150C/W
QFN16
EL5120, EL5220, EL5420
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