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Электронный компонент: HA1-2539-2

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1
HA-2539
600MHz, Very High Slew Rate
Operational Amplifier
The Intersil HA-2539 represents the ultimate in high slew
rate, wideband, monolithic operational amplifiers. It has been
designed and constructed with the Intersil High Frequency
Bipolar Dielectric Isolation process and features dynamic
parameters never before available from a truly differential
device.
With a 600V/
s slew rate and a 600MHz gain bandwidth
product, the HA-2539 is ideally suited for use in video and
RF amplifier designs, in closed loop gains of 10 or greater.
Full
10V swing coupled with outstanding AC parameters
and complemented by high open loop gain makes the
devices useful in high speed data acquisition systems.
For further design assistance please refer to Application Note
AN541 (Using the HA-2539 Very High Slew Rate Wideband
Operational Amplifiers) and Application Note AN556 (Thermal
Safe-Operating-Areas For High Current Operational Amplifiers.
For military grade product information, the HA-2539/883 data
sheet is available upon request.
Features
Very High Slew Rate . . . . . . . . . . . . . . . . . . . . . . 600V/
s
Open Loop Gain . . . . . . . . . . . . . . . . . . . . . . . . . . 15kV/V
Wide Gain-Bandwidth (A
V
10) . . . . . . . . . . . . . . 600MHz
Power Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . 9.5MHz
Low Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mV
Input Voltage Noise . . . . . . . . . . . . . . . . . . . . . . 6nV/
Hz
Output Voltage Swing . . . . . . . . . . . . . . . . . . . . . . . .
10V
Monolithic Bipolar Dielectric Construction
Applications
Pulse and Video Amplifiers
Wideband Amplifiers
High Speed Sample-Hold Circuits
RF Oscillators
Pinout
HA-2539
(PDIP, CERDIP)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
HA1-2539-2
-55 to 125
14 Ld CERDIP
F14.3
HA1-2539-5
0 to 75
14 Ld CERDIP
F14.3
HA3-2539-5
0 to 75
14 Ld PDIP
E14.3
+IN
NC
V-
NC
NC
NC
NC
-IN
NC
NC
NC
+V
NC
OUTPUT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
+
-
NOTE: No-Connection (NC) leads may be tied to a ground plane
for better isolation and heat dissipation.
Data Sheet
September 1998
File Number
2896.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Copyright
Intersil Corporation 1999
2
Absolute Maximum Ratings
Thermal Information
Supply Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . 35V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . 33mA
RMS
Operating Conditions
Temperature Range
HA-2539-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
HA-2539-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 75
o
C
Thermal Resistance (Typical, Note 2)
JA
(
o
C/W)
JC
(
o
C/W)
CERDIP Package . . . . . . . . . . . . . . . . .
75
20
PDIP Package . . . . . . . . . . . . . . . . . . .
107
N/A
Maximum Internal Quiescent Power Dissipation (Note 1)
Maximum Junction Temperature (Ceramic Package) . . . . . . .175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . . .150
o
C
Maximum Storage Temperature Range . . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation with load conditions must be designed to maintain the maximum junction temperature below 175
o
C for the ceramic
package and below 150
o
C for the plastic package. By using Application Note AN556 on Safe Operating Area equations, along with the thermal
resistances, proper load conditions can be determined. Heat sinking is recommended above 75
o
C.
2.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
SUPPLY
=
15V, R
L
= 1k
, C
L
< 10pF, Unless Otherwise Specified
PARAMETER
TEMP.
(
o
C)
HA-2539-2
HA-2539-5
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
INPUT CHARACTERISTICS
Offset Voltage
25
-
8
10
-
8
15
mV
Full
-
13
15
-
13
20
mV
Average Offset Voltage Drift
Full
-
20
-
-
20
-
V/
o
C
Bias Current
25
-
5
20
-
5
20
A
Full
-
-
25
-
-
25
A
Offset Current
25
-
1
6
-
1
6
A
Full
-
-
8
-
-
8
A
Input Resistance
25
-
10
-
-
10
-
k
Input Capacitance
25
-
1
-
-
1
-
pF
Common Mode Range
Full
10.0
-
-
10.0
-
-
V
Input Current Noise
(f = 1kHz, R
SOURCE
= 0
)
25
-
6
-
-
6
-
pA/
Hz
Input Voltage Noise
(f = 1kHz, R
SOURCE
= 0
)
25
-
6
-
-
6
-
nV/
Hz
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
(Note 3)
25
10
15
-
10
15
-
kV/V
Full
5
-
-
5
-
--
kV/V
Common Mode Rejection Ratio
(Note 4)
Full
60
72
-
60
72
-
dB
Minimum Stable Gain
25
10
-
-
10
-
-
V/V
Gain Bandwidth (Notes 5, 6)
25
-
600
-
-
600
-
MHz
OUTPUT CHARACTERISTICS
Output Voltage Swing
(Notes 3, 10)
Full
10.0
-
-
10.0
-
-
V
Output Current (Note 3)
25
10
20
-
10
20
-
mA
Output Resistance
25
-
30
-
-
30
-
Full Power Bandwidth
(Notes 3, 7)
25
8.7
9.5
-
8.7
9.5
-
MHz
HA-2539
3
TRANSIENT RESPONSE (Note 8)
Rise Time
25
-
7
-
-
7
-
ns
Overshoot
25
-
15
-
-
15
-
%
Slew Rate
25
550
600
-
550
600
-
V/
s
Settling Time: 10V Step to 0.1%
25
-
180
-
-
180
-
ns
POWER REQUIREMENTS
Supply Current
Full
-
20
25
-
20
25
mA
Power Supply Rejection Ratio (Note 9)
Full
60
70
-
60
70
-
dB
NOTES:
3. R
L
= 1k
, V
O
=
10V.
4. V
CM
=
10.0V.
5. V
O
= 90mV.
6. A
V
= 10.
7. Full Power Bandwidth guaranteed based on slew rate measurement using:
.
8. Refer to Test Circuits section of data sheet.
9. V
SUPPLY
=
+
5V, -15V and +15V, -5V.
10. Guaranteed range for output voltage is
10V. Functional operation outside of this range is not guaranteed.
Test Circuits and Waveforms
FIGURE 1. TEST CIRCUIT
FIGURE 2. LARGE SIGNAL RESPONSE
FIGURE 3. SMALL SIGNAL RESPONSE
Electrical Specifications
V
SUPPLY
=
15V, R
L
= 1k
, C
L
< 10pF, Unless Otherwise Specified (Continued)
PARAMETER
TEMP.
(
o
C)
HA-2539-2
HA-2539-5
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
FPBW
Slew Rate
2
V
PEAK
-----------------------------
=
OUT
IN
+
900
-
100
NOTES:
11. V
S
=
15V.
12. A
V
= +10.
13. C
L
10pF.
A
B
Vertical Scale: A = 0.5V/Div., B = 5.0V/Div.
Horizontal Scale: 50ns/Div.
Vertical Scale: Input = 10mV/Div., Output = 50mV/Div.
Horizontal Scale: 20ns/Div.
HA-2539
4
Schematic Diagram
NOTES:
14. A
V
= -10.
15. Load Capacitance should be less than 10pF.
16. It is recommended that resistors be carbon composition and that
feedback and summing network ratios be matched to 0.1%.
17. SETTLE POINT (Summing Node) capacitance should be less
than 10pF. For optimum settling time results, it is recommended
that the test circuit be constructed directly onto the device pins.
A Tektronix 568 Sampling Oscilloscope with S-3A sampling
heads is recommended as a settle point monitor.
FIGURE 4. SETTLING TIME CIRCUIT
Test Circuits and Waveforms
(Continued)
OUTPUT
INPUT
+
200
500
<10pF
V+
V-
SETTLE
POINT
0.001
F
1
F
0.001
F
1
F
2k
5k
PROBE
MONITOR
-
R
22
R
23
Q
P22
R
1
R
2
R
3
Q
P28
Q
P19
Q
P18
Q
P17
R
13
Q
P25
R
24
Q
P23
Q
N21
R
21
R
25
R
6
R
8
R
9
Z
1
D
Z1
D
Z2
R
11
Q
N14
Q
N20
Q
N25
Q
N29
R
10
Q
P3
R
7
Q
N1
Q
P4
R
14
Q
N15
R
4
R
5
Q
P6
Q
P5
Q
N7
Q
P8
Q
N10
Q
P11
Q
N9
R
18
R
19
OUTPUT
V+
V-
+INPUT
-INPUT
V+
V-
V-
V+
C
1
R
Q
N2
Q
N12
Q
N13
Q
N16
R
16
R
15
R
17
R
12
HA-2539
5
Typical Applications
FIGURE 5. FREQUENCY COMPENSATION BY OVERDAMPING
FIGURE 6. STABILIZATION USING Z
IN
FIGURE 7. REDUCING DC ERRORS; COMPOSITE AMPLIFIER
FIGURE 8. DIFFERENTIAL GAIN ERROR (3%) HA-2539 20dB
VIDEO GAIN BLOCK
+
-
HA-2539
R
1
R
2
20
20 - 100pF
SET A
V
= 1+
R
1
R
2
= 5
R
1
R
2
SET A
V
=
R
1
= -3
-R
2
Z
IN
+
-
+
-
+
-
R
5
1k
R
4
10k
INPUT
R
1
10k
3900pF
C
1
0.039
F
1k
HA-2539
OUTPUT
HA-5170
1k
C
2
R
2
R
3
Typical Performance Curves
FIGURE 9. INPUT OFFSET VOLTAGE AND BIAS CURRENT vs
TEMPERATURE
FIGURE 10. INPUT NOISE VOLTAGE AND NOISE CURRENT vs
FREQUENCY
BIAS CURRENT
OFFSET VOLTAGE
INPUT BIAS CURRENT (
A)
|V
IO
| OFFSET V
O
L
T
A
GE (mV)
14
12
10
8
6
4
2
0
7
6
5
4
3
2
1
0
-80
-40
0
40
80
120
160
TEMPERATURE (
o
C)
VOLTAGE NOISE
R
SOURCE
= 0
V
S
=
15V
NOISE V
O
L
T
A
GE (nV/
Hz)
NOISE CURRENT (pA/
Hz)
CURRENT NOISE
25
20
15
10
5
0
10
100
1K
10K
100K
50
40
30
20
10
0
FREQUENCY (Hz)
HA-2539
6
FIGURE 11. BROADBAND NOISE (0.1Hz TO 1MHz)
FIGURE 12. COMMON MODE REJECTION RATIO vs
FREQUENCY
FIGURE 13. POWER SUPPLY REJECTION RATIO vs
FREQUENCY
FIGURE 14. OPEN LOOP GAIN/PHASE vs FREQUENCY
FIGURE 15. CLOSED LOOP FREQUENCY RESPONSE
FIGURE 16. OUTPUT VOLTAGE SWING vs FREQUENCY
Typical Performance Curves
(Continued)
+40
V
+30
V
+20
V
+10
V
0
V
-10
V
-20
V
-30
V
-40
V
Vertical Scale: 10mV/Div.
Horizontal Scale: 50ms/Div.
CMRR (dB)
FREQUENCY (Hz)
100
80
60
40
20
0
1K
10K
100K
1M
10M
PSRR (dB)
100
80
60
40
20
0
FREQUENCY (Hz)
1K
10K
100K
1M
10M
GAIN
PHASE
GAIN (dB)
PHASE (DEGREES)
FREQUENCY (Hz)
1K
10K
100K
1M
10M
100
100M
100
80
60
40
20
0
-20
225
180
135
90
45
0
V
S
=
15V
FREQUENCY (Hz)
1K
10K
100K
1M
10M
100
100M
CLOSED LOOP GAIN (dB)
100
90
80
70
60
50
40
30
20
10
0
-10
V
S
=
15V
V
S
=
10V
V
S
=
5V
OUTPUT V
O
L
T
A
GE (V
P-P
)
28
24
20
16
12
8
4
0
FREQUENCY (Hz)
1K
10K
100K
1M
10M
100M
HA-2539
7
FIGURE 17. OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
FIGURE 18. NORMALIZED AC PARAMETERS vs TEMPERATURE
FIGURE 19. SETTLING TIME FOR VARIOUS OUTPUT STEP
VOLTAGES
FIGURE 20. POWER SUPPLY CURRENT vs TEMPERATURE
Typical Performance Curves
(Continued)
OUTPUT V
O
L
T
A
GE SWING (V
P-P
)
RESISTANCE (
)
28
24
20
16
12
8
4
0
0
200
400
600
800
1K
1.2K
SLEW RATE
BANDWIDTH
NORMALIZED P
ARAMETERS
REFERRED T
O
V
ALUES A
T
25
o
C
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
-80
-40
0
40
80
120
160
TEMPERATURE (
o
C)
OUTPUT V
O
L
T
A
GE STEP (V)
SETTLING TIME (ns)
10
8
6
4
2
0
-2
-4
-6
-8
-10
0
40
80
120
160
200
240
10mV
1mV
1mV
10mV
V
S
=
15V
V
S
=
5V
-80
-40
0
40
80
120
160
TEMPERATURE (
o
C)
28
24
20
16
12
8
4
0
SUPPL
Y CURRENT (mA)
HA-2539
8
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Die Characteristics
DIE DIMENSIONS:
62 mils x 76 mils x 19 mils
1575
m x 1930
m x 483
m
METALLIZATION:
Type: Al, 1% Cu
Thickness: 16k
2k
PASSIVATION:
Type: Nitride (Si
3
N
4
) over Silox (SiO
2
, 5% Phos.)
Silox Thickness: 12k
2k
Nitride Thickness: 3.5k
1.5k
SUBSTRATE POTENTIAL (Powered Up):
V-
TRANSISTOR COUNT:
30
PROCESS:
Bipolar Dielectric Isolation
Metallization Mask Layout
HA-2539
V+
OUTPUT
V-
+IN
-IN
HA-2539