1
June 1998
HA4344B
350MHz, 4 x 1 Video Crosspoint Switch
with Synchronous Controls
Features
Low Power Dissipation . . . . . . . . . . . . . . . . . . . 105mW
Symmetrical Slew Rates . . . . . . . . . . . . . . . . . 1400V/
s
0.1dB Gain Flatness. . . . . . . . . . . . . . . . . . . . . . 100MHz
-3dB Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . 350MHz
Off Isolation (100MHz) . . . . . . . . . . . . . . . . . . . . . . 70dB
Crosstalk Rejection (30MHz). . . . . . . . . . . . . . . . . 80dB
Differential Gain and Phase . . . . . 0.01%/0.01Degrees
High ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . >2000V
TTL Compatible Control Signals
Latched Control Lines for Synchronous Switching
Applications
Professional Video Switching and Routing
RGB Video Distribution Systems
Computer Graphics
RF Switching and Routing
Description
The HA4344B is a very wide bandwidth 4 x 1 crosspoint
switch ideal for professional video switching, HDTV, com-
puter display routing, and other high performance applica-
tions. This circuit features very low power dissipation,
excellent differential gain and phase, high off isolation, sym-
metric slew rates, fast switching, and latched control signals.
When disabled, the output is switched to a high impedance
state, making the HA4344B ideal for matrix routers.
The latched control signals allow for synchronized channel
switching. When CK1 is low the master control latch loads the
next switching address (A0, A1, CS), while the closed (assum-
ing CK2 is the inverse of CK1) slave control latch maintains the
crosspoint in its current state. CK2 switching low closes the
master latch (with previous assumption), loads the now open
slave latch, and switches the crosspoint to the newly selected
channel. Channel selection is asynchronous (changes with any
control signal change) if both CK1 and CK2 are low.
Pinout
HA4344B (SOIC)
TOP VIEW
Functional Diagram
Timing Diagram
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HA4344BCB
0 to 70
16 Ld SOIC
M16.15
HA4344BCB96
0 to 70
16 Ld SOIC Tape
and Reel
M16.15
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
IN0
GND
IN1
GND
IN2
GND
GND
IN3
V+
A1
CS
OUT
CK2
CK1
V-
A0
OUT
DECODE
EN0
EN1
EN2
EN3
IN0
IN1
IN2
IN3
C
C
C
C
CK1
CK2
A0
A1
CS
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
D
L
Q
C
C
C
C
100k
100k
A0, A1, CS
OUT
CHX
CHY
CHZ
CHX
CHX
CHY
CHX
CHZ
CHZ
CK1
CK2
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
File Number
3956.2
2
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SUPPLY
Digital Input Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . .
25mA
Analog Input Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . .
5mA
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . 2000V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
115
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
2. If an input signal is applied before the supplies are powered up, the input current must be limited to these maximum values.
Electrical Specifications
V
SUPPLY
=
5V, R
L
= 10k
, V
CS
= 0.8V, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
(NOTE 4)
TEMP. (
o
C)
MIN
TYP
MAX
UNITS
DC SUPPLY CHARACTERISTICS
Supply Voltage
Full
4.5
5.0
5.5
V
Supply Current (V
OUT
= 0V)
V
CS
= 0.8V
25, 70
-
10.5
13
mA
V
CS
= 0.8V
0
-
-
15.5
mA
V
CS
= 2.0V
25, 70
-
400
450
A
V
CS
= 2.0V
0
-
400
580
A
ANALOG DC CHARACTERISTICS
Output Voltage Swing Without
Clipping
V
OUT
= V
IN
V
IO
20mV
25, 70
2.7
2.8
-
V
0
2.4
2.5
-
V
Output Current
Full
15
20
-
mA
Input Bias Current
Full
-
30
50
A
Output Offset Voltage
Full
-10
-
10
mV
Output Offset Voltage Drift (Note 3)
Full
-
25
50
V/
C
SWITCHING CHARACTERISTICS
Turn-On Time
25
-
160
-
ns
Turn-Off Time
25
-
320
-
ns
Output Glitch During Switching
25
-
10
-
mV
DIGITAL DC CHARACTERISTICS
Input Logic High Voltage
Full
2
-
-
V
Input Logic Low Voltage
Full
-
-
0.8
V
CLK1, CLK2 Input Current
0 to 4V
Full
-
40
50
A
CS, A0, A1 Input Current
0 to 4V
Full
-2
-
2
A
AC CHARACTERISTICS
Insertion Loss
1V
P-P
25
-
0.055
0.063
dB
Full
-
0.07
0.08
dB
Channel-to-Channel Insertion Loss
Match
Full
-
0.004
0.006
dB
HA4344B
3
AC Test Circuit
-3dB Bandwidth
R
S
= 47
, C
L
= 10pF
25
-
350
-
MHz
R
S
= 29
, C
L
= 20pF
25
-
300
-
MHz
R
S
= 16
, C
L
= 33pF
25
-
220
-
MHz
R
S
= 9
, C
L
= 52pF
25
-
160
-
MHz
0.1dB Flat Bandwidth
R
S
= 47
, C
L
= 10pF
25
-
150
-
MHz
R
S
= 29
, C
L
= 20pF
25
-
110
-
MHz
R
S
= 16
, C
L
= 33pF
25
-
100
-
MHz
R
S
= 9
, C
L
= 52pF
25
-
70
-
MHz
Input Resistance
Full
200
400
-
k
Input Capacitance
Full
-
1.5
-
pF
Enabled Output Resistance
Full
-
15
-
Disabled Output Capacitance
V
CS
= 2.0V
Full
-
2.5
-
pF
Differential Gain
4.43MHz, Note 3
25
-
0.01
0.02
%
Differential Phase
4.43MHz, Note 3
25
-
0.01
0.02
Degrees
Off Isolation
1V
P-P
, 100MHz, V
CS
= 2.0V
Full
-
70
-
dB
Crosstalk Rejection
1V
P-P
, 30MHz
Full
-
80
-
dB
Slew Rate (1.5V
P-P
, +SR/-SR)
R
S
= 47
, C
L
= 10pF
25
-
1400/1490
-
V/
s
R
S
= 29
, C
L
= 20pF
25
-
1200/1260
-
V/
s
R
S
= 16
, C
L
= 33pF
25
-
870/940
-
V/
s
R
S
= 9
, C
L
= 52pF
25
-
750/710
-
V/
s
Total Harmonic Distortion (Note 3)
Full
-
0.01
0.1
%
Disabled Output Resistance
V
CS
= 2.0V
Full
-
12
-
M
NOTES:
3. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
4. Units are 100% tested at 25
o
C; guaranteed, but not tested at 0
o
C and 70
o
C.
Electrical Specifications
V
SUPPLY
=
5V, R
L
= 10k
, V
CS
= 0.8V, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
(NOTE 4)
TEMP. (
o
C)
MIN
TYP
MAX
UNITS
HA4344B
R
S
C
X
75
HFA1100
75
V
OUT
V
IN
10k
500
400
510
+
-
NOTE: C
L
= C
X
+ Test Fixture Capacitance.
HA4344B
4
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-
able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
HA4344B
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
0.25(0.010)
B
M
M
M16.15
(JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.3859
0.3937
9.80
10.00
3
E
0.1497
0.1574
3.80
4.00
4
e
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N
16
16
7
0
o
8
o
0
o
8
o
-
Rev. 0 12/93
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