CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
3-1
HA5352
Fast Acquisition
Dual Sample and Hold Amplifier
Description
The HA5352 is a fast acquisition, wide bandwidth Dual Sam-
ple and Hold amplifier built with the Intersil HBC-10 BiCMOS
process. This Sample and Hold amplifier offers the combina-
tion of features; fast acquisition time (70ns to 0.01%), excel-
lent DC precision and extremely low power dissipation,
making it ideal for use in multi-channel systems that require
low power.
The HA5352 comes in an open loop configuration with fully
differential inputs providing flexibility for user defined feed-
back. In unity gain the HA5352 is completely self-contained
and requires no external components. The on-chip 15pF
hold capacitors are completely isolated to minimize droop
rate and reduce the sensitivity of pedestal error. The
HA5352 Dual Sample and Hold is available in a 14 lead
PDIP and 16 lead SOIC packages saving board space while
its pinout is designed to simplify layout.
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
PACKAGE
HA5352IP
-40
o
C to +85
o
C
14 Lead Plastic DIP
HA5352IB
-40
o
C to +85
o
C
16 Lead Plastic SOIC (W)
Features
Fast Acquisition to 0.01% . . . . . . . . . . . . . . .70ns (Max)
Low Offset Error
. . . . . . . . . . . . . . . . . . . . . . . .
2mV (Max)
Low Pedestal Error
. . . . . . . . . . . . . . . . . . . . .
10mV (Max)
Low Droop Rate . . . . . . . . . . . . . . . . . . . . . 2
V/
s (Max)
Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . . 40MHz
Low Power Dissipation per Amp . . . . . . .220mW (Max)
Total Harmonic Distortion (Hold Mode) . . . . . . . -72dBc
(V
IN
= 5V
P-P
at 1MHz)
Fully Differential Inputs
On Chip Hold Capacitor
Applications
Synchronous Sampling
Wide Bandwidth A/D Conversion
Deglitching
Peak Detection
High Speed DC Restore
May 1997
Pinouts
HA5352 (300 mil SOIC)
TOP VIEW
HA5352 (PDIP)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
GND1
-IN
+IN
NC
V1-
+IN2
GND2
-IN2
V1+
NC
OUT1
V2-
OUT2
S/H2 CONTROL
V2+
S/H1 CONTROL
S/H1
S/H2
GND1
-IN1
+IN1
V1-
+IN2
-IN2
GND2
V1+
S/H1 CONTROL
OUT1
V2-
OUT2
S/H2 CONTROL
V2+
1
2
3
4
5
6
7
14
13
12
11
10
9
8
File Number
3394.5
NOT
REC
OMM
END
ED F
OR N
EW D
ESIG
NS
See
HA5
351
cont
act o
ur Te
chni
cal S
uppo
rt Ce
nter
at
i-888
-INT
ERS
IL or
www
.inte
rsil.c
om/t
sc
3-2
Specifications HA5352
Absolute Maximum Ratings
Operating Conditions
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . +11V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6V
Voltage between S/H control and ground. . . . . . . . . . . . . . . . . +5.5V
Output Current, Continuous
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
37mA
Junction Temperature (Plastic Packages) . . . . . . . . . . . . . . +150
o
C
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . +300
o
C
(SOIC - Lead Tips Only)
Operating Temperature Range
HA5352I. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C
T
A
+85
o
C
Storage Temperature Range . . . . . . . . . . . . . -65
o
C
T
A
+150
o
C
Thermal Package Characteristics
JA
Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
o
C/W
SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
o
C/W
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
Test Conditions: V
SUPPLY
=
5V; C
H
= Internal = 15pF, Digital Input: V
IL
= +0.0V (Sample), V
IH
= 4.0V
(Hold). Non-Inverting Unity Gain Configuration (Output Tied to -Input), C
L
= 5pF, Unless Otherwise
Specified
PARAMETERS
TEMP
HA5352I
UNITS
MIN
TYP
MAX
INPUT CHARACTERISTICS
Input Voltage Range
Full
-2.5
-
+2.5
V
Input Resistance (Note 2)
+25
o
C
100
500
-
k
Input Capacitance
+25
o
C
-
-
5
pF
Input Offset Voltage
+25
o
C
-2
-
2
mV
Full
-3.0
-
3.0
mV
Offset Voltage Temperature Coefficient
Full
-
15
-
V/
o
C
Bias Current
Full
-
2.5
5
A
Offset Current
Full
-1.5
-
+1.5
A
Common Mode Range
Full
-2.5
-
+2.5
V
Common Mode Rejection (
2.5V
DC
, Note 3)
Full
60
80
-
dB
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
(
2.5V
OUT
)
+25
o
C
95
108
-
dB
Full
85
-
-
dB
Unity Gain -3dB Bandwidth
+25
o
C
-
40
-
MHz
TRANSIENT RESPONSE
Rise Time (200mV Step)
+25
o
C
-
8.5
-
ns
Overshoot (200mV Step)
+25
o
C
0
-
30
%
Slew Rate (5V Step)
Full
88
105
-
V/
s
DIGITAL INPUT CHARACTERISTICS
Input Voltage (High)
V
IH
+25
o
C,
+85
o
C
2.1
-
5.0
V
-40
o
C
2.4
-
5.0
V
Input Voltage (Low)
V
IL
Full
0
-
0.8
V
3-3
Specifications HA5352
Input Current (V
IL
= 0V)
I
IL
Full
-1
-
+1
A
Input Current (V
IH
= 5V)
I
IH
Full
-1
-
+1
A
OUTPUT CHARACTERISTICS
Output Voltage (R
L
= 510
)
Full
-3
-
+3
V
Output Current (R
L
= 100
)
+25
o
C,
+85
o
C
20
25
-
mA
-40
o
C
15
-
-
mA
Full Power Bandwidth (5V
P-P
, A
V
= +1, -3dB)
Full
-
13
-
MHz
Output Resistance - Hold Mode
+25
o
C
-
0.02
-
TOTAL OUTPUT NOISE, D.C. TO 10MHz
Sample Mode
+25
o
C
-
325
-
Vrms
Hold Mode
+25
o
C
-
325
-
Vrms
SAMPLE MODE DISTORTION CHARACTERISTICS
Total Harmonic Distortion
V
IN
= 4.5V
P-P
, F
IN
= 100kHz
+25
o
C
-
-80
-76
dBc
V
IN
= 5V
P-P
, F
IN
= 1MHz
+25
o
C
-
-74
-69
dBc
V
IN
= 1V
P-P
, F
IN
= 10MHz
+25
o
C
-
-57
-52
dBc
Signal to Noise Ratio
(RMS Signal to RMS Noise)
V
IN
= 4.5V
P-P
, F
IN
= 100kHz
+25
o
C
-
73
-
dB
Crosstalk
V
IN
= 5V
P-P
, F
IN
= 10MHz
+25
o
C
-
75
-
dB
HOLD MODE DISTORTION CHARACTERISTICS (50% Duty Cycle S/H)
Total Harmonic Distortion
V
IN
= 4.5V
P-P
, F
IN
= 100kHz, F
S
100kHz
+25
o
C
-
-78
-74
dBc
V
IN
= 5V
P-P
, F
IN
= 1MHz, F
S
1MHz
+25
o
C
-
-72
-67
dBc
V
IN
= 1V
P-P
, F
IN
= 10MHz, F
S
1MHz
+25
o
C
-
-51
-47
dBc
Signal to Noise Ratio
(RMS Signal to RMS Noise)
V
IN
= 4.5V
P-P
, F
IN
=100kHz, F
S
100kHz
+25
o
C
-
70
-
dB
SAMPLE AND HOLD CHARACTERISTICS
Acquisition Time
0V to 2.0V Step to
1mV
+25
o
C
-
53
-
ns
0V to 2.0V Step to 0.01% (
200
V)
+25
o
C
-
64
70
ns
-2.5V to +2.5V Step to 0.01% (
500
V)
+25
o
C
-
90
100
ns
Electrical Specifications
Test Conditions: V
SUPPLY
=
5V; C
H
= Internal = 15pF, Digital Input: V
IL
= +0.0V (Sample), V
IH
= 4.0V
(Hold). Non-Inverting Unity Gain Configuration (Output Tied to -Input), C
L
= 5pF, Unless Otherwise
Specified (Continued)
PARAMETERS
TEMP
HA5352I
UNITS
MIN
TYP
MAX
3-4
Specifications HA5352
Droop Rate
+25
o
C
-
0.3
-
V/
s
Full
-2
-
2
V/
s
Hold Step Error (V
IL
= 0V, V
IH
= 4.0V, t
R
= 5ns)
Full
-10
-
+10
mV
Hold Mode Settling Time (to
1mV)
25
o
C
-
50
-
ns
Hold Mode Feedthrough (5V
P-P
, 500kHz, Sine)
25
o
C
-
72
-
dB
EADT (Effective Aperture Delay Time)
+25
o
C
-
+1
-
ns
Aperture Time (Note 2)
+25
o
C
-
10
-
ns
Aperture Uncertainty
+25
o
C
-
10
20
ps
Aperture Match
+25
o
C
-
30
-
ps
POWER SUPPLY CHARACTERISTICS
Supply Current (per Amp)
Full
-
20
22
mA
Total Supply Current
Full
-
40
44
mA
PSRR (+V or -V, 10% Delta)
Full
60
74
-
dB
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Func-
tional operation under any of these conditions is not necessarily implied.
2. Derived from Computer Simulation only, not tested.
3. +CMRR is measured from 0V to +2.5V, -CMRR is measured from 0V to -2.5V.
Electrical Specifications
Test Conditions: V
SUPPLY
=
5V; C
H
= Internal = 15pF, Digital Input: V
IL
= +0.0V (Sample), V
IH
= 4.0V
(Hold). Non-Inverting Unity Gain Configuration (Output Tied to -Input), C
L
= 5pF, Unless Otherwise
Specified (Continued)
PARAMETERS
TEMP
HA5352I
UNITS
MIN
TYP
MAX
3-5
HA5352
Die Characteristics
DIE DIMENSIONS:
2530 x 3110 x 525
25.4
m
100 x 122 x 19
1mil
METALLIZATION:
Type: Metal 1: AlSiCu/TiW
Thickness: Metal 1: 6k
750
Type: Metal 2: AlSiCu
Thickness: Metal 2: 16k
1.1k
GLASSIVATION:
Type: Sandwich Passivation
Nitride - 4k
, Undoped Si Glass(USG) - 8k
, Total - 12k
2k
SUBSTRATE POTENTIAL: V-
TRANSISTOR COUNT: 312
Metallization Mask Layout
HA5352
-IN1
GND1 GND1
V1+ V1+ V1+
S/H CONTROL1
V
OUT
1
V
OUT
1
V2-
V2-
V2-
V
OUT
2
V
OUT
2
S/H CONTROL2
V2+ V2+ V2+
GND2 GND2
-IN2
+IN2
V1-
V1-
V1-
+IN1
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