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Электронный компонент: HCTS160HMSR

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS160DMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead SBDIP
HCTS160KMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
HCTS160D/Sample
+25
o
C
Sample
16 Lead SBDIP
HCTS160K/Sample
+25
o
C
Sample
16 Lead Ceramic Flatpack
HCTS160HMSR
+25
o
C
Die
Die
HCTS160MS
Radiation Hardened
Synchronous Counter
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
MR
CP
P0
P1
P2
P3
GND
PE
VCC
Q0
Q1
Q2
Q3
TE
SPE
TC
MR
CP
P0
P1
P2
P3
PE
GND
2
3
4
5
6
7
8
1
16
15
14
13
12
11
10
9
VCC
TC
Q0
Q1
Q2
Q3
TE
SPE
Features
3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset: >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
-Standard Outputs 10 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
Input Current Levels Ii
5
A @ VOL, VOH
Description
The Intersil HCTS160MS is a Radiation Hardened high speed
presettable BCD decade synchronous counter that features an
asynchronous reset and look-ahead carry logic. Counting and
parallel presetting are accomplished synchronously with the low-
to-high transition of the clock. A low level on the synchronous
parallel enable input, SPE, disables counting and allows data at
the preset inputs, P0 - P3, to be loaded into the counter. The
counter is reset by a low on the master reset input, MR. Two count
enables, PE and TE are provided for n-bit cascading. TE also
controls the terminal count output, TC. The terminal count output
indicates a maximum count for one clock pulse and is used to
enable the next cascaded stage to count.
The HCTS160MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS160MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
September 1995
Spec Number
518611
File Number
2484.2
DB NA
561
HCTS160MS
Functional Block Diagram
TRUTH TABLE
OPERATING MODE
INPUTS
OUTPUTS
MR
CP
PE
TE
SPE
Pn
Qn
TC
Reset (Clear)
L
X
X
X
X
X
L
L
Parallel Load
H
X
X
l
l
L
L
H
X
X
l
h
H
(Note 1)
Count
H
h
h
h (Note 3)
X
Count
(Note 1)
Inhibit
H
X
l (Note 2)
X
h (Note 3)
X
qn
(Note 1)
H
X
X
l (Note 2)
h (Note 3)
X
qn
L
H = HIGH Voltage Level
L = LOW Voltage Level
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition
X = Immaterial
q = Lower case letterindicate the state of the referenced output prior to the LOW-to-HIGH clock transition
= LOW-to-HIGH clock transition
NOTES:
1. The TC output is HIGH when TE is HIGH and the counter is at terminal count (HHHH for 161 and HLLH for 160)
2. The HIGH-to-LOW transition of PE or TE on the 54/74161 and 54/74160 should only occur while CP is high for conventional operation
3. The LOW-to-HIGH transition of SPE on the 54/74161 and 54/74160 should only occur while CP is high for conventional operation
SPE
MR
CP
PE
TE
MR
D0
T0
CP
P
Q0
Q0
Q0
14
15
TC
MR
D1
T1
CP
P
Q1
Q1
13
MR
D2
T2
CP
P
Q2
Q0
12
MR
D3
T3
CP
P
Q3
Q1
11
Q0
Q3 Q3
Q3 Q0 Q3 Q0
Q0 Q1
Q2 Q3
Q0 Q3
Q0
Q1
Q2
P3
P2
P1
P0
3
4
5
6
GND
VCC
16
8
Spec Number
518611
562
Specifications HCTS160MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .
10mA
DC Drain Current, Any One Output
. . . . . . . . . . . . . . . . . . . . . . .
25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265
o
C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance
JA
JC
SBDIP Package. . . . . . . . . . . . . . . . . . . .
73
o
C/W
24
o
C/W
Ceramic Flatpack Package . . . . . . . . . . .
114
o
C/W
29
o
C/W
Maximum Package Power Dissipation at +125
o
C Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/
o
C
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/
o
C
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .500ns Max
Operating Temperature Range (T
A
) . . . . . . . . . . . . -55
o
C to +125
o
C
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP
A SUB-
GROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Quiescent Current
ICC
VCC = 5.5V,
VIN = VCC or GND
1
+25
o
C
-
40
A
2, 3
+125
o
C, -55
o
C
-
750
A
Output Current
(Sink)
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
1
+25
o
C
4.8
-
mA
2, 3
+125
o
C, -55
o
C
4.0
-
mA
Output Current
(Source)
IOH
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
1
+25
o
C
-4.8
-
mA
2, 3
+125
o
C, -55
o
C
-4.0
-
mA
Output Voltage Low
VOL
VCC = 4.5V, VIH = 2.25V,
IOL = 50
A, VIL = 0.8V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.1
V
VCC = 5.5V, VIH = 2.75V,
IOL = 50
A, VIL = 0.8V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.1
V
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V,
IOH = -50
A, VIL = 0.8V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
VCC
-0.1
-
V
VCC = 5.5V, VIH = 2.75V,
IOH = -50
A, VIL = 0.8V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
VCC
-0.1
-
V
Input Leakage
Current
IIN
VCC = 5.5V, VIN = VCC or
GND
1
+25
o
C
-
0.5
A
2, 3
+125
o
C, -55
o
C
-
5.0
A
Noise Immunity
Functional Test
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B
+25
o
C, +125
o
C, -55
o
C
-
-
-
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO
4.0V is recognized as a logic "1", and VO
0.5V is recognized as a logic "0".
Spec Number
518611
563
Specifications HCTS160MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
(NOTES 1, 2)
CONDITIONS
GROUP
A SUB-
GROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
CP to QN
TPHL
VCC = 4.5V
9
+25
o
C
2
26
ns
10, 11
+125
o
C, -55
o
C
2
30
ns
TPLH
VCC = 4.5V
9
+25
o
C
2
23
ns
10, 11
+125
o
C, -55
o
C
2
26
ns
CP to TC
TPHL
VCC = 4.5V
9
+25
o
C
2
28
ns
10, 11
+125
o
C, -55
o
C
2
32
ns
TPLH
VCC = 4.5V
9
+25
o
C
2
24
ns
10, 11
+125
o
C, -55
o
C
2
28
ns
TE to TC
TPHL
VCC = 4.5V
9
+25
o
C
2
27
ns
10, 11
+125
o
C, -55
o
C
2
29
ns
TPLH
VCC = 4.5V
9
+25
o
C
2
18
ns
10, 11
+125
o
C, -55
o
C
2
20
ns
MR to QN, TC
TPHL
VCC = 4.5V
9
+25
o
C
2
46
ns
10, 11
+125
o
C, -55
o
C
2
51
ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500
, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Capacitance Power
Dissipation
CPD
VCC = 5.0V, f = 1MHz
1
+25
o
C
-
104
pF
1
+125
o
C, -55
o
C
-
260
pF
Input Capacitance
CIN
VCC = 5.0V,, f = 1MHz
1
+25
o
C
-
10
pF
1
+125
o
C
-
10
pF
Output Transition
Time
TTHL
TTLH
VCC = 4.5V
1
+25
o
C
-
15
ns
1
+125
o
C
-
22
ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number
518611
564
Specifications HCTS160MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
(NOTES 1, 2)
CONDITIONS
TEMPERATURE
200K LIMITS
UNITS
MIN
MAX
Quiescent Current
ICC
VCC = 5.5V, VIN = VCC or GND
+25
o
C
-
0.75
mA
Output Current (Sink)
IOL
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
+25
o
C
4.0
-
mA
Output Current
(Source)
IOH
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
+25
o
C
-4.0
-
mA
Output Voltage Low
VOL
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50
A
+25
o
C
-
-0.1
V
Output Voltage High
VOH
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOH = -50
A
+25
o
C
VCC
-0.1
-
V
Input Leakage Current
IIN
VCC = 5.5V, VIN = VCC or GND
+25
o
C
-
5
A
Noise Immunity
Functional Test
FN
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
+25
o
C
-
-
-
CP to QN
TPHL
VCC = 4.5V
+25
o
C
2
30
ns
TPLH
VCC = 4.5V
+25
o
C
2
26
ns
CP to TC
TPHL
VCC = 4.5V
+25
o
C
2
32
ns
TPLH
VCC = 4.5V
+25
o
C
2
28
ns
TE to TC
TPHL
VCC = 4.5V
+25
o
C
2
29
ns
TPLH
VCC = 4.5V
+25
o
C
2
20
ns
MR to QN, TC
TPHL
VCC = 4.5V
+25
o
C
2
51
ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500
, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO
4.0V is recognized as a logic "1", and VO
0.5V is recognized as a logic "0".
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25
o
C)
PARAMETER
GROUP B
SUBGROUP
DELTA LIMIT
ICC
5
12
A
IOL/IOH
5
-15% of 0 Hour
Spec Number
518611