1
September 1997
HIP6011
Buck Pulse-Width Modulator (PWM) Controller
and Output Voltage Monitor
Features
Drives N-Channel MOSFET
Operates From +5V or +12V Input
Simple Single-Loop Control Design
- Voltage-Mode PWM Control
Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
Excellent Output Voltage Regulation
- 1.27V Internal Reference
-
1.5% Over Line Voltage and Temperature
Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element
- Uses MOSFET's r
DS(ON)
Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable
from 50kHz to Over 1MHz
Applications
Power Supply for PentiumTM, Pentium-ProTM,
PowerPCTM and AlphaTM Microprocessors
High-Power 5V to 3.xV DC-DC Regulators
Low-Voltage Distributed Power Supplies
Description
The HIP6011 provides complete control and protection for a
DC-DC converter optimized for high-performance micropro-
cessor applications. It is designed to drive an N-Channel
MOSFET in a standard buck topology. The HIP6011 inte-
grates all of the control, output adjustment, monitoring and
protection functions into a single package.
The output voltage of the converter can be precisely regu-
lated to as low as 1.27V, with a maximum tolerance of
1.5%
over temperature and line voltage variations.
The HIP6011 provides simple, single feedback loop, voltage-
mode control with fast transient response. It includes a
200kHz free-running triangle-wave oscillator that is adjust-
able from below 50kHz to over 1MHz. The error amplifier
features a 15MHz gain-bandwidth product and 6V/
s slew
rate which enables high converter bandwidth for fast tran-
sient performance. The resulting PWM duty ratio ranges
from 0% to 100%.
The HIP6011 protects against over-current conditions by inhib-
iting PWM operation. The HIP6011 monitors the current by
using the r
DS(ON)
of the upper MOSFET which eliminates the
need for a current sensing resistor. Built-in over-voltage protec-
tion triggers an external SCR to crowbar the input supply.
Pinout
HIP6011
(SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HIP6011
0 to 70
14 Ld SOIC
M14.15
8
9
10
11
12
13
14
7
6
5
4
3
2
1
OCSET
SS
EN
COMP
FB
RT
VCC
NC
BOOT
UGATE
PHASE
GND
OVP
VSEN
AlphaTM is a trademark of Digital Equipment Corporation.
PentiumTM is a trademark of Intel Corporation.
PentiumTM Pro is a trademark of Intel Corporation.
PowerPCTM is a trademark of IBM.
File Number
4409
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
2
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Typical Application
Block Diagram
+12V
+V
O
HIP6011
RT
FB
COMP
SS
REF
GND
MONITOR AND
PROTECTION
OSC
UGATE
OCSET
PHASE
BOOT
EN
VCC
+5V OR +12V
VSEN
OVP
+
-
+
-
+
-
-
+
OSCILLATOR
SOFT-
START
+
-
REFERENCE
POWER-ON
RESET (POR)
INHIBIT
PWM
COMPARATOR
ERROR
AMP
VCC
SS
PWM
RT
GND
OCSET
FB
COMP
EN
1.27V REF
OVER-
CURRENT
GATE
CONTROL
LOGIC
BOOT
UGATE
PHASE
200
A
10
A
4V
+
-
OVP
VSEN
115%
OVER-
VOLTAGE
HIP6011
3
Absolute Maximum Ratings
T
A
= 25
o
C
Thermal Information
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15.0V
Boot Voltage, V
BOOT
- V
PHASE
. . . . . . . . . . . . . . . . . . . . . . . +15.0V
Input, Output or I/O Voltage . . . . . . . . . . . . GND-0.3V to VCC+0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Recommended Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V
10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . .0
o
C to 70
o
C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . .0
o
C to 125
o
C
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
150
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VCC SUPPLY CURRENT
Nominal Supply
I
CC
EN = VCC; UGATE and LGATE open
5
mA
Shutdown Supply
EN = 0V
50
100
A
POWER-ON RESET
Rising VCC Threshold
V
OCSET
= 4.5VDC
10.4
V
Falling VCC Threshold
V
OCSET
= 4.5VDC
8.2
V
Enable - Input threshold Voltage
V
OCSET
= 4.5VDC
0.8
2.0
V
Rising V
OCSET
Threshold
1.26
V
OSCILLATOR
Free Running Frequency
RT = OPEN, V
CC
= 12V
180
200
220
kHz
Total Variation
6k
< RT to GND < 200k
-20
+20
%
Ramp Amplitude
V
OSC
RT = OPEN
1.9
V
P-P
REFERENCE
Reference Voltage
V
REF
1.251
1.270
1.289
V
ERROR AMPLIFIER
DC Gain
88
dB
Gain-Bandwidth Product
GBW
15
MHz
Slew Rate
SR
COMP = 10pF
6
V/
s
GATE DRIVERS
Upper Gate Source
I
UGATE
V
BOOT
- V
PHASE
= 12V, V
UGATE
= 6V
350
500
mA
Upper Gate Sink
R
UGATE
I
LGATE
= 0.3A
5.5
10
PROTECTION
Over-Voltage Trip (V
SEN
/V
REF
)
115
120
%
OCSET Current Source
I
OCSET
V
OCSET
= 4.5VDC
170
200
230
A
OVP Sourcing Current
I
OVP
V
SEN
= 5.5V; V
OVP
= 0V
60
mA
Soft Start Current
I
SS
10
A
HIP6011
4
Typical Performance Curves
Functional Pin Description
VSEN (Pin 1)
This pin is connected to the converters output voltage. The
OVP comparator circuit uses this signal for overvoltage
protection.
OCSET (Pin 2)
Connect a resistor (R
OCSET
) from this pin to the drain of the
upper MOSFET. R
OCSET
, an internal 200
A current source
(I
OCS
), and the upper MOSFET on-resistance (r
DS(ON)
) set
the converter over-current (OC) trip point according to the
following equation:
An over-current trip cycles the soft-start function.
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10
A current source, sets the
soft-start interval of the converter.
COMP (Pin 4) and FB (Pin 5)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
EN (Pin 6)
This pin is the open-collector enable pin. Pull this pin below
1V to disable the converter. In shutdown, the soft start pin is
discharged and the UGATE and LGATE pins are held low.
GND (Pin 7)
Signal ground for the IC. All voltage levels are measured with
respect to this pin.
PHASE (Pin 8)
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for over-current protection. This pin also provides the return
path for the upper gate drive.
UGATE (Pin 9)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.
BOOT (Pin 10)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
VCC (Pin 12)
Provide a 12V bias supply for the chip to this pin.
OVP (Pin 13)
This pin drives an external SCR in the event of an overvoltage
condition.
RT (Pin 14)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R
T
) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Conversely, connecting a pull-up resistor (R
T
) from this pin
to VCC reduces the switching frequency according to the
following equation:
FIGURE 1. R
T
RESISTANCE vs FREQUENCY
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
10
100
1000
SWITCHING FREQUENCY (kHz)
RESIST
ANCE (k
)
10
100
1000
R
T
PULLUP
TO +12V
R
T
PULLDOWN
TO V
SS
100
200
300
400
500
600
700
800
900
1000
40
35
30
25
20
15
10
5
0
I
CC
(mA)
SWITCHING FREQUENCY (kHz)
C
GATE
= 3300pF
C
GATE
= 1000pF
C
GATE
= 10pF
8
9
10
11
12
13
14
7
6
5
4
3
2
1
OCSET
SS
EN
COMP
FB
RT
VCC
NC
BOOT
UGATE
PHASE
GND
OVP
VSEN
I
PEAK
I
OCS
R
O CSET
r
DS ON
(
)
--------------------------------------------
=
F
S
200kHz
4
10
7
R
T
k
(
)
---------------------
(R
T
to 12V)
F
S
200kHz
4
10
7
R
T
k
(
)
---------------------
(R
T
to 12V)
HIP6011
5
Functional Description
Initialization
The HIP6011 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages and the enable (EN) pin. The POR
monitors the bias voltage at the VCC pin and the input volt-
age (V
IN
) on the OCSET pin. The level on OCSET is equal
to V
IN
less a fixed voltage drop (see over-current protection).
With the EN pin held to VCC, the POR function initiates soft
start operation after both input supply voltages exceed their
POR thresholds. For operation with a single +12V power
source, V
IN
and VCC are equivalent and the +12V power
source must exceed the rising VCC threshold before POR
initiates operation.
The Power-On Reset (POR) function inhibits operation with
the chip disabled (EN pin low). With both input supplies
above their POR thresholds, transitioning the EN pin high ini-
tiates a soft start interval.
Soft Start
The POR function initiates the soft start sequence. An
internal 10
A current source charges an external capacitor
(C
SS
) on the SS pin to 4V. Soft start clamps the error ampli-
fier output (COMP pin) and reference input (+ terminal of
error amp) to the SS pin voltage. Figure 3 shows the soft
start interval with C
SS
= 0.1
F. Initially the clamp on the error
amplifier (COMP pin) controls the converter's output voltage.
At t1 in Figure 3, the SS voltage reaches the valley of the
oscillator's triangle wave. The oscillator's triangular wave-
form is compared to the ramping error amplifier voltage. This
generates PHASE pulses of increasing width that charge the
output capacitor(s). This interval of increasing pulse width
continues to t2. With sufficient output voltage, the clamp on
the reference input controls the output voltage. This is the
interval between t2 and t3 in Figure 3. At t3 the SS voltage
exceeds the DACOUT voltage and the output voltage is in
regulation. This method provides a rapid and controlled out-
put voltage rise.
Over-Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFET's on-resistance,
r
DS(ON)
to monitor the current. This method enhances the
converter's efficiency and reduces cost by eliminating a
current sensing resistor.
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the over-current trip level. An internal 200
A (typi-
cal) current sink develops a voltage across R
OCSET
that is
reference to V
IN
. When the voltage across the upper MOS-
FET (also referenced to V
IN
) exceeds the voltage across
R
OCSET
, the over-current function initiates a soft-start
sequence. The soft-start function discharges C
SS
with a
10
A current sink and inhibits PWM operation. The soft-start
function recharges C
SS
, and PWM operation resumes with
the error amplifier clamped to the SS voltage. Should an
overload occur while recharging C
SS
, the soft start function
inhibits PWM operation while fully charging C
SS
to 4V to
complete its cycle. Figure 4 shows this operation with an
overload condition. Note that the inductor current increases
to over 15A during the C
SS
charging interval and causes an
over-current trip. The converter dissipates very little power
with this method. The measured input power for the
conditions of Figure 4 is 2.5W.
The over-current function will trip at a peak inductor current
(I
PEAK)
determined by:
where I
OCSET
is the internal OCSET current source
(200
A - typical). The OC trip point varies mainly due to the
MOSFET's r
DS(ON)
variations. To avoid over-current tripping
in the normal operating load range, find the R
OCSET
resistor
from the equation above with:
1) The maximum r
DS(ON)
at the highest junction
temperature.
TIME (5ms/DIV)
SOFT-START
(1V/DIV)
0V
0V
t1
t2
t3
OUTPUT
(1V/DIV)
VOLTAGE
FIGURE 3. SOFT START INTERVAL
OUTPUT INDUCT
OR
SOFT
-ST
AR
T
0A
0V
TIME (20ms/DIV)
5A
10A
15A
2V
4V
FIGURE 4. OVER-CURRENT OPERATION
I
PEAK
I
OCSET
R
O CSET
r
DS ON
(
)
---------------------------------------------------
=
HIP6011
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