6-163
File Number
2269.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
RFD16N05L, RFD16N05LSM
16A, 50V, 0.047 Ohm, Logic Level,
N-Channel Power MOSFETs
These are N-Channel logic level power MOSFETs
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI
integrated circuits gives optimum utilization of silicon,
resulting in outstanding performance. They were designed
for use with logic level (5V) driving sources in applications
such as programmable controllers, automotive switching,
switching regulators, switching converters, motor relay
drivers and emitter switches for bipolar transistors. This
performance is accomplished through a special gate oxide
design which provides full rated conductance at gate biases
in the 3V to 5V range, thereby facilitating true on-off power
control directly from logic circuit supply voltages.
Formerly developmental type TA09871.
Features
16A, 50V
r
DS(ON)
= 0.047
UIS SOA Rating Curve (Single Pulse)
Design Optimized for 5V Gate Drives
Can be Driven Directly from CMOS, NMOS, TTL Circuits
Compatible with Automotive Drive Requirements
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Majority Carrier Device
Related Literature
- TB334 "Guidelines for Soldering Surface Mount
Components to PC Boards"
Symbol
Packaging
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFD16N05L
TO-251AA
RFD16N05L
RFD16N05LSM
TO-252AA
RFD16N05LSM
NOTE: When ordering, include the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, i.e. RFD16N05LSM9A
G
D
S
JEDEC TO-251AA
JEDEC TO-252AA
SOURCE
DRAIN (FLANGE)
GATE
DRAIN
GATE
SOURCE
DRAIN (FLANGE)
Data Sheet
April 1999
6-164
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
RFD16N05L,
RFD16N05LSM
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
50
V
Drain to Gate Voltage (R
GS
= 20k
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
50
V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
16
45
A
A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
10
V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
0.48
W
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-55 to 150
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 250mA, V
GS
= 0V, Figure 10
50
-
-
V
Gate to Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250mA, Figure 9
1
-
2
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 40V, V
GS
= 0V
T
C
= 150
o
C
-
-
1
A
-
-
50
A
Gate to Source Leakage Current
I
GSS
V
GS
=
10V, V
DS
= 0V
-
-
100
nA
Drain to Source On Resistance (Note 2)
r
DS(ON)
I
D
= 16A, V
GS
= 5V
-
-
0.047
I
D
= 16A, V
GS
= 4V
-
-
0.056
Turn-On Time
t
(ON)
V
DD
= 25V, I
D
= 8A,
V
GS =
5V, R
GS
= 12.5
Figures 15, 16
-
-
60
ns
Turn-On Delay Time
t
d(ON)
-
14
-
ns
Rise Time
t
r
-
30
-
ns
Turn-Off Delay Time
t
d(OFF)
-
42
-
ns
Fall Time
t
f
-
14
-
ns
Turn-Off Time
t
(OFF)
-
-
100
ns
Total Gate Charge
Q
g(TOT)
V
GS
= 0V to 10V
V
DD
= 40V,
I
D
= 16A,
R
L
= 2.5
Figures 17, 18
-
-
80
nC
Gate Charge at 5V
Q
g(5)
V
GS
= 0V to 5V
-
-
45
nC
Threshold Gate Charge
Q
g(TH)
V
GS
= 0V to 1V
-
-
3
nC
Thermal Resistance Junction to Case
R
JC
-
-
2.083
o
C/W
Thermal Resistance Junction to Ambient
R
JA
-
-
100
o
C/W
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Voltage
V
SD
I
SD
= 16A
-
-
1.5
V
Diode Reverse Recovery Time
t
rr
I
SD
= 16A, dI
SD
/dt = 100A/
s
-
-
125
ns
NOTES:
2. Pulse Test: Pulse Width
300ms, Duty Cycle
2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature.
RFD16N05L, RFD16N05LSM
6-165
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA
FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING SOA
(SINGLE PULSE UIS SOA)
FIGURE 5. SATURATION CHARACTERISTICS
FIGURE 6. TRANSFER CHARACTERISTICS
T
C
, CASE TEMPERATURE (
o
C)
PO
WER DISSIP
A
TION MUL
TIPLIER
0
0
25
50
75
100
150
0.2
0.4
0.6
0.8
1.0
1.2
125
T
C
, CASE TEMPERATURE (
o
C)
I
D
, DRAIN CURRENT (A)
0
25
50
75
100
150
5
10
20
125
15
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
10
0.1
10
2
1
I
D
, DRAIN CURRENT (A)
10
2
10
DC
1
OPERATION IN THIS AREA
LIMITED BY r
DS(ON)
I
D
MAX CONTINUOUS
T
C
= 25
o
C
T
J
= MAX RATED
10
10
2
1
I
AS
, A
V
ALANCHE CURRENT (A)
t
AV
, TIME IN AVALANCHE (ms)
1
10
0.01
0.10
t
AV
= (L)(I
AS
)/(1.3 RATED BV
DSS
- V
DD
)
If R = 0
If R
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3 RATED BV
DSS
- V
DD
) +1]
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
Idm
0
15
30
0
1.5
3.0
4.5
7.5
45
I
DS
, DRAIN T
O
SOURCE CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 2V
V
GS
= 3V
V
GS
= 10V
PULSE DURATION = 80
s
V
GS
= 5V
V
GS
= 4V
6.0
T
C
= 25
o
C
DUTY CYCLE = 0.5% MAX.
0
3.0
4.5
6.0
1.5
0
15
30
45
I
DS(ON)
, DRAIN T
O
SOURCE ON CURRENT (A)
V
GS
, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
DS
= 15V
RFD16N05L, RFD16N05LSM
6-166
FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 8. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 9. NORMALIZED GATE THRESHOLD vs JUNCTION
TEMPERATURE
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Typical Performance Curves
Unless Otherwise Specified (Continued)
V
GS
, GATE TO SOURCE VOLTAGE (V)
5
4
7
1.4
1.1
1.0
0.7
0.9
0.8
0.6
6
0.5
I
D
= 16V
1.2
1.3
NORMALIZED DRAIN T
O
SOURCE
V
DS
= 15V
ON RESIST
ANCE
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX.
0
2.5
1.5
0.5
-50
T
J
, JUNCTION TEMPERATURE (
o
C)
2.0
1.0
0
50
NORMALIZED DRAIN T
O
SOURCE
100
200
I
D
= 16A
150
ON RESIST
ANCE
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX.
1.1
0.9
0.7
-50
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED GA
TE
1.0
0.8
0.6
0
200
THRESHOLD V
O
L
T
A
GE
50
100
150
1.2
1.3
1.4
I
D
= 250
A
V
GS
= V
DS
1.4
1.0
0.8
50
-50
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED DRAIN T
O
SOURCE
1.2
0
100
200
BREAKDO
WN V
O
L
T
A
GE
0
150
I
D
= 250
A
0.6
0
10
15
20
25
C, CAP
A
CIT
ANCE (pF)
V
DS,
DRAIN TO SOURCE VOLTAGE (V)
2000
1600
1200
0
5
800
400
C
ISS
C
RSS
C
OSS
V
GS
= 0V
f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
C
DS
+ C
GD
50
37.5
12.5
0
20
I
G REF
(
)
I
G ACT
(
)
-------------------------
t, TIME (
s)
80
I
G REF
(
)
I
G ACT
(
)
-------------------------
10
8
6
2
0
V
DS
, DRAIN T
O
SOURCE V
O
L
T
A
GE (V)
V
GS
, GA
TE T
O
SOURCE V
O
L
T
A
GE (V)
V
DD
= BV
DSS
V
DD
= 0.75 BV
DSS
V
DD
= 0.50 BV
DSS
V
DD
= 0.25 BV
DSS
DESCENDING ORDER:
R
L
= 3.125
,
V
GS
= 5V
I
G(REF)
= 0.60mA
25
4
DRAIN SOURCE VOLTAGE
PLATEAU VOLTAGES IN
SOURCE
VOLTAGE
GATE
V
DD
= BV
DSS
V
DD
= BV
DSS
RFD16N05L, RFD16N05LSM
6-167
Test Circuits and Waveforms
FIGURE 13. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 14. UNCLAMPED ENERGY WAVEFORMS
FIGURE 15. SWITCHING TIME TEST CIRCUIT
FIGURE 16. RESISTIVE SWITCHING WAVEFORMS
FIGURE 17. GATE CHARGE TEST CIRCUIT
FIGURE 18. GATE CHARGE WAVEFORMS
t
P
V
GS
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
V
GS
R
L
R
G
DUT
+
-
V
DD
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
0.3
F
12V
BATTERY
50k
V
DS
S
DUT
D
G
I
G(REF)
0
(ISOLATED
V
DS
0.2
F
CURRENT
REGULATOR
I
D
CURRENT
SAMPLING
I
G
CURRENT
SAMPLING
SUPPLY)
RESISTOR
RESISTOR
SAME TYPE
AS DUT
Q
g(TOT)
Q
gd
Q
gs
V
DS
0
V
GS
V
DD
I
G(REF)
0
RFD16N05L, RFD16N05LSM
6-168
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
x
Spice Model
(RFD16N05L)
.SUBCKT RFD16N05L
2
1
3;
rev 04/08/92
*Nominal Temperature = 25
o
C
.MODEL MOSMOD NMOS (VTO=2.054
KP=24.73
IS=1e-30
N=10
TOX=1
L=1u
W=1u)
Vto 21 6
0.448
Rsource
8
7
RDSMOD
0.614E-3
Rdrain
5
16
RDSMOD
27.38E-3
.MODEL RDSMOD RES (TC1=3.66E-3
TC2=1.46E-5)
.MODEL RVTOMOD RES (TC1=-1.81E3
TC2=1.41E-6)
Ebreak 11
7
17
18
70.9
.MODEL RBKMOD RES (TC1=1.01E-3
TC2=5.21E-8)
.MODEL DBKMOD D (RS=8.82E-2
TRS1=-2.01E-3
TRS2=7.32E-10)
.MODEL DBDMOD D (IS=1.34E-13
RS=1.21E-2
TRS1=1.64E-3
TRS2=2.59E-6
+CJO=1.13E-9
TT=4.14E-8)
Cin
6
8
1.21E-9
Ca
12
8
3.33E-9
.MODEL S1AMOD VSWITCH (RON=1e-5
ROFF=0.1
VON=-4.25
VOFF=-2.25)
.MODEL S1BMOD VSWITCH (RON=1e-5
ROFF=0.1
VON=-2.25
VOFF=-4.25)
.MODEL DPLCAPMOD D (CJO=5.22E-10
IS=1e-30
N=10)
Cb
15
14
3.11E-9
.MODEL S2AMOD VSWITCH (RON=1e-5
ROFF=0.1
VON=-0.65
VOFF=4.35)
.MODEL S2BMOD VSWITCH (RON=1e-5
ROFF=0.1
VON=4.35
VOFF=-0.65)
Rgate
9
20
2.98
Lgate
1
9
1.38E-9
Ldrain
2
5
1.0E-12
Lsource
3
7
1.0E-9
Dbody
7
5
DBDMOD
Dbreak
5
11
DBKMOD
Dplcap
10
5
DPLCAPMOD
Eds
14
8
5
8
1
Egs
13
8
6
8
1
Esg
6
10
6
8
1
Evto
20
6
18
8
1
It
8
17
1
MOS1
16
6
8
8
MOSMOD
M=0.99
MOS2
16
21
8
8
MOSMOD
M=0.01
Rbreak
17
18
RBKMOD
1
Rin
6
8
1e9
Rvto
18
19
RVTOMOD
1
S1a
6
12
13
8
S1AMOD
S1b
13
12
13
8
S1BMOD
S2a
6
15
14
13
S2AMOD
S2b
13
15
14
13
S2BMOD
Vbat
8
19
DC
1
.ENDS
RFD16N05L, RFD16N05LSM
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