1
FN8156.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X90100
NV Electronically Programmable
Capacitor
The Intersil X90100 is a non-volatile electronically
programmable capacitor. The device is programmed through
a simple digital interface. After programming, the chosen
setting for the device is retained by internal EEPROM
storage whether or not DC power is maintained. There are
32 programmable capacitance values selectable, ranging
from 7.5pF to 14.5pF in 0.23pF increments, in single-ended
mode. The dielectric is highly stable, and the capacitance
exhibits a very low voltage coefficient. It has virtually no
dielectric absorbtion and has a very low temperature drift
coefficient in differential mode (<50ppm/C).
The X90100 is programmed through three digital interface
pins, which have Schmitt triggers and pullup resistors to
secure code retention. The three pins, INC, U/D, and CS,
are identical in operation to other Intersil chips with up/down
interface, such as the X9315 5-bit Digitally Controlled
Potentiometer (DCP).
Pinout
X90100
(8 LD MSOP)
TOP VIEW
Features
Non-volatile EEPROM storage of programmed trim codes
Power On Recall of capacitance setting
High-Performance Electronically Trimmable Capacitance
Excellent linearity: <0.5 LSB error
Very Simple Digital Interface
Fast adjustments: 5s max incremental change
Eliminates the need for mechanical tuning
Capacitance trimmable from 7.5pF to 14.5pF (single-
ended mode)
Packages:
- MSOP (1.1mm x 3.0mm x 3.0mm)
Applications
Post-trim of low-cost regenerative receivers
Tunable RF stages
Low-cost, Low temperature drift oscillators
Garage door openers
Keyless entry
Industrial wireless control
Capacitive sensor trimming
RFID tags
V
CC
CS
INC
U/D
1
2
3
4
8
7
6
5
N/C
Cm
Vss
Cp
Ordering Information
ORDERING
NUMBER
C
TOTAL
PACKAGE
TEMP
RANGE
(C)
X90100M8I
7.5pF to 14.5pF,
Single Ended
8 Ld MSOP
-40 to +85
X90100M8IT1 7.5pF to 14.5pF,
Single Ended
8 Ld MSOP
Tape and Reel
-40 to +85
Data Sheet
February 2, 2005
2
FN8156.0
February 2, 2005
Block Diagram
Cm
C
PAD
U/D
INC
CS
V
SS
C
PAD
Cp
1*C
U
2*C
U
4*C
U
8*C
U
16*C
U
Logic and E
2
Power On Reset
V
CC
Pin Descriptions
MSOP
SYMBOL
BRIEF DESCRIPTION
1
INC
Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the capacitance value and
either increment or decrement the counter in the direction indicated by the logic level on the U/D input.
2
U/D
Up/Down (U/D). The U/D input controls the direction of the trimmed capacitor value and whether the counter
is incremented or decremented.
3
V
SS
Ground.
4
Cp
Cp. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical
trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance
across the terminals is determined by digital inputs INC, U/D, and CS.
5
Cm
Cm. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical
trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance
across the terminals is determined by digital inputs INC, U/D, and CS.
6
N/C
Not Connected. Must be floating.
7
CS
Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in
nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is
complete the X90100 will be placed in the low power standby mode until the device is selected once again.
8
V
CC
Positive Supply Voltage.
X90100
3
FN8156.0
February 2, 2005
Absolute Maximum Ratings
Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65
C to +135C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C
Voltage on CS, INC, U/D, C
P
, and
C
M
with respect to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V
V = |V
CP
-V
CM
|. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V
Lead temperature (soldering 10 seconds) . . . . . . . . . . . . . . . . 300C
CAUTION: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; the functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Capacitor Specifications
V
CC
= +5V, T
A
= 25C, single ended mode, C
M
= 0V, unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS/NOTES
MIN
TYP
(4)
MAX
UNIT
Absolute accuracy
15
%
V
Cp
C
p
terminal voltage
0
V
CC
V
V
Cm
C
m
terminal voltage
0
V
CC
V
C
Capacitance increments
0.23
pF
C
Capacitance range
7
pF
C
TOTAL
Capacitance at Code=0
7.5
pF
C
TOTAL
Capacitance at Code=31
14.5
pF
Q
Quality factor
(5)
f = 315MHz
7
Resolution
5
bits
INL
Absolute linearity error
(1)
0.15
lsb
DNL
Relative linearity error
(2)
0.15
lsb
TC
1
C
TOTAL
Temperature Coefficient
(5)
Differential Mode
50
ppm/C
V
CC
Supply Voltage
2.7
5.5
V
Notes: (1) Absolute linearity is used to determine actual capacitance versus expected capacitance = C
(n)
(actual) - C
(n)
(expected) = 0.15 Ml.
(2) Relative linearity is a measure of the error in step size between settings = C
(n+1)
-[C
(n)
+ Ml] = 0.15 Ml.
(3) lsb = least significant bit = C
TOT
/31.
(4) Typical values are for T
A
= 25C and nominal supply voltage.
(5) This parameter is not 100% tested.
DC Electrical Specifications
V
CC
= 5V, T
A
= 25C unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP (4)
MAX
UNIT
I
CC1
VCC active current (Increment)
CS = V
IL
, U/D = V
IL
or V
IH
and
INC = 0.4V @ max. t
CYC
50
100
A
I
CC2
VCC active current (Store) (EEPROM
Store)
CS = V
IH
, U/D = V
IL
or V
IH
and
INC = V
IH
@ max. t
WR
250
500
A
I
SB
Standby supply current
CS = V
CC
- 0.3V, U/D and INC = V
SS
or V
CC
- 0.3V
0.5
2
A
I
LI
CS, INC, U/D input leakage current
V
IN
= V
SS
-15
A
V
IH
CS, INC, U/D input HIGH voltage
V
CC
x 0.7
V
CC
+ 0.5
V
V
IL
CS, INC, U/D input LOW voltage
-0.5
V
CC
x 0.1
V
C
IN
(5)
CS, INC, U/D input capacitance
V
CC
= 5V, V
IN
= V
SS
, T
A
= 25C,
f = 1MHz
10
pF
X90100
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FN8156.0
February 2, 2005
AC Timing
Notes: (6) MI in the A.C. timing diagram refers to the minimum incremental change in the C
TOTAL
output due to a change in the counter value.
(7) t
IH
+ t
IL
4s
Endurance and Data Retention
V
CC
= 5V, T
A
= 25C unless otherwise specified
PARAMETER
MIN
UNIT
Minimum endurance
100,000
Data changes per bit
Data retention
100
Years
AC Conditions of Test
Input pulse levels
0V to 3V
Input rise and fall times
10ns
Input reference levels
1.5V
AC Electrical Specifications
V
CC
= 5V, T
A
= 25C unless otherwise specified.
SYMBOL
PARAMETER
MIN
TYP (4)
MAX
UNIT
t
Cl
CS to INC setup
100
ns
t
lD
INC HIGH to U/D change
100
ns
t
DI
U/D to INC setup
100
ns
t
lL
(7)
INC LOW period
1
s
t
lH
(7)
INC HIGH period
1
s
t
lC
INC Inactive to CS inactive
1
s
t
CPHNS
(5)
CS Deselect time (NO STORE)
1
s
t
CPHS
(5)
CS Deselect time (STORE)
10
ms
t
IW
INC to C
TOTAL
change
1
5
s
t
CYC
INC cycle time
4
s
t
R
, t
F
(5)
INC input rise and fall time
500
s
t
PU
(5)
Power up to capacitance stable
5
s
t
R
V
CC
(5)
VCC power-up rate
0.2
50
V/ms
t
WR
(5)
Store cycle
5
10
ms
CS
INC
U/D
C
TOTAL
t
CI
t
IL
t
IH
t
CYC
t
ID
t
IW
MI
(6)
t
IC
t
CPHS
t
F
t
R
10%
90%
90%
(Store)
t
DI
t
CPHNS
X90100
5
FN8156.0
February 2, 2005
Power Up Timing (Digital Inputs Floating, Internal Pullup Action Shown)
Power Up and Down Requirements
There are no restrictions on the power-up or power-down
conditions of V
CC
and the voltages applied to the Cp, Cm
pins provided that V
CC
is always more positive than or equal
to V
Cp
, V
Cm
, i.e., V
CC
V
Cp
, V
Cm
. The V
CC
ramp rate spec
is always in effect.
Powerup Requirements
In order to prevent unwanted tap position changes or an
inadvertant store, bring the CS and INC high before or
concurrently with the V
CC
pin. The logic inputs have internal
active pullups to provide reliable powerup operation. See
powerup timing diagram.
Pin Configuration
Detailed Pin Descriptions
Cp and Cm
The high (Cp) and low (Cm) terminals of the X90100 are
equivalent to the fixed terminals of a mechanical trimmable
capacitor. The minimum dc voltage is V
SS
and the maximum
is V
CC
. The value of capacitance across the terminals is
determined by digital inputs INC, U/D, and CS.
Up/Down (U/D)
The U/D input controls the direction of the trimmed capacitor
value and whether the counter is incremented or
decremented. This pin has an active current source pullup.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the capacitance value and either increment or
decrement the counter in the direction indicated by the logic
level on the U/D input. This pin has an active current source
pullup.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
CS is returned HIGH while the INC input is also HIGH. After
the store operation is complete the X90100 will be placed in
the low power standby mode until the device is selected
once again. This pin has active circuit source pullup.
N/C - This pin should be left floating.
Principles of Operation
There are three sections of the X90100: the input control,
counter and decode section; the nonvolatile memory; and
the capacitor array. The input control section operates just
like an up/down counter. The output of this counter is
decoded to turn on electronic switches connecting internal
units to the sum capacitor. Under the proper conditions the
contents of the counter can be stored in nonvolatile memory
V
CC
CS
INC
U/D
V
CC
= 3.3 or 5.0V
t
R
V
CC
V
CC
CS
INC
U/D
1
2
3
4
8
7
6
5
X90100
MSOP
N/C (leave floating)
Cm
Vss
Cp
Pin Names
SYMBOL
DEFAULT
DESCRIPTION
Cp
output
Positive capacitor terminal
Cm
output
Negative capacitor terminal
VSS
supply
Ground
VCC
supply
Positive supply voltage
U/D
pull up
Up/Down control input
INC
pull up
Increment control input
CS
pull up
Chip Select control input
X90100
6
FN8156.0
February 2, 2005
and retained for future use. The capacitor array is comprised
of 31 individual capacitors connected in parallel. At one end
of each element is an electronic switch that connects it to the
sum.
The capacitor, when at either end of the range, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a "make
before break" mode when the counter changes positions. If
the counter is moved several positions, multiple units are
connected to the total for t
IW
(INC to C
TOTAL
change). The
C
TOTAL
value for the device can temporarily be increased by
a significant amount if the counter is moved several
positions.
When the device is powered-down, the last counter position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the capacitor is set to the value last stored.
Instructions and Programming
The INC, U/D and CS inputs control the movement of the
capacitor total value. With CS set LOW the device is
selected and enabled to respond to the U/D and INC inputs.
HIGH to LOW transitions on INC will increment or decrement
(depending on the state of the U/D input) a five bit counter.
The output of this counter is decoded to select one of thirty
two capacitor combinations for the capacitor array.
The value of the counter is stored in nonvolatile memory
whenever CS transitions HIGH while the INC input is also
HIGH.
The system may select the X90100, move the capacitor
value and deselect the device without having to store the
latest count total in nonvolatile memory. After the count
movement is performed as described above and once the
new position is reached, the system must keep INC LOW
while taking CS HIGH. The new C
TOTAL
value will be
maintained until changed by the system or until a power-
up/down cycle recalled the previously stored data.
This procedure allows the system to always power-up to a
preset value stored in nonvolatile memory; then during
system operation minor adjustments can be made. The
adjustments might be based on user preference, system
parameter changes due to temperature drift, etc.
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the counter up and down until the proper trim is
attained.
Table of Values
Mode Selection
CS
INC
U/D
MODE
L
H
Cap Value Up
L
L
Cap Value Down
H
X
Store Cap Position
H
X
X
Standby Current
L
X
No Store, Return To Standby
L
H
Cap Value Up (not recommended)
L
L
Cap Value Down (not recommended)
Single-Ended Mode
Differential Mode
C
OUT
=
Code
31
7.0 + 7.5 (pF)
0
Code 31
C
OUT
= Code 0.35 + 1.00 (pF)
0
Code 31
C
p
C
m
X90100
X1
X2
Oscillator
Circuit
C
p
C
m
X90100
Oscillator
Circuit
C
p
C
s
Example of a single-ended circuit
Example of a differential mode circuit
X90100
7
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8156.0
February 2, 2005
Packaging Information
0.118 0.002
(3.00 0.05)
0.040 0.002
(1.02 0.05)
0.150 (3.81)
Ref.
0.193 (4.90)
0.030 (0.76)
0.036 (0.91)
0.032 (0.81)
0.007 (0.18)
0.005 (0.13)
0.008 (0.20)
0.004 (0.10)
0.0216 (0.55)
7 Typ.
R 0.014 (0.36)
0.118 0.002
(3.00 0.05)
0.012 + 0.006 / -0.002
(0.30 + 0.15 / -0.05)
0.0256 (0.65) Typ.
8-Lead Miniature Small Outline Gull Wing Package Type M
NOTE:
1. ALL DIMENSIONS IN INCHES AND (MILLIMETERS)
0.220"
0.0256" Typical
0.025"
Typical
0.020"
Typical
8 Places
FOOTPRINT
Ref.
X90100
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ZIP