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1
iP2002
Features:
Output current 30A continuous with no derating up to
T
PCB
= 90C and T
CASE
= 90C
Operating frequency up to 1MHz
Dual sided heatsink capable
Very small 11mm x 11mm x 2.6mm profile
iP2001 footprint compatible
Internal features minimize layout sensitivity *
Optimized for very low power losses
Synchronous Buck
Multiphase Optimized BGA Power Block
Integrated Power Semiconductors, Drivers & Passives
Description
The iP2002 is a fully optimized solution for high current synchronous buck multiphase applications.
Board space and design time are greatly reduced because most of the components required for each
phase of a typical discrete-based multiphase circuit are integrated into a single 11mm x 11mm x 2.6mm
BGA power block. The only additional components required for a complete multiphase converter are a PWM
IC, the external inductors, and the input and output capacitors.
iPOWIR technology offers designers an innovative board space saving solution for applications
requiring high power densities. iPOWIR technology eases design for applications where component
integration offers benefits in performance and functionality. iPOWIR technology solutions are also optimized
internally for layout, heat transfer and component selection.
iP2002 Power Block
03/20/03
PD - 94568A
* All of the difficult PCB layout and bypassing issues have been addressed with the internal design of the iPOWIR Block. There are no concerns about double
pulsing, unwanted shutdown, or other malfunctions which often occur in switching power supplies. The iPOWIR Block will function normally without any
additional input power supply bypass capacitors. However, for reliable long term operation it is recommended that at least four 10uF ceramic input
decoupling capacitors are provided to the V
IN
pin of each power block. No additional bypassing is required on the V
DD
pin.
iP2002 Internal Block Diagram
MOSFET
Driver with
dead time
control
V
IN
V
SW
PGND
PRDY
ENABLE
PWM
V
DD
SGND
MOSFET
Driver with
dead time
control
V
IN
V
SW
PGND
PRDY
ENABLE
PWM
V
DD
SGND
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2
iP2002
All specifications @ 25C (unless otherwise specified)
Measurement were made using four 10uF (TDK C3225X7R1C106M or equiv.) capacitors across the input (see
Fig. 8).
Not associated with the rise and fall times. Does not affect Power Loss (see Fig. 9).
Parameter
Symbol
Min
Typ
Max
Units
Conditions
Supply Voltage
V
DD
4.6
5.0
5.5
V
Input Voltage Range
V
IN
3.0
-
13.2
V
see Figs. 2 & 3
Output Voltage Range
V
OUT
0.9
-
3.3
V
see Figs. 2, 4 & 8
Output Current Range
I
OUT
-
-
30
A
see Fig. 2
Operating Frequency
fsw
150
-
1000
kHz
see Figs. 2 & 5
Operating Duty Cycle
D
-
-
85
%
Recommended Operating Conditions :
Absolute Maximum Ratings :
Electrical Specifications @ V
DD
= 5V (unless otherwise specified) :
Parameter
Symbol
Min
Typ
Max
Units
Conditions
Block Power Loss
P
BLK
-
7.2
8.9
W
V
IN
= 12V, V
OUT
= 1.3V,
Turn On Delay
t
d(on)
-
63
-
I
OUT
= 30A, f
SW
= 1MHz
Turn Off Delay
t
d(off)
-
26
-
V
IN
Quiescent Current
I
Q-VIN
-
-
1.0
mA
Enable = 0V, V
IN
= 12V
V
DD
Quiescent Current
I
Q-VDD
-
-
10
A
Enable = 0V, V
DD
= 5V
Under-Voltage Lockout
UVLO
Start Threshold
V
START
4.2
4.4
4.5
V
Hysteresis
V
Hys-UVLO
-
.05
-
Enable
Enable
Input Voltage High
V
IH
2.0
-
-
V
Input Voltage Low
V
IL
-
-
0.8
Power Ready
PRDY
Logic Level High
V
OH
4.5
4.6
-
V
V
DD
= 4.6V, I
Load
= 10mA
Logic Level Low
V
OL
-
0.1
0.2
V
DD
< UVLO Threshold, I
Load
= 1mA
PWM Input
PWM
Logic Level High
V
OH
2.0
-
-
V
Logic Level Low
V
OL
-
-
0.8
ns
Parameter
Min
Typ
Max
Units
Conditions
V
IN
to PGND
-
-
16
V
V
DD
to SGND
-
-
6.0
V
PWM to SGND
-0.3
-
V
DD
+0.3
V
not to exceed 6.0V
Enable to SGND
-0.3
-
V
DD
+0.3
V
not to exceed 6.0V
Output RMS Current
-
-
30
A
Block Temperature
-40
-
125
C
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3
iP2002
Pin Description Table
Pin Name
Ball Designator
Pin Function
V
DD
A1 A3, B1 B3
Supply voltage for the internal circuitry.
V
IN
A5 A12, B5 B12,
C5 - C10
Input voltage for the DC-DC converter.
PGND
C11, C12, D11, D12, E11,
E12, F6, F7, F12, G6, G7,
G12, H6, H7, H12, J6, J7, J12,
K5 K7, K12, L5, L6, L12,
M5 M7, M12
Power Ground - connection to the ground of
bulk and filter capacitors.
V
SW
D5 D10, E5 E10,
F8 F11, G8 G11,
H8 H11, J8 J11,
K8 K11, L8 L11,
M8 M11
Switching Node - connection to the output
inductor.
SGND
C1 C3, D1 D3, E1 E3
Signal Ground.
ENABLE
F1
When set to logic level high, internal
circuitry of the device is enabled. When set
to logic level low, the PRDY pin is forced
low, the Control and Sychronous switches are
turned off, and the supply current is less than
10A.
PRDY
K1
Power Ready - This pin indicates the status of
ENABLE or V
DD
. This output will be driven
low when ENABLE is logic low or when V
DD
is less than 4.4V (typ.). When ENABLE is
logic high and V
DD
is greater than 4.4V
(typ.), this output is driven high. This output
has a 10mA source and 1mA sink capability.
PWM
H1
TTL-level input signal to MOSFET drivers.
NC
B4, C4, D4, E4, F2 F4, G2
G4, H2 H4, J1, J2 J4, K3,
L1, L2, M1 M4
This pin is not for electrical connection. It
should be attached only to dead copper.
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4
iP2002
Fig. 1: Power Loss vs. Current
Fig. 2: Safe Operating Area (SOA) vs. T
PCB
& T
CASE
0
1
2
3
4
5
6
7
8
9
10
11
0
5
10
15
20
25
30
Output Current (A)
Po
w
e
r
L
o
s
s
(
W
)
V
IN
= 12V
V
OUT
= 1.3V
f
SW
= 1MHz
T
BLK
= 125C
L = 0.30uH
Maximum
Typical
0
10
20
30
40
50
60
70
80
90
100
110
120
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
0
10
20
30
40
50
60
70
80
90
100
110
120
PCB Temperature (C)
O
u
tpu
t
C
u
r
r
ent
(A
)
Safe
Operating
Area
V
IN
= 12V
V
OUT
= 1.3V
f
SW
= 1MHz
L = 0.30uH
Case Temperature (
C)
T
X
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5
iP2002
Fig. 7: I
DD
vs. Frequency
Fig. 5: Normalized Power Loss vs. Frequency
Fig. 3: Normalized Power Loss vs. V
IN
Fig. 4: Normalized Power Loss vs. V
OUT
Typical Performance Curves
Fig. 6: Normalized Power Loss vs. Inductance
0.70
0.75
0.80
0.85
0.90
0.95
1.00
250
300
350
400
450
500
550
600
650
700
750
800
850
900
950
1000
Switching Frequency (kHz)
P
o
wer
Loss
(
N
orm
a
l
i
z
e
d)
-10.5
-8.5
-6.5
-4.5
-2.5
-0.5
S
O
A
T
e
mp
Ad
j
u
st
m
e
nt
(
C)
V
IN
= 12V
V
OUT
= 1.3V
I
OUT
= 30A
L = 0.30uH
T
BLK
= 125C
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.40
3
4
5
6
7
8
9
10
11
12
13
Input Voltage (V)
P
o
w
e
r L
o
s
s
(
N
or
m
a
l
i
z
e
d)
-3.5
-2.5
-1.5
-0.5
0.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
10.5
11.5
12.5
13.5
SOA Tem
p
Adjus
t
ment
(
C)
V
OUT
= 1.3V
I
OUT
= 30A
f
SW
= 1MHz
L = 0.30uH
T
BLK
= 125C
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.25
1.30
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Output Voltage (V)
P
o
w
e
r Los
s
(Norma
l
i
ze
d)
-3.5
-1.5
0.5
2.5
4.5
6.5
8.5
10.5
S
O
A Tem
p
Adj
u
stm
e
nt (C
)
V
IN
= 12V
I
OUT
= 30A
f
SW
= 1MHz
L = 0.30uH
T
BLK
= 125C
0
10
20
30
40
50
60
70
250
300
350
400
450
500
550
600
650
700
750
800
850
900
950
1000
Switching Frequency (kHz)
A
v
er
ag
e
I
DD
(m
A
)
Does not include
PRDY current
T
BLK
= 25C
0.96
0.98
1.00
1.02
1.04
1.06
1.08
1.10
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Output Inductance (uH)
P
o
we
r
Lo
s
s
(
N
or
m
a
l
i
z
e
d
)
-1.1
-0.6
-0.1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
SO
A
Temp
Ad
justm
e
nt (
C
)
V
IN
= 12V
V
OUT
= 1.3V
I
OUT
= 30A
f
SW
= 1MHz
T
BLK
= 125C
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