HALF-BRIDGE DRIVER
Features
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V, 5V and 15V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
High side output in phase with IN input
Logic and power ground +/- 5V offset.
Internal 500ns dead-time, and programmable
up to 5us with one external R
DT
resistor
Lower di/dt gate driver for better noise immunity
The dual function DT/SD pin input turns off both
channels.
Description
The IR21091(S) are high voltage, high speed power
MOSFET and IGBT drivers with dependant high and
low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge-
dized monolithic construction. The logic input is
Packages
8 Lead PDIP
IR21091
(S)
Preliminary Data Sheet No. PD60191-A
8 Lead SOIC
V
OFFSET
600V max.
I
O
+/-
120 mA / 250 mA
V
OUT
10 - 20V
ton/off (typ.)
680 & 170 ns
Dead time
500 ns
(programmable up to 5uS)
Product Summary
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1
Typical Connection
IR21091(S)
V
CC
V
B
V
S
HO
LO
COM
IN
DT/SD
SD
IN
up to 600V
TO
LOAD
V
CC
compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high
pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to
drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
(Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections
only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
IR21091
(S)
2
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Symbol
Definition
Min.
Max.
Units
V
B
High side floating absolute voltage
-0.3
625
V
S
High side floating supply offset voltage
V
B
- 25
V
B
+ 0.3
V
HO
High side floating output voltage
V
S
- 0.3
V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage
-0.3
25
V
LO
Low side output voltage
-0.3
V
CC
+ 0.3
DT/SD
Programmable dead-time and shut-down pin voltage
V
SS
- 0.3
V
CC
+ 0.3
V
IN
Logic input voltage
V
SS
- 0.3
V
CC
+ 0.3
dV
S
/dt
Allowable offset supply voltage transient
--
50
V/ns
P
D
Package power dissipation @ T
A
+25C
(8 Lead PDIP)
--
1.0
(8 Lead SOIC)
--
0.625
Rth
JA
Thermal resistance, junction to ambient
(8 Lead PDIP)
--
125
(8 Lead SOIC)
--
200
T
J
Junction temperature
--
150
T
S
Storage temperature
-50
150
T
L
Lead temperature (soldering, 10 seconds)
--
300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
V
C/W
W
C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS.
(Please refer to the Design Tip
DT97-3 for more details).
VB
High side floating supply absolute voltage
V
S
+ 10
V
S
+ 20
V
S
High side floating supply offset voltage
Note 1
600
V
HO
High side floating output voltage
V
S
V
B
V
CC
Low side and logic fixed supply voltage
10
20
V
LO
Low side output voltage
0
V
CC
V
IN
Logic input voltage
V
SS
V
CC
DT/SD
Programmable dead-time and shut-down pin voltage
V
SS
V
CC
T
A
Ambient temperature
-40
125
C
Symbol
Definition
Min.
Max.
Units
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating are tested with all supplies biased at 15V differential.
V
IR21091
(S)
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3
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, DT= V
SS
and T
A
= 25C unless otherwise specified. The V
IL
, V
IH
and I
IN
parameters are
referenced to V
SS
/COM and are applicable to the respective input leads: IN and DT. The V
O
, I
O
and Ron parameters are
referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
V
IH
Logic "1" input voltage for HO & logic "0" for LO
2.9
--
--
V
CC
= 10V to 20V
V
IL
Logic "0" input voltage for HO & logic "1" for LO
--
--
0.8
V
CC
= 10V to 20V
V
SD,TH
DT/SD pin shutdown input threshold
2.9
--
--
V
OH
High level output voltage, V
BIAS
- V
O
--
0.8
1.4
I
O
= 20 mA
V
OL
Low level output voltage, V
O
--
0.3
0.6
I
O
= 20 mA
I
LK
Offset supply leakage current
--
--
50
V
B
= V
S
= 600V
I
QBS
Quiescent V
BS
supply current
20
60
150
V
IN
= 0V or 5V
I
QCC
Quiescent V
CC
supply current
0.4
1.0
1.6
mA
V
IN
= 0V or 5V
RDT = 0
I
IN+
Logic "1" input bias current
--
5
20
IN = 5V, SD = 0V
I
IN-
Logic "0" input bias current
--
1
2
IN = 0V, SD = 5V
V
CCUV+
V
CC
and V
BS
supply undervoltage positive going
8.0
8.9
9.8
V
BSUV+
threshold
V
CCUV-
V
CC
and V
BS
supply undervoltage negative going
7.4
8.2
9.0
V
BSUV-
threshold
V
CCUVH
Hysteresis
0.3
0.7
--
V
BSUVH
I
O+
Output high short circuit pulsed vurrent
120
200
--
V
O
= 0V, PW
10 s
I
O-
Output low short circuit pulsed current
250
350
--
V
O
=15V,PW
10 s
V
V
A
A
mA
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF, T
A
= 25C, DT = VSS unless otherwise specified.
Symbol
Definition
Min. Typ.
Max. Units Test Conditions
ton
Turn-on propagation delay
--
750
950
V
S
= 0V
toff
Turn-off propagation delay
--
200
280
V
S
= 0V or 600V
MT
Delay matching, HS & LS turn-on/off
--
0
70
tr
Turn-on rise time
--
150
220
V
S
= 0V
tf
Turn-off fall time
--
50
80
V
S
= 0V
DT
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
400
540
680
RDT= 0
HO turn-off to LO turn-on (DT
HO-LO)
4
5
6
usec
RDT = 200k
MDT
Deadtime matching = DT
LO - HO
- DT
HO-LO
--
0
60
RDT=0
--
0
600
RDT = 200k
tsd
Shut down propagation delay
--
--
--
nsec
nsec
IR21091
(S)
4
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Functional Block Diagrams
UV
DETECT
DELAY
COM
LO
VCC
IN
VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
DEADTIME
DT/SD
IR21091(S)
IR21091
(S)
www.irf.com
5
Lead Definitions
Symbol Description
IN
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO
DT/SD
Programmable dead-time lead, referenced to VSS. Disables input/output logic when tied to VCC
V
B
High side floating supply
HO
High side gate drive output
V
S
High side floating supply return
V
CC
Low side and logic fixed supply
LO
Low side gate drive output
COM
Low side return
Lead Assignments
8 Lead PDIP
8 Lead SOIC
IR21091
IR21091(S)
1
2
3
4
8
7
6
5
VCC
IN
DT/SD
COM
VB
HO
VS
LO
1
2
3
4
8
7
6
5
VCC
IN
DT/SD
COM
VB
HO
VS
LO
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