IRLR/U3303
HEXFET
Power MOSFET
S
D
G
Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case
2.2
R
JA
Case-to-Ambient (PCB mount)**
50
C/W
R
JA
Junction-to-Ambient
110
Thermal Resistance
V
DSS
= 30V
R
DS(on)
= 0.031
I
D
= 35A
Description
9/28/98
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1
D -P ak
T O -252 A A
I-P ak
T O -25 1A A
l
Logic-Level Gate Drive
l
Ultra Low On-Resistance
l
Surface Mount (IRLR3303)
l
Straight Lead (IRLU3303)
l
Advanced Process Technology
l
Fast Switching
l
Fully Avalanche Rated
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve the lowest possible on-resistance per
silicon area. This benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using vapor phase, infrared, or
wave soldering techniques. The straight lead version (IRFU series) is for
through-hole mounting applications. Power dissipation levels up to 1.5 watts
are possible in typical surface mount applications.
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
Parameter
Max.
Units
I
D
@ T
C
= 25C
Continuous Drain Current, V
GS
@ 10V
35
I
D
@ T
C
= 100C
Continuous Drain Current, V
GS
@ 10V
25
A
I
DM
Pulsed Drain Current
140
P
D
@T
C
= 25C
Power Dissipation
68
W
Linear Derating Factor
0.45
W/C
V
GS
Gate-to-Source Voltage
16
V
E
AS
Single Pulse Avalanche Energy
130
mJ
I
AR
Avalanche Current
20
A
E
AR
Repetitive Avalanche Energy
6.8
mJ
dv/dt
Peak Diode Recovery dv/dt
5.0
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
C
Absolute Maximum Ratings
PD- 91316F
IRLR/U3303
2
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S
D
G
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
1.3
V
T
J
= 25C, I
S
= 20A, V
GS
= 0V
t
rr
Reverse Recovery Time
72
110
ns
T
J
= 25C, I
F
= 20A
Q
rr
Reverse RecoveryCharge
180
280
nC
di/dt = 100A/s
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Source-Drain Ratings and Characteristics
35
140
A
V
DD
= 15V, starting T
J
= 25C, L =470H
R
G
= 25
, I
AS
= 20A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width
300s; duty cycle
2%.
This is applied for I-PAK, L
S
of D-PAK is measured between
lead and center of die contact.
Uses IRL3303 data and test conditions.
I
SD
20A, di/dt
140A/s, V
DD
V
(BR)DSS
,
T
J
175C
Notes:
Caculated continuous current based on maximum allowable
junction temperature; Package limitation current = 20A.
Parameter
Min.
Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
30
V
V
GS
= 0V, I
D
= 250A
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
0.035
V/C
Reference to 25C, I
D
= 1mA
0.031
V
GS
= 10V, I
D
= 21A
0.045
V
GS
= 4.5V, I
D
= 17A
V
GS(th)
Gate Threshold Voltage
1.0
V
V
DS
= V
GS
, I
D
= 250A
g
fs
Forward Transconductance
12
S
V
DS
= 25V, I
D
= 20A
25
A
V
DS
= 30V, V
GS
= 0V
250
V
DS
= 24V, V
GS
= 0V, T
J
= 150C
Gate-to-Source Forward Leakage
100
nA
V
GS
= 16V
Gate-to-Source Reverse Leakage
-100
V
GS
= -16V
Q
g
Total Gate Charge
26
I
D
= 20A
Q
gs
Gate-to-Source Charge
8.8
nC
V
DS
= 24V
Q
gd
Gate-to-Drain ("Miller") Charge
15
V
GS
= 4.5V, See Fig. 6 and 13
t
d(on)
Turn-On Delay Time
7.4
V
DD
= 15V
t
r
Rise Time
200
ns
I
D
= 20A
t
d(off)
Turn-Off Delay Time
14
R
G
= 6.5
,
V
GS
= 4.5V
t
f
Fall Time
36
R
D
= 0.70
,
See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
C
iss
Input Capacitance
870
V
GS
= 0V
C
oss
Output Capacitance
340
pF
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
170
= 1.0MHz, See Fig. 5
Electrical Characteristics @ T
J
= 25C (unless otherwise specified)
nH
I
GSS
S
D
G
L
S
Internal Source Inductance
7.5
R
DS(on)
Static Drain-to-Source On-Resistance
L
D
Internal Drain Inductance
4.5
I
DSS
Drain-to-Source Leakage Current
IRLR/U3303
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3
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
1 0
1 0 0
1 0 0 0
0.1
1
1 0
1 0 0
I
,
D
r
ai
n-
t
o
-
S
our
c
e
C
u
r
r
e
nt
(
A
)
D
V , D rain-to-S ource V olta ge (V )
D S
A
2 0 s P U LS E W ID TH
T = 25 C
J
VGS
TO P 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOT TOM 2.5V
2.5V
0.1
1
1 0
1 0 0
1 0 0 0
0.1
1
1 0
1 0 0
I
, D
r
a
i
n
-
to
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
D
V , D rain-to-S ource V oltage (V )
D S
A
2 0 s P U LS E W ID T H
T = 1 75 C
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2 .5V
J
0 . 1
1
1 0
1 0 0
1 0 0 0
2
3
4
5
6
7
8
9
1 0
T = 2 5 C
J
G S
V , G ate -to -S o urce V olta ge (V )
D
I
,
D
r
a
i
n
-
t
o
-
S
o
u
rc
e
C
u
rre
n
t
(A
)
T = 1 75 C
J
A
V = 1 5V
2 0 s P U L S E W ID TH
DS
0 . 0
0 . 5
1 . 0
1 . 5
2 . 0
- 6 0
- 4 0
- 2 0
0
2 0
4 0
6 0
8 0
1 0 0 1 2 0 1 4 0 1 6 0 1 8 0
J
T , Junction T em perature (C )
R
, D
r
a
i
n
-
to
-
S
o
u
r
c
e
O
n
R
e
s
i
s
ta
n
c
e
D
S
(
on)
(N
o
r
m
a
l
i
z
e
d
)
V = 10 V
G S
A
I = 3 4A
D
IRLR/U3303
4
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Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
2 0 0
4 0 0
6 0 0
8 0 0
1 0 0 0
1 2 0 0
1 4 0 0
1 6 0 0
1
1 0
1 0 0
C,
Ca
p
a
c
i
t
a
n
c
e
(
p
F
)
D S
V , D rain-to-S ou rce V o ltage (V )
A
V = 0V , f = 1M H z
C = C + C , C S H O R T E D
C = C
C = C + C
G S
is s g s g d d s
rs s g d
o ss d s gd
C
is s
C
os s
C
rs s
0
3
6
9
1 2
1 5
0
1 0
2 0
3 0
4 0
Q , T otal G ate C harge (nC )
G
V
, G
a
te
-
t
o
-
S
o
u
r
c
e
V
o
l
t
a
g
e
(
V
)
GS
A
F O R T E S T C IR C U IT
S E E F IG U R E 1 3
V = 24 V
V = 15 V
I = 2 0A
D S
D S
D
Fig 8. Maximum Safe Operating
Area
1
1 0
1 0 0
1 0 0 0
1
1 0
1 0 0
V , D rain-to-S ource V oltage (V )
D S
I
,
Dr
ai
n
C
u
r
r
e
nt
(
A
)
O P E R A T IO N IN T H IS A R E A L IM ITE D
B Y R
D
D S (o n)
1 0 0 s
1 m s
1 0 m s
A
T = 25 C
T = 17 5C
S ing le P u ls e
C
J
1 0 s
1
1 0
1 0 0
1 0 0 0
0 . 0
0 . 5
1 . 0
1 . 5
2 . 0
2 . 5
T = 25 C
J
V = 0V
G S
V , S o urc e-to -D ra in V o lta ge (V )
I , R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
S D
SD
A
T = 17 5C
J
IRLR/U3303
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5
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
V
DS
Pulse Width
1
s
Duty Factor
0.1 %
R
D
V
GS
R
G
D.U.T.
4.5V
+
-
V
DD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
Notes:
1. Duty factor D = t / t
2. Peak T = P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response
(Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25
50
75
100
125
150
175
0
5
10
15
20
25
30
35
T , Case Temperature ( C)
I , Drain Current (A)
C
D
LIMITED BY PACKAGE
IRLR/U3303
6
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Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T.
V
DS
I
D
I
G
3mA
V
GS
.3
F
50K
.2
F
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(B R )D SS
I
A S
R G
I
A S
0 .0 1
tp
D .U .T
L
V D S
+
-
VD D
D R IV E R
A
1 5 V
2 0 V
0
5 0
1 0 0
1 5 0
2 0 0
2 5 0
3 0 0
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
1 7 5
J
E
, S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
AS
A
S tarting T , J unc tion T em perature (C )
V = 15 V
I
T O P 8.3 A
14 A
B O T TO M 2 0A
D D
D
IRLR/U3303
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7
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple
5%
Body Diode
Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
*
V
GS
= 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
R
G
V
DD
dv/dt controlled by R
G
Driver same type as D.U.T.
I
SD
controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
*
IRLR/U3303
8
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Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
TO-252AA (D-PARK)
Part Marking Information
6 .7 3 (.2 6 5 )
6 .3 5 (.2 5 0 )
- A -
4
1 2 3
6 .2 2 (.2 4 5 )
5 .9 7 (.2 3 5 )
- B -
3 X
0 .8 9 (.0 3 5 )
0 .6 4 (.0 2 5 )
0 .2 5 ( .0 1 0 ) M A M B
4 .5 7 ( .1 8 0 )
2 .2 8 ( .0 9 0 )
2 X
1 .1 4 (.0 4 5 )
0 .7 6 (.0 3 0 )
1 .5 2 ( .0 6 0 )
1 .1 5 ( .0 4 5 )
1.0 2 (.0 4 0 )
1.6 4 (.0 2 5 )
5 .4 6 (.2 1 5 )
5 .2 1 (.2 0 5 )
1 .2 7 (.0 5 0 )
0 .8 8 (.0 3 5 )
2 .3 8 (.0 9 4 )
2 .1 9 (.0 8 6 )
1 .1 4 (.0 4 5 )
0 .8 9 (.0 3 5 )
0 .5 8 (.0 2 3 )
0 .4 6 (.0 1 8 )
6 .4 5 (.2 4 5 )
5 .6 8 (.2 2 4 )
0 .5 1 (.0 2 0 )
M IN .
0 .5 8 ( .0 2 3 )
0 .4 6 ( .0 1 8 )
L E A D A S S IG N M E N T S
1 - G A T E
2 - D R A IN
3 - S O U R C E
4 - D R A IN
1 0 .4 2 (.4 1 0 )
9 .4 0 (.3 7 0 )
N O T E S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
2 C O N T R O L L IN G D IM E N S IO N : IN C H .
3 C O N F O R M S T O J E D E C O U T L IN E T O - 2 5 2 A A .
4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP ,
S O L D E R D IP M A X. + 0 .1 6 (.0 0 6 ) .
IN TE R N A TIO N A L
RE CTIFIE R
LO G O
A S S E M B LY
L O T C OD E
E XA M P LE : TH IS IS A N IR FR 120
W ITH A S S E M B LY
LO T C OD E 9U 1P
FIR S T P O R TIO N
OF P A R T N U MB E R
S E C O ND P O R TIO N
O F P A R T NU M B E R
120
IR FR
9U 1P
A
IRLR/U3303
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9
Package Outline
TO-251AA Outline
Dimensions are shown in millimeters (inches)
TO-251AA (I-PARK)
Part Marking Information
6 .7 3 (.26 5 )
6 .3 5 (.25 0 )
- A -
6 .2 2 ( .2 4 5 )
5 .9 7 ( .2 3 5 )
- B -
3 X
0 .8 9 (.0 35 )
0 .6 4 (.0 25 )
0 .2 5 (.0 1 0 ) M A M B
2 .28 (.0 9 0 )
1 .1 4 (.0 45 )
0 .7 6 (.0 30 )
5 .4 6 (.2 1 5 )
5 .2 1 (.2 0 5 )
1 .2 7 ( .0 5 0 )
0 .8 8 ( .0 3 5 )
2 .3 8 (.0 9 4 )
2 .1 9 (.0 8 6 )
1 .1 4 ( .0 4 5 )
0 .8 9 ( .0 3 5 )
0 .5 8 (.0 2 3 )
0 .4 6 (.0 1 8 )
L E A D A S S IG N M E N T S
1 - G A T E
2 - D R A IN
3 - S O U R C E
4 - D R A IN
N O T E S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5M , 19 8 2 .
2 C O N T R O L L IN G D IM E N S IO N : IN C H .
3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A .
4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP ,
S O L D E R D IP M A X. + 0.1 6 (.0 0 6 ).
9 .6 5 ( .3 8 0 )
8 .8 9 ( .3 5 0 )
2 X
3 X
2.2 8 (.0 9 0)
1.9 1 (.0 7 5)
1 .5 2 (.0 6 0 )
1 .1 5 (.0 4 5 )
4
1 2 3
6 .4 5 (.2 4 5 )
5 .6 8 (.2 2 4 )
0 .5 8 (.0 2 3 )
0 .4 6 (.0 1 8 )
IN TE RN A TION A L
R E C TIFIE R
LO GO
A S S E MB L Y
LO T C O D E
FIR S T P O RTION
O F P A R T N U M B E R
S E C O N D P O R TIO N
O F P A R T N U MB E R
12 0
9 U 1P
E XA M P LE : TH IS IS A N IR FU 12 0
W ITH A S S E M B LY
LO T C O D E 9U 1 P
IR FU
IRLR/U3303
10
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Tape & Reel Information
TO-252AA
Dimensions are shown in millimeters (inches)
T R
1 6.3 ( .641 )
1 5.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12 .1 ( .4 76 )
11 .9 ( .4 69 )
F E E D D IR E C T IO N
F E E D D IR E C T IO N
16 .3 ( .641 )
15 .7 ( .619 )
T R R
T R L
N O T E S :
1. C O N T R O LL IN G D IM E N S IO N : M ILLIM E T E R .
2. A LL D IM E N S IO N S A R E S H O W N IN M ILL IM E T E R S ( IN C H E S ).
3. O U T L IN E C O N F O R M S T O E IA -4 81 & E IA -54 1.
N O T E S :
1. O U T LIN E C O N F O R M S T O E IA -481 .
16 m m
13 IN C H
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
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http://www.irf.com/ Data and specifications subject to change without notice. 9/98
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