Äîêóìåíòàöèÿ è îïèñàíèÿ www.docs.chipfind.ru

IRU3013

Rev. 1.2
09/06/01

TYPICAL APPLICATION

DESCRIPTION

The IRU3013 controller IC is specifically designed for
Intel Pentium III

microprocessor applications as de-

scribed in the VRM 8.5 specification. The IC provides
a single chip solution for the Vcore, 1.2V AGTL+,
1.8V and a third uncommitted LDO controller that
can be used either as 1.2V power good detector or
to provide 1.5V AGP bus in applications that this
voltage is required. The IRU3013 features a patented
topology that, in combination with a few external com-
ponents, (*Note: See application current in figure 3) will
provide in excess of 30A of output current for an on-
board Vcore synchronous converter while automatically
providing the output voltage specified in VRM 8.5 speci-
fication. The IRU3013 also features, loss-less current
sensing by using the R

DS(ON)

of the high side Power

MOSFET as the sensing resistor, a Power Good win-
dow comparator that switches its open collector output
low when the output is outside of a

10% window. Other

features of the device are: Under-voltage lockout for both
5V and 12V supplies, an external programmable soft-
start function, and the ability to program the oscillator
frequency by connecting an external capacitor.

Meets Latest VRM 8.5 Specification
Provides Single Chip Solution for Vcore, 1.2V AGTL+,
1.8V and V

DDQ

On-Board 5-Bit DAC and Decoder programs the out-
put voltage from 1.050V to 1.825V
Loss-less Short Circuit Protection
Synchronous operation allows maximum efficiency
Patented architecture allows fixed frequency opera-
tion as well as 100% duty cycle when operating with
a changing load
Minimum Part Count, No External Compensation
Soft-Start
High current totem pole driver for directly driving an
external Power MOSFET
Power Good Function

PACKAGE ORDER INFORMATION

FEATURES

VRM 8.5 COMPATIBLE

5-BIT PROGRAMMABLE SYNCHRONOUS BUCK

CONTROLLER IC WITH TRIPLE LDO CONTROLLER

Pentium III with VRM 8.5 Specification
DC to DC Converters

Note: Pentium III is trade mark of Intel Corp.

(°C) DEVICE PACKAGE

0 To 70 IRU3013CW 24-Pin Plastic SOIC WB
0 To 70 IRU3013CQ 24-Pin Plastic QSOP

APPLICATIONS

Data Sheet No. PD94249

Figure 1 - Typical application of IRU3013.

LINEAR

CONTROL

LINEAR

CONTROL

SWITCHER

CONTROL

IRU3013

OUT

LINEAR

CONTROL

OUT

3.3V

VRM 8.5 VID

Rev. 1.2

09/06/01

IRU3013

ELECTRICAL SPECIFICATIONS

Unless otherwise specified, these specifications apply over V12=12V, V5=5V and T

=0 to 70°C. Typical values refer

to T

=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient

temperature.

ABSOLUTE MAXIMUM RATINGS

V5 Supply Voltage .................................................... 10V
V12 Supply Voltage .................................................. 20V
All Other Pins .......................................................... 7V
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 125°C

PACKAGE INFORMATION

24-PIN WIDE BODY PLASTIC SOIC (W) 24-PIN PLASTIC QSOP (Q)

PARAMETER

SYM TEST CONDITION

MIN TYP MAX

UNITS

=80

C/W

=88

C/W

VID Section
DAC Output Voltage (Note 1)
DAC Output Line Regulation

DAC Output Temp Variation
VID Input LO
VID Input HI
VID Input Internal Pull-up
Resistor to 5V
Power Good Section
Under-Voltage Lower Trip Point
Under-Voltage Upper Trip Point
UV Hysteresis
Over-Voltage Upper Trip Point
Over-Voltage Lower Trip Point
OV Hysterises
Power Good Output LO
Power Good Output HI
Soft-Start Section
Soft-Start Current

4.5<Vcc<5.5
10.5<V12<13V

OUT

Ramping Down

OUT

Ramping Up

OUT

Ramping Up

OUT

Ramping Down

= 3mA

= 5K Pull-Up to 5V

CS+ = 0V, CS- = 5V

0.98Vs

0.2
0.5

0.90Vs
0.92Vs
0.02Vs
1.10Vs
1.08Vs
0.02Vs

0.3

4.95

1.02Vs

0.4

%
%

V
V

V
V
V
V
V
V
V
V

µA

TOP VIEW

Lin2

D25

Lin4

V12

LDrv

Lin1

OVP

PGd

CS-

CS+

HDrv

PGnd

Gnd

TOP VIEW

Lin2

D25

Lin4

V12

LDrv

Lin1

OVP

PGd

CS-

CS+

HDrv

PGnd

Gnd

IRU3013

Rev. 1.2
09/06/01

Table 1 - Set point voltage vs. VID codes.

PARAMETER

SYM TEST CONDITION

MIN TYP MAX

UNITS

UVLO Section
UVLO Threshold - 12V
UVLO Hysteresis - 12V
UVLO Threshold - 5V
UVLO Hysteresis - 5V
Error Comparator Section
Input Offset Voltage
Delay to Output
Current Limit Section
CS Threshold Set Current
CS Comp Offset Voltage
Hiccup Duty Cycle
Supply Current Section
Operating Supply Current

Output Drivers Section
Rise Time
Fall Time
Dead Band Time
Oscillator Section
Osc Frequency
Osc Valley
Osc Peak
LDO Controller Section
V

1 and V

2 (Pins 3 and 4)

4 (Pin 15)

Input Bias Current
Lin 1, 2, 3 Drive Current
OVP Section
OVP Threshold
OVP Source Current

Supply Ramping Up

DIFF

= 10mV

Css = 0.1µF

= 3000pF

V5
V12

= 3000pF

Ct = 150pF

-2

120

-5

0.5

0.3

150

20
14

70
70

200

220

1.200
0.800

1.17Vs

100

200

100
130

0.2

V
V
V
V

µA

ns
ns
ns

KHz

V
V

µA

Note: Vs refers to the set point voltage given in table 1.

D25

0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0

1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0

1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0

1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0

1.300
1.350
1.400
1.450
1.500
1.550
1.600
1.650
1.700
1.750
1.800
1.050
1.100
1.150
2.200
2.250

D25

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0

1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0

1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0

1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0

1.325
1.375
1.425
1.475
1.525
1.575
1.625
1.675
1.725
1.775
1.825
1.075
1.125
1.175
1.225
1.275

Rev. 1.2

09/06/01

IRU3013

PIN DESCRIPTIONS

This pin programs the oscillator frequency in the range of 50 KHz to 500KHz by means of
an external capacitor connected from this pin to the ground.
Controls the gate of an external MOSFET for the AGTL+ linear regulator or 1.8V supply.
This pin provides the feedback for the linear regulator that its output drive is Lin1 pin.
This pin provides the feedback for the linear regulator that its output drive is Lin2 pin.
5V supply voltage.
This pin provides an over voltage flag when the feedback pin V

3 voltage exceeds 17%(Typi-

cal) of the set point for the Vcore output.
This pin is an open collector output that switches LO when the output of the converter is
not within

10% (typ) of the nominal output voltage. When PGd pin switches LO the

output saturation voltage is less than 0.4V at 3mA.
This pin is connected to the Source of the power MOSFET for the Core supply and it is
the negative input for the internal current sensing circuitry.
This pin is connected to the Drain of the power MOSFET of the Core supply. It provides the
positive sensing input for the internal current sensing circuitry. An external resistor pro-
grams the CS threshold depending on the R

of the power MOSFET. An external capaci-

tor is placed in parallel with the programming resistor to provide high frequency noise
filtering.
Output driver for the high side power MOSFET.
This is the power ground pin and must be connected directly to the gnd plane close to the
source of the synchronous MOSFET. A high frequency capacitor (typically 1µF) must be
connected from V12 pin to this pin for noise free operation.
This pin must be connected directly to the ground plane. A high frequency capacitor (0.1
to 1µF) must be connected from V5 and V12 pins to this pin for noise free operation.
Output driver for the power MOSFET, which is used as a synchronous switched rectifier.
This pin is connected to the 12V supply and serves as the power Vcc pin for the output
drivers. A high frequency capacitor (0.1 to 1µF) must be connected directly from this pin
to Gnd pin in order to supply large instantaneous current pulses to the power MOSFET
during the transitions.
This pin provides the feedback for the linear regulator that its output drive is Lin4 pin.
This pin controls the gate of an external MOSFET for either the AGP Bus linear regulator
or can be used as Power good detector for 1.2V AGTL+ bus.
This pin provides the soft-start for the switching regulator. An internal current source
charges an external capacitor that is connected from this pin to the ground which ramps
up the outputs of the switching regulator, preventing the outputs from overshooting as well
as limiting the inrush current. The second function of the Soft-Start cap is to provide long
off time (HICCUP) for the synchronous MOSFET during current limiting.
This pin is connected directly to the output of the Core supply to provide feedback to the
Error comparator.
This pin programs the output voltage in 25mV steps based on the VID table. 40K internal
pull-up to Vcc.
MSB input to the DAC that programs the output voltage. This pin can be pulled-up exter-
nally by a 10K resistor to either 3.3V or 5V supply. 40K internal pull-up to Vcc.
Input to the DAC that programs the output voltage. This pin can be pulled-up externally by
a 10K resistor to either 3.3V or 5V supply. 40K internal pull-up to Vcc.
Input to the DAC that programs the output voltage. This pin can be pulled-up externally by
a 10K resistor to either 3.3V or 5V supply. 40K internal pull-up to Vcc.
LSB input to the DAC that programs the output voltage. This pin can be pulled-up exter-
nally by a 10K resistor to either 3.3V or 5V supply. 40K internal pull-up to Vcc.
Controls the gate of an external MOSFET for the AGTL+ linear regulator or 1.8V supply.

PIN# PIN SYMBOL PIN DESCRIPTION

2
3
4
5
6

13
14

15
16

Lin1

OVP

PGd

CS-

CS+

HDrv

PGnd

Gnd

LDrv

V12

Lin4

D25

Lin2

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: IRU3013

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: IRU3013