IS61C1024
IS61C1024L

128K x 8 HIGH-SPEED
CMOS STATIC RAM

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.

DESCRIPTION

The

ISSI

IS61C1024 and IS61C1024L are very high-speed,

low power, 131,072-word by 8-bit CMOS static RAMs. They
are fabricated using

ISSI's high-performance CMOS

technology. This highly reliable process coupled with innovative
circuit design techniques, yields higher performance and low
power consumption devices.

When

CE1

is HIGH or CE2 is LOW (deselected), the device

assumes a standby mode at which the power dissipation can
be reduced by using CMOS input levels.

Easy memory expansion is provided by using two Chip Enable
inputs,

CE1

and CE2. The active LOW Write Enable (

)

controls both writing and reading of the memory.

The IS61C1024 and IS61C1024L are available in 32-pin
300-mil SOJ, and TSOP (Type I, 8x20), and sTSOP (Type I,
8 x 13.4) packages.

FUNCTIONAL BLOCK DIAGRAM

A0-A16

CE1

512 x 2048

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

VCC

I/O

DATA

CIRCUIT

I/O0-I/O7

CE2

FEATURES

· High-speed access time: 12, 15, 20, 25 ns

· Low active power: 600 mW (typical)

· Low standby power: 500

W (typical) CMOS

standby

· Output Enable (

) and two Chip Enable

(

CE1

and CE2) inputs for ease in applications

· Fully static operation: no clock or refresh

required

· TTL compatible inputs and outputs

· Single 5V (

10%) power supply

· Low power version available: IS61C1024L

· Commercial and industrial temperature ranges

available

MAY 1999

ISSI

Integrated Silicon Solution, Inc. -- 1-800-379-4774

SR028-1K
05/12/99

IS61C1024
IS61C1024L

Integrated Silicon Solution, Inc. -- 1-800-379-4774

SR028-1J

11/03/98

ISSI

TRUTH TABLE

Mode

CE1

CE2

I/O Operation

Vcc Current

Not Selected

High-Z

, I

(Power-down)

High-Z

, I

Output Disabled H

High-Z

, I

Read

OUT

, I

Write

, I

A16

A14

A12

I/O0

I/O1

I/O2

GND

VCC

A15

CE2

A13

A11

A10

CE1

I/O7

I/O6

I/O5

I/O4

I/O3

PIN CONFIGURATION

32-Pin SOJ

PIN DESCRIPTIONS

A0-A16

Address Inputs

CE1

Chip Enable 1 Input

CE2

Chip Enable 2 Input

Output Enable Input

Write Enable Input

I/O0-I/O7

Input/Output

Vcc

Power

GND

Ground

OPERATING RANGE

Range

Ambient Temperature

Commercial

C to +70

10%

Industrial

C to +85

10%

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

A11

A9
A8

A13

CE2

A15

VCC

A16
A14
A12

A7
A6
A5
A4

OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3

PIN CONFIGURATION

32-Pin TSOP (Type 1) (T) and sTSOP (Type 1) (H)

IS61C1024
IS61C1024L

Integrated Silicon Solution, Inc. -- 1-800-379-4774

SR028-1K
05/12/99

ISSI

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol

Parameter

Value

Unit

TERM

Terminal Voltage with Respect to GND

0.5 to +7.0

BIAS

Temperature Under Bias

55 to +125

STG

Storage Temperature

65 to +150

Power Dissipation

1.5

OUT

DC Output Current (LOW)

Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

CAPACITANCE

(1,2)

Symbol

Parameter

Conditions

Max.

Unit

Input Capacitance

= 0V

OUT

Output Capacitance

OUT

= 0V

Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T

= 25

C, f = 1 MHz, Vcc = 5.0V.

DC ELECTRICAL CHARACTERISTICS

(Over Operating Range)

Symbol Parameter

Test Conditions

Min.

Max.

Unit

Output HIGH Voltage

= Min., I

= 4.0 mA

2.4

Output LOW Voltage

= Min., I

= 8.0 mA

0.4

Input HIGH Voltage

2.2

+ 0.5

Input LOW Voltage

(1)

0.3

0.8

Input Leakage

GND

Com.

Ind.

Output Leakage

GND

OUT

Com.

Outputs Disabled

Ind.

Note:
1. V

= 3.0V for pulse width less than 10 ns.

IS61C1024
IS61C1024L

Integrated Silicon Solution, Inc. -- 1-800-379-4774

SR028-1J

11/03/98

ISSI

IS61C1024 POWER SUPPLY CHARACTERISTICS

(1)

(Over Operating Range)

-12 ns

-15 ns

-20 ns

-25 ns

Symbol Parameter

Test Conditions

Min. Max.

Unit

Vcc Operating

= V

MAX

= V

Com.

Supply Current

OUT

= 0 mA, f = 0

Ind.

110

Vcc Dynamic Operating

= V

MAX

= V

Com.

170

160

150

140

Supply Current

OUT

= 0 mA, f = f

MAX

Ind.

180

170

160

150

TTL Standby Current

= V

MAX

Com.

(TTL Inputs)

= V

or V

Ind.

CE1

, f = 0 or

CE2

, f = 0

CMOS Standby

= V

MAX

Com.

Current (CMOS Inputs)

CE1

0.2V,

Ind.

CE2

0.2V

> V

0.2V, or

0.2V, f = 0

Note:
1. At f = f

MAX

, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

IS61C1024L POWER SUPPLY CHARACTERISTICS

(1)

(Over Operating Range)

-15 ns

-20 ns

-25 ns

Symbol Parameter

Test Conditions

Min. Max.

Unit

Vcc Operating

= V

MAX

= V

Com.

Supply Current

OUT

= 0 mA, f = 0

Ind.

110

Vcc Dynamic Operating

= V

MAX

= V

Com.

160

150

140

Supply Current

OUT

= 0 mA, f = f

MAX

Ind.

170

160

150

TTL Standby Current

= V

MAX

Com.

(TTL Inputs)

= V

or V

Ind.

CE1

, f = 0 or

CE2

, f = 0

CMOS Standby

= V

MAX

Com.

500

Current (CMOS Inputs)

CE1

0.2V,

Ind.

750

CE2

0.2V

> V

0.2V, or

0.2V, f = 0

Note:
1. At f = f

MAX

, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.

IS61C1024
IS61C1024L

Integrated Silicon Solution, Inc. -- 1-800-379-4774

SR028-1K
05/12/99

ISSI

READ CYCLE SWITCHING CHARACTERISTICS

(1)

(Over Operating Range)

-12

(2)

-15 ns

-20 ns

-25 ns

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Read Cycle Time

Address Access Time

OHA

Output Hold Time

ACE

CE1

Access Time

ACE

CE2 Access Time

DOE

Access Time

LZOE

(3)

to Low-Z Output

HZOE

(3)

to High-Z Output

LZCE

(3)

CE1

to Low-Z Output

LZCE

(3)

CE2 to Low-Z Output

HZCE

(3)

CE1

or CE2 to High-Z Output

(4)

CE1

or CE2 to Power-Up

(4)

CE1

or CE2 to Power-Down

Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V

and output loading specified in Figure 1.

2. -12 ns device for IS61C1024 only.
3. Tested with the load in Figure 2. Transition is measured

500 mV from steady-state voltage. Not 100% tested.

4. Not 100% tested.

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

0V to 3.0V

Input Rise and Fall Times

3 ns

Input and Output Timing

1.5V

and Reference Level

Output Load

See Figures 1 and 2

AC TEST LOADS

Figure 1

Figure 2

480

5 pF

Including

jig and

scope

255

OUTPUT

480

30 pF

Including

jig and

scope

255

OUTPUT

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: IS61C1024-15TI

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: IS61C1024-15TI