Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
1
Rev. B
01/24/05
ISSI
Copyright 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
IS61C1024AL
IS64C1024AL
128K x 8 HIGH-SPEED CMOS STATIC RAM
DESCRIPTION
The
ISSI
IS61C1024AL/IS64C1024AL is a very high-speed,
low power, 131,072-word by 8-bit CMOS static RAMs. They
are fabricated using
ISSI's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields higher
performance and low power consumption devices.
When
CE1
is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation
can be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip
Enable inputs,
CE1
and CE2. The active LOW Write Enable
(
WE
) controls both writing and reading of the memory.
The IS61C1024AL/IS64C1024AL is available in 32-pin 300-
mil SOJ, 32-pin 400-mil SOJ, 32-pin TSOP (Type I, 8x20),
and 32-pin sTSOP (Type I, 8 x 13.4) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
CE1
OE
WE
128K x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VDD
I/O
DATA
CIRCUIT
I/O0-I/O7
CE2
FEATURES
High-speed access time: 12, 15 ns
Low active power: 160 mW (typical)
Low standby power: 1000 W (typical) CMOS
standby
Output Enable (
OE
) and two Chip Enable
(
CE1
and CE2) inputs for ease in applications
Fully static operation: no clock or refresh
required
TTL compatible inputs and outputs
Single 5V (10%) power supply
Commercial, industrial, and automotive tempera-
ture ranges available
Lead free available
JANUARY 2005
2
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
Rev. B
01/24/05
IS61C1024AL, IS64C1024AL
ISSI
TRUTH TABLE
Mode
WE
WE
WE
WE
WE
CE1
CE1
CE1
CE1
CE1
CE2
OE
OE
OE
OE
OE
I/O Operation
V
DD
Current
Not Selected
X
H
X
X
High-Z
I
SB
1
, I
SB
2
(Power-down)
X
X
L
X
High-Z
I
SB
1
, I
SB
2
Output Disabled
H
L
H
H
High-Z
I
CC
1
, I
CC
2
Read
H
L
H
L
D
OUT
I
CC
1
, I
CC
2
Write
L
L
H
X
D
IN
I
CC
1
, I
CC
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VDD
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
PIN CONFIGURATION
32-Pin SOJ
PIN DESCRIPTIONS
A0-A16
Address Inputs
CE1
Chip Enable 1 Input
CE2
Chip Enable 2 Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7
Input/Output
V
DD
Power
GND
Ground
OPERATING RANGE (IS64C1024AL)
Range
Ambient Temperature
V
DD
Automotive
-40C to +125C
5V 10%
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
WE
CE2
A15
VDD
NC
A16
A14
A12
A7
A6
A5
A4
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
PIN CONFIGURATION
32-Pin TSOP (Type 1) (T) and sTSOP (Type 1) (H)
OPERATING RANGE (IS61C1024AL)
Range
Ambient Temperature
V
DD
Commercial
0C to +70C
5V 10%
Industrial
-40C to +85C
5V 10%
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
3
Rev. B
01/24/05
IS61C1024AL, IS64C1024AL
ISSI
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Parameter
Value
Unit
V
TERM
Terminal Voltage with Respect to GND
0.5 to +7.0
V
T
STG
Storage Temperature
65 to +150
C
P
T
Power Dissipation
1.5
W
I
OUT
DC Output Current (LOW)
20
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the opera-
tional sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
Parameter
Conditions
Max.
Unit
C
IN
Input Capacitance
V
IN
= 0V
5
pF
C
OUT
Output Capacitance
V
OUT
= 0V
7
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25C, f = 1 MHz, V
DD
= 5.0V.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
DD
= Min., I
OH
= 4.0 mA
2.4
--
V
V
OL
Output LOW Voltage
V
DD
= Min., I
OL
= 8.0 mA
--
0.4
V
V
IH
Input HIGH Voltage
2.2
V
DD
+ 0.5
V
V
IL
Input LOW Voltage
(1)
0.3
0.8
V
I
LI
Input Leakage
GND
V
IN
V
DD
Com.
1
1
A
Ind.
2
2
Auto.
5
5
I
LO
Output Leakage
GND
V
OUT
V
DD
Com.
1
1
A
Outputs Disabled
Ind.
2
2
Auto.
5
5
Note:
1. V
IL
= 3.0V for pulse width less than 10 ns.
4
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
Rev. B
01/24/05
IS61C1024AL, IS64C1024AL
ISSI
IS61C1024AL/IS64C1024AL POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-12 ns
-15 ns
Symbol Parameter
Test Conditions
Min.
Max.
Min.
Max.
Unit
I
CC
1
V
DD
Operating
V
DD
= V
DD
MAX
.,
CE1
= V
IL
Com.
--
35
mA
Supply Current
I
OUT
= 0 mA, f = 0
Ind.
--
40
Auto.
--
45
I
CC
2
V
DD
Dynamic Operating
V
DD
= V
DD
MAX
.,
CE1
= V
IL
Com.
--
45
mA
Supply Current
I
OUT
= 0 mA, f = f
MAX
Ind.
--
50
Auto.
--
55
typ.
(2)
--
32
I
SB
1
TTL Standby Current
V
DD
= V
DD
MAX
.,
Com.
--
1
mA
(TTL Inputs)
V
IN
= V
IH
or V
IL
Ind.
--
1.5
CE1
V
IH
, f = 0 or
Auto.
--
2
CE2
V
IL
, f = 0
I
SB
2
CMOS Standby
V
DD
= V
DD
MAX
.,
Com.
--
400
A
Current (CMOS Inputs)
CE1
V
DD
0.2V,
Ind.
--
450
CE2
0.2V
Auto.
--
500
V
IN
V
DD
0.2V, or
typ.
(2)
--
200
V
IN
0.2V, f = 0
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical Values are measured at V
DD
= 5V, T
A
= 25
o
C and not 100% tested.
Integrated Silicon Solution, Inc. -- www.issi.com --
1-800-379-4774
5
Rev. B
01/24/05
IS61C1024AL, IS64C1024AL
ISSI
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-12
-15
Symbol
Parameter
Min. Max.
Min. Max.
Unit
t
RC
Read Cycle Time
12
--
15
--
ns
t
AA
Address Access Time
--
12
--
15
ns
t
OHA
Output Hold Time
3
--
3
--
ns
t
ACE
1
CE1
Access Time
--
12
--
15
ns
t
ACE
2
CE2 Access Time
--
12
--
15
ns
t
DOE
OE
Access Time
--
6
--
7
ns
t
LZOE
(2)
OE
to Low-Z Output
0
--
0
--
ns
t
HZOE
(2)
OE
to High-Z Output
0
6
0
6
ns
t
LZCE
1
(2)
CE1
to Low-Z Output
2
--
2
--
ns
t
LZCE
2
(2)
CE2 to Low-Z Output
2
--
2
--
ns
t
HZCE
(2)
CE1
or CE2 to High-Z Output
0
7
0
8
ns
t
PU
(3)
CE1
or CE2 to Power-Up
0
--
0
--
ns
t
PD
(3)
CE1
or CE2 to Power-Down
--
12
--
12
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0 to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
Input Pulse Level
0V to 3.0V
Input Rise and Fall Times
3 ns
Input and Output Timing
1.5V
and Reference Level
Output Load
See Figures 1 and 2
AC TEST LOADS
Figure 1
Figure 2
480
5 pF
Including
jig and
scope
255
OUTPUT
5V
480
30 pF
Including
jig and
scope
255
OUTPUT
5V
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